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dawn / dawn / 6e4a366841ee807f84932a190cb8fa8d8af10e11 / . / test / tint / expressions / bitcast / const / 32bit
tree: 53d8d5ed96f6e7e82d5c5196fd0ecc707248664b [path history] [tgz]
  1. f32-f32.wgsl
  2. f32-f32.wgsl.expected.dxc.hlsl
  3. f32-f32.wgsl.expected.fxc.hlsl
  4. f32-f32.wgsl.expected.glsl
  5. f32-f32.wgsl.expected.ir.dxc.hlsl
  6. f32-f32.wgsl.expected.ir.fxc.hlsl
  7. f32-f32.wgsl.expected.ir.glsl
  8. f32-f32.wgsl.expected.ir.msl
  9. f32-f32.wgsl.expected.msl
  10. f32-f32.wgsl.expected.spvasm
  11. f32-f32.wgsl.expected.wgsl
  12. f32-i32.wgsl
  13. f32-i32.wgsl.expected.dxc.hlsl
  14. f32-i32.wgsl.expected.fxc.hlsl
  15. f32-i32.wgsl.expected.glsl
  16. f32-i32.wgsl.expected.ir.dxc.hlsl
  17. f32-i32.wgsl.expected.ir.fxc.hlsl
  18. f32-i32.wgsl.expected.ir.glsl
  19. f32-i32.wgsl.expected.ir.msl
  20. f32-i32.wgsl.expected.msl
  21. f32-i32.wgsl.expected.spvasm
  22. f32-i32.wgsl.expected.wgsl
  23. f32-u32.wgsl
  24. f32-u32.wgsl.expected.dxc.hlsl
  25. f32-u32.wgsl.expected.fxc.hlsl
  26. f32-u32.wgsl.expected.glsl
  27. f32-u32.wgsl.expected.ir.dxc.hlsl
  28. f32-u32.wgsl.expected.ir.fxc.hlsl
  29. f32-u32.wgsl.expected.ir.glsl
  30. f32-u32.wgsl.expected.ir.msl
  31. f32-u32.wgsl.expected.msl
  32. f32-u32.wgsl.expected.spvasm
  33. f32-u32.wgsl.expected.wgsl
  34. f32-vec2f16.wgsl
  35. f32-vec2f16.wgsl.expected.dxc.hlsl
  36. f32-vec2f16.wgsl.expected.fxc.hlsl
  37. f32-vec2f16.wgsl.expected.glsl
  38. f32-vec2f16.wgsl.expected.ir.dxc.hlsl
  39. f32-vec2f16.wgsl.expected.ir.fxc.hlsl
  40. f32-vec2f16.wgsl.expected.ir.glsl
  41. f32-vec2f16.wgsl.expected.ir.msl
  42. f32-vec2f16.wgsl.expected.msl
  43. f32-vec2f16.wgsl.expected.spvasm
  44. f32-vec2f16.wgsl.expected.wgsl
  45. i32-f32.wgsl
  46. i32-f32.wgsl.expected.dxc.hlsl
  47. i32-f32.wgsl.expected.fxc.hlsl
  48. i32-f32.wgsl.expected.glsl
  49. i32-f32.wgsl.expected.ir.dxc.hlsl
  50. i32-f32.wgsl.expected.ir.fxc.hlsl
  51. i32-f32.wgsl.expected.ir.glsl
  52. i32-f32.wgsl.expected.ir.msl
  53. i32-f32.wgsl.expected.msl
  54. i32-f32.wgsl.expected.spvasm
  55. i32-f32.wgsl.expected.wgsl
  56. i32-i32.wgsl
  57. i32-i32.wgsl.expected.dxc.hlsl
  58. i32-i32.wgsl.expected.fxc.hlsl
  59. i32-i32.wgsl.expected.glsl
  60. i32-i32.wgsl.expected.ir.dxc.hlsl
  61. i32-i32.wgsl.expected.ir.fxc.hlsl
  62. i32-i32.wgsl.expected.ir.glsl
  63. i32-i32.wgsl.expected.ir.msl
  64. i32-i32.wgsl.expected.msl
  65. i32-i32.wgsl.expected.spvasm
  66. i32-i32.wgsl.expected.wgsl
  67. i32-u32.wgsl
  68. i32-u32.wgsl.expected.dxc.hlsl
  69. i32-u32.wgsl.expected.fxc.hlsl
  70. i32-u32.wgsl.expected.glsl
  71. i32-u32.wgsl.expected.ir.dxc.hlsl
  72. i32-u32.wgsl.expected.ir.fxc.hlsl
  73. i32-u32.wgsl.expected.ir.glsl
  74. i32-u32.wgsl.expected.ir.msl
  75. i32-u32.wgsl.expected.msl
  76. i32-u32.wgsl.expected.spvasm
  77. i32-u32.wgsl.expected.wgsl
  78. i32-vec2f16.wgsl
  79. i32-vec2f16.wgsl.expected.dxc.hlsl
  80. i32-vec2f16.wgsl.expected.fxc.hlsl
  81. i32-vec2f16.wgsl.expected.glsl
  82. i32-vec2f16.wgsl.expected.ir.dxc.hlsl
  83. i32-vec2f16.wgsl.expected.ir.fxc.hlsl
  84. i32-vec2f16.wgsl.expected.ir.glsl
  85. i32-vec2f16.wgsl.expected.ir.msl
  86. i32-vec2f16.wgsl.expected.msl
  87. i32-vec2f16.wgsl.expected.spvasm
  88. i32-vec2f16.wgsl.expected.wgsl
  89. i32min-u32.wgsl
  90. i32min-u32.wgsl.expected.dxc.hlsl
  91. i32min-u32.wgsl.expected.fxc.hlsl
  92. i32min-u32.wgsl.expected.glsl
  93. i32min-u32.wgsl.expected.ir.dxc.hlsl
  94. i32min-u32.wgsl.expected.ir.fxc.hlsl
  95. i32min-u32.wgsl.expected.ir.glsl
  96. i32min-u32.wgsl.expected.ir.msl
  97. i32min-u32.wgsl.expected.msl
  98. i32min-u32.wgsl.expected.spvasm
  99. i32min-u32.wgsl.expected.wgsl
  100. u32-f32.wgsl
  101. u32-f32.wgsl.expected.dxc.hlsl
  102. u32-f32.wgsl.expected.fxc.hlsl
  103. u32-f32.wgsl.expected.glsl
  104. u32-f32.wgsl.expected.ir.dxc.hlsl
  105. u32-f32.wgsl.expected.ir.fxc.hlsl
  106. u32-f32.wgsl.expected.ir.glsl
  107. u32-f32.wgsl.expected.ir.msl
  108. u32-f32.wgsl.expected.msl
  109. u32-f32.wgsl.expected.spvasm
  110. u32-f32.wgsl.expected.wgsl
  111. u32-i32.wgsl
  112. u32-i32.wgsl.expected.dxc.hlsl
  113. u32-i32.wgsl.expected.fxc.hlsl
  114. u32-i32.wgsl.expected.glsl
  115. u32-i32.wgsl.expected.ir.dxc.hlsl
  116. u32-i32.wgsl.expected.ir.fxc.hlsl
  117. u32-i32.wgsl.expected.ir.glsl
  118. u32-i32.wgsl.expected.ir.msl
  119. u32-i32.wgsl.expected.msl
  120. u32-i32.wgsl.expected.spvasm
  121. u32-i32.wgsl.expected.wgsl
  122. u32-u32.wgsl
  123. u32-u32.wgsl.expected.dxc.hlsl
  124. u32-u32.wgsl.expected.fxc.hlsl
  125. u32-u32.wgsl.expected.glsl
  126. u32-u32.wgsl.expected.ir.dxc.hlsl
  127. u32-u32.wgsl.expected.ir.fxc.hlsl
  128. u32-u32.wgsl.expected.ir.glsl
  129. u32-u32.wgsl.expected.ir.msl
  130. u32-u32.wgsl.expected.msl
  131. u32-u32.wgsl.expected.spvasm
  132. u32-u32.wgsl.expected.wgsl
  133. u32-vec2f16.wgsl
  134. u32-vec2f16.wgsl.expected.dxc.hlsl
  135. u32-vec2f16.wgsl.expected.fxc.hlsl
  136. u32-vec2f16.wgsl.expected.glsl
  137. u32-vec2f16.wgsl.expected.ir.dxc.hlsl
  138. u32-vec2f16.wgsl.expected.ir.fxc.hlsl
  139. u32-vec2f16.wgsl.expected.ir.glsl
  140. u32-vec2f16.wgsl.expected.ir.msl
  141. u32-vec2f16.wgsl.expected.msl
  142. u32-vec2f16.wgsl.expected.spvasm
  143. u32-vec2f16.wgsl.expected.wgsl
  144. vec2f16-f32.wgsl
  145. vec2f16-f32.wgsl.expected.dxc.hlsl
  146. vec2f16-f32.wgsl.expected.fxc.hlsl
  147. vec2f16-f32.wgsl.expected.glsl
  148. vec2f16-f32.wgsl.expected.ir.dxc.hlsl
  149. vec2f16-f32.wgsl.expected.ir.fxc.hlsl
  150. vec2f16-f32.wgsl.expected.ir.glsl
  151. vec2f16-f32.wgsl.expected.ir.msl
  152. vec2f16-f32.wgsl.expected.msl
  153. vec2f16-f32.wgsl.expected.spvasm
  154. vec2f16-f32.wgsl.expected.wgsl
  155. vec2f16-i32.wgsl
  156. vec2f16-i32.wgsl.expected.dxc.hlsl
  157. vec2f16-i32.wgsl.expected.fxc.hlsl
  158. vec2f16-i32.wgsl.expected.glsl
  159. vec2f16-i32.wgsl.expected.ir.dxc.hlsl
  160. vec2f16-i32.wgsl.expected.ir.fxc.hlsl
  161. vec2f16-i32.wgsl.expected.ir.glsl
  162. vec2f16-i32.wgsl.expected.ir.msl
  163. vec2f16-i32.wgsl.expected.msl
  164. vec2f16-i32.wgsl.expected.spvasm
  165. vec2f16-i32.wgsl.expected.wgsl
  166. vec2f16-u32.wgsl
  167. vec2f16-u32.wgsl.expected.dxc.hlsl
  168. vec2f16-u32.wgsl.expected.fxc.hlsl
  169. vec2f16-u32.wgsl.expected.glsl
  170. vec2f16-u32.wgsl.expected.ir.dxc.hlsl
  171. vec2f16-u32.wgsl.expected.ir.fxc.hlsl
  172. vec2f16-u32.wgsl.expected.ir.glsl
  173. vec2f16-u32.wgsl.expected.ir.msl
  174. vec2f16-u32.wgsl.expected.msl
  175. vec2f16-u32.wgsl.expected.spvasm
  176. vec2f16-u32.wgsl.expected.wgsl
  177. vec2f16-vec2f16.wgsl
  178. vec2f16-vec2f16.wgsl.expected.dxc.hlsl
  179. vec2f16-vec2f16.wgsl.expected.fxc.hlsl
  180. vec2f16-vec2f16.wgsl.expected.glsl
  181. vec2f16-vec2f16.wgsl.expected.ir.dxc.hlsl
  182. vec2f16-vec2f16.wgsl.expected.ir.fxc.hlsl
  183. vec2f16-vec2f16.wgsl.expected.ir.glsl
  184. vec2f16-vec2f16.wgsl.expected.ir.msl
  185. vec2f16-vec2f16.wgsl.expected.msl
  186. vec2f16-vec2f16.wgsl.expected.spvasm
  187. vec2f16-vec2f16.wgsl.expected.wgsl