test/tint/builtins/gen/literal/atomicAnd/152966.wgsl.expected.ir.fxc.hlsl

RWByteAddressBuffer prevent_dce : register(u0);
RWByteAddressBuffer sb_rw : register(u1);
int atomicAnd_152966() {
  int v = int(0);
  sb_rw.InterlockedAnd(int(0u), int(1), v);
  int res = v;
  return res;
}

void fragment_main() {
  prevent_dce.Store(0u, asuint(atomicAnd_152966()));
}

[numthreads(1, 1, 1)]
void compute_main() {
  prevent_dce.Store(0u, asuint(atomicAnd_152966()));
}