Suppress MaxInterStageVariables causing VVL errors.

The VVLs are correct and it seems that the WebGPU spec will need to be
updated.

Bug: dawn:2398
Change-Id: Ia003b90538adf24fa30f2561f0cedaa64111364d
Reviewed-on: https://dawn-review.googlesource.com/c/dawn/+/173986
Reviewed-by: Kai Ninomiya <kainino@chromium.org>
Reviewed-by: Austin Eng <enga@chromium.org>
Commit-Queue: Corentin Wallez <cwallez@chromium.org>
Kokoro: Kokoro <noreply+kokoro@google.com>
Commit-Queue: Kai Ninomiya <kainino@chromium.org>
Auto-Submit: Corentin Wallez <cwallez@chromium.org>
diff --git a/src/dawn/tests/end2end/MaxLimitTests.cpp b/src/dawn/tests/end2end/MaxLimitTests.cpp
index d8810bc..265ab8e 100644
--- a/src/dawn/tests/end2end/MaxLimitTests.cpp
+++ b/src/dawn/tests/end2end/MaxLimitTests.cpp
@@ -1091,6 +1091,8 @@
 // pipeline with @builtin(sample_mask). On D3D SV_Coverage doesn't consume an independent float4
 // register.
 TEST_P(MaxInterStageLimitTests, SampleMask) {
+    // TODO(dawn:2398): The spec is too permissive and needs fixing, suppress the VVL error for now
+    DAWN_SUPPRESS_TEST_IF(IsVulkan() && IsBackendValidationEnabled());
     MaxInterStageLimitTestsSpec spec = {};
     spec.hasSampleMask = true;
     DoTest(spec);
@@ -1100,6 +1102,8 @@
 // pipeline with @builtin(sample_index). On D3D SV_SampleIndex consumes an independent float4
 // register.
 TEST_P(MaxInterStageLimitTests, SampleIndex) {
+    // TODO(dawn:2398): The spec is too permissive and needs fixing, suppress the VVL error for now
+    DAWN_SUPPRESS_TEST_IF(IsVulkan() && IsBackendValidationEnabled());
     MaxInterStageLimitTestsSpec spec = {};
     spec.hasSampleIndex = true;
     DoTest(spec);
@@ -1109,6 +1113,8 @@
 // pipeline with @builtin(front_facing). On D3D SV_IsFrontFace consumes an independent float4
 // register.
 TEST_P(MaxInterStageLimitTests, FrontFacing) {
+    // TODO(dawn:2398): The spec is too permissive and needs fixing, suppress the VVL error for now
+    DAWN_SUPPRESS_TEST_IF(IsVulkan() && IsBackendValidationEnabled());
     MaxInterStageLimitTestsSpec spec = {};
     spec.hasFrontFacing = true;
     DoTest(spec);
@@ -1118,6 +1124,8 @@
 // pipeline with @builtin(front_facing). On D3D SV_IsFrontFace and SV_SampleIndex consume one
 // independent float4 register.
 TEST_P(MaxInterStageLimitTests, SampleIndex_FrontFacing) {
+    // TODO(dawn:2398): The spec is too permissive and needs fixing, suppress the VVL error for now
+    DAWN_SUPPRESS_TEST_IF(IsVulkan() && IsBackendValidationEnabled());
     MaxInterStageLimitTestsSpec spec = {};
     spec.hasSampleIndex = true;
     spec.hasFrontFacing = true;
@@ -1128,6 +1136,8 @@
 // pipeline with @builtin(sample_mask),
 // @builtin(sample_index) and @builtin(front_facing).
 TEST_P(MaxInterStageLimitTests, SampleMask_SampleIndex_FrontFacing) {
+    // TODO(dawn:2398): The spec is too permissive and needs fixing, suppress the VVL error for now
+    DAWN_SUPPRESS_TEST_IF(IsVulkan() && IsBackendValidationEnabled());
     MaxInterStageLimitTestsSpec spec = {};
     spec.hasSampleMask = true;
     spec.hasSampleIndex = true;
@@ -1140,6 +1150,8 @@
 // the SPIR-V builtin PointSize must be declared in vertex shader, which will consume 1 inter-stage
 // shader component.
 TEST_P(MaxInterStageLimitTests, RenderPointList) {
+    // TODO(dawn:2398): The spec is too permissive and needs fixing, suppress the VVL error for now
+    DAWN_SUPPRESS_TEST_IF(IsVulkan() && IsBackendValidationEnabled());
     MaxInterStageLimitTestsSpec spec = {};
     spec.renderPointLists = true;
     DoTest(spec);
@@ -1149,6 +1161,8 @@
 // pipeline with PointList primitive topology, @builtin(sample_mask),
 // @builtin(sample_index) and @builtin(front_facing).
 TEST_P(MaxInterStageLimitTests, RenderPointList_SampleMask_SampleIndex_FrontFacing) {
+    // TODO(dawn:2398): The spec is too permissive and needs fixing, suppress the VVL error for now
+    DAWN_SUPPRESS_TEST_IF(IsVulkan() && IsBackendValidationEnabled());
     MaxInterStageLimitTestsSpec spec = {};
     spec.renderPointLists = true;
     spec.hasSampleMask = true;