[hlsl] Fix f16 vector element stores in storage
When the source pointer for an f16 store_vector_element instruction
did not come from a `access` instruction, we were creating an invalid
bitcast from f16 to u32.
Use the `Store()` method on this codepath instead, which takes care of
the special-casing needed for the f16 case.
Bug: 42251045
Change-Id: I3be490f0709000f1acfd3cea844ea3549f7ab6f4
Reviewed-on: https://dawn-review.googlesource.com/c/dawn/+/211095
Commit-Queue: James Price <jrprice@google.com>
Reviewed-by: Antonio Maiorano <amaiorano@google.com>
diff --git a/src/tint/lang/hlsl/writer/raise/decompose_storage_access.cc b/src/tint/lang/hlsl/writer/raise/decompose_storage_access.cc
index 5366784..33d9d73 100644
--- a/src/tint/lang/hlsl/writer/raise/decompose_storage_access.cc
+++ b/src/tint/lang/hlsl/writer/raise/decompose_storage_access.cc
@@ -890,12 +890,8 @@
b.InsertBefore(sve, [&] {
OffsetData offset{};
UpdateOffsetData(sve->Index(), var_ty->StoreType()->DeepestElement()->Size(), &offset);
-
- auto* cast = b.Bitcast(ty.u32(), sve->Value());
- b.MemberCall<hlsl::ir::MemberBuiltinCall>(ty.void_(), BuiltinFn::kStore, var,
- OffsetToValue(offset), cast);
+ Store(sve, var, sve->Value(), offset);
});
- sve->Destroy();
}
};
diff --git a/src/tint/lang/hlsl/writer/raise/decompose_storage_access_test.cc b/src/tint/lang/hlsl/writer/raise/decompose_storage_access_test.cc
index 6002ce0..c7c90eb 100644
--- a/src/tint/lang/hlsl/writer/raise/decompose_storage_access_test.cc
+++ b/src/tint/lang/hlsl/writer/raise/decompose_storage_access_test.cc
@@ -2079,8 +2079,7 @@
b.ir.root_block->Append(var);
auto* func = b.Function("foo", ty.void_(), core::ir::Function::PipelineStage::kFragment);
b.Append(func->Block(), [&] {
- b.StoreVectorElement(b.Access(ty.ptr<storage, vec3<f32>, core::Access::kReadWrite>(), var),
- 1_u, 2_f);
+ b.StoreVectorElement(var, 1_u, 2_f);
b.Return(func);
});
@@ -2091,8 +2090,7 @@
%foo = @fragment func():void {
$B2: {
- %3:ptr<storage, vec3<f32>, read_write> = access %v
- store_vector_element %3, 1u, 2.0f
+ store_vector_element %v, 1u, 2.0f
ret
}
}
@@ -2123,8 +2121,7 @@
b.ir.root_block->Append(var);
auto* func = b.Function("foo", ty.void_(), core::ir::Function::PipelineStage::kFragment);
b.Append(func->Block(), [&] {
- b.StoreVectorElement(b.Access(ty.ptr<storage, vec3<f16>, core::Access::kReadWrite>(), var),
- 1_u, 2_h);
+ b.StoreVectorElement(var, 1_u, 2_h);
b.Return(func);
});
@@ -2135,8 +2132,7 @@
%foo = @fragment func():void {
$B2: {
- %3:ptr<storage, vec3<f16>, read_write> = access %v
- store_vector_element %3, 1u, 2.0h
+ store_vector_element %v, 1u, 2.0h
ret
}
}
diff --git a/test/tint/bug/fxc/vector_assignment_dynamic_index/storage_var.wgsl.expected.ir.dxc.hlsl b/test/tint/bug/fxc/vector_assignment_dynamic_index/storage_var.wgsl.expected.ir.dxc.hlsl
index e75cb75..345e683 100644
--- a/test/tint/bug/fxc/vector_assignment_dynamic_index/storage_var.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/bug/fxc/vector_assignment_dynamic_index/storage_var.wgsl.expected.ir.dxc.hlsl
@@ -5,7 +5,7 @@
RWByteAddressBuffer v1 : register(u1);
[numthreads(1, 1, 1)]
void main() {
- uint v = (uint(i[0u].x) * 4u);
- v1.Store((0u + v), asuint(1.0f));
+ uint v = (0u + (uint(i[0u].x) * 4u));
+ v1.Store(v, asuint(1.0f));
}
diff --git a/test/tint/bug/fxc/vector_assignment_dynamic_index/storage_var.wgsl.expected.ir.fxc.hlsl b/test/tint/bug/fxc/vector_assignment_dynamic_index/storage_var.wgsl.expected.ir.fxc.hlsl
index e75cb75..345e683 100644
--- a/test/tint/bug/fxc/vector_assignment_dynamic_index/storage_var.wgsl.expected.ir.fxc.hlsl
+++ b/test/tint/bug/fxc/vector_assignment_dynamic_index/storage_var.wgsl.expected.ir.fxc.hlsl
@@ -5,7 +5,7 @@
RWByteAddressBuffer v1 : register(u1);
[numthreads(1, 1, 1)]
void main() {
- uint v = (uint(i[0u].x) * 4u);
- v1.Store((0u + v), asuint(1.0f));
+ uint v = (0u + (uint(i[0u].x) * 4u));
+ v1.Store(v, asuint(1.0f));
}
