GLSL: set integers to precision highp.
In GLSL fragment shaders, int and uint default to mediump, which has
implementation-defined precision. This means that a push constant block
shared between vertex and fragment shader containing an integer type
will error at link time.
WGSL mandates that i32 and i32 are 32-bit (natch), so force fragment
shader integers to highp, as we were already doing for floats. highp is guaranteed to be 32-bit in GLSL.
Change-Id: I50c7bfafa5c28cb645ff50fbb7eff1ecdb578fcb
Bug: dawn:2185
Reviewed-on: https://dawn-review.googlesource.com/c/dawn/+/173802
Reviewed-by: Ben Clayton <bclayton@google.com>
Commit-Queue: Stephen White <senorblanco@chromium.org>
Kokoro: Kokoro <noreply+kokoro@google.com>
diff --git a/test/tint/builtins/gen/var/min/03c7e3.wgsl.expected.glsl b/test/tint/builtins/gen/var/min/03c7e3.wgsl.expected.glsl
index 9cb7748..3614e92 100644
--- a/test/tint/builtins/gen/var/min/03c7e3.wgsl.expected.glsl
+++ b/test/tint/builtins/gen/var/min/03c7e3.wgsl.expected.glsl
@@ -26,6 +26,7 @@
}
#version 310 es
precision highp float;
+precision highp int;
layout(binding = 0, std430) buffer prevent_dce_block_ssbo {
ivec2 inner;
diff --git a/test/tint/builtins/gen/var/min/0dc614.wgsl.expected.glsl b/test/tint/builtins/gen/var/min/0dc614.wgsl.expected.glsl
index 504506a..71d8fbe 100644
--- a/test/tint/builtins/gen/var/min/0dc614.wgsl.expected.glsl
+++ b/test/tint/builtins/gen/var/min/0dc614.wgsl.expected.glsl
@@ -26,6 +26,7 @@
}
#version 310 es
precision highp float;
+precision highp int;
layout(binding = 0, std430) buffer prevent_dce_block_ssbo {
uvec4 inner;
diff --git a/test/tint/builtins/gen/var/min/364910.wgsl.expected.glsl b/test/tint/builtins/gen/var/min/364910.wgsl.expected.glsl
index 63f2667..132a53a 100644
--- a/test/tint/builtins/gen/var/min/364910.wgsl.expected.glsl
+++ b/test/tint/builtins/gen/var/min/364910.wgsl.expected.glsl
@@ -19,6 +19,7 @@
}
#version 310 es
precision highp float;
+precision highp int;
void min_364910() {
vec3 res = vec3(1.0f);
diff --git a/test/tint/builtins/gen/var/min/371bd6.wgsl.expected.glsl b/test/tint/builtins/gen/var/min/371bd6.wgsl.expected.glsl
index 87916cc..ea8117d 100644
--- a/test/tint/builtins/gen/var/min/371bd6.wgsl.expected.glsl
+++ b/test/tint/builtins/gen/var/min/371bd6.wgsl.expected.glsl
@@ -19,6 +19,7 @@
}
#version 310 es
precision highp float;
+precision highp int;
void min_371bd6() {
ivec3 res = ivec3(1);
diff --git a/test/tint/builtins/gen/var/min/3941e1.wgsl.expected.glsl b/test/tint/builtins/gen/var/min/3941e1.wgsl.expected.glsl
index 44fca5f..5be5915 100644
--- a/test/tint/builtins/gen/var/min/3941e1.wgsl.expected.glsl
+++ b/test/tint/builtins/gen/var/min/3941e1.wgsl.expected.glsl
@@ -26,6 +26,7 @@
}
#version 310 es
precision highp float;
+precision highp int;
layout(binding = 0, std430) buffer prevent_dce_block_ssbo {
ivec4 inner;
diff --git a/test/tint/builtins/gen/var/min/46c5d3.wgsl.expected.glsl b/test/tint/builtins/gen/var/min/46c5d3.wgsl.expected.glsl
index 7410ad8..2382839 100644
--- a/test/tint/builtins/gen/var/min/46c5d3.wgsl.expected.glsl
+++ b/test/tint/builtins/gen/var/min/46c5d3.wgsl.expected.glsl
@@ -26,6 +26,7 @@
}
#version 310 es
precision highp float;
+precision highp int;
layout(binding = 0, std430) buffer prevent_dce_block_ssbo {
uint inner;
diff --git a/test/tint/builtins/gen/var/min/527b79.wgsl.expected.glsl b/test/tint/builtins/gen/var/min/527b79.wgsl.expected.glsl
index a8f89e7..a65658c 100644
--- a/test/tint/builtins/gen/var/min/527b79.wgsl.expected.glsl
+++ b/test/tint/builtins/gen/var/min/527b79.wgsl.expected.glsl
@@ -19,6 +19,7 @@
}
#version 310 es
precision highp float;
+precision highp int;
void min_527b79() {
ivec2 res = ivec2(1);
diff --git a/test/tint/builtins/gen/var/min/717257.wgsl.expected.glsl b/test/tint/builtins/gen/var/min/717257.wgsl.expected.glsl
index 7b0f2a9..0680452 100644
--- a/test/tint/builtins/gen/var/min/717257.wgsl.expected.glsl
+++ b/test/tint/builtins/gen/var/min/717257.wgsl.expected.glsl
@@ -19,6 +19,7 @@
}
#version 310 es
precision highp float;
+precision highp int;
void min_717257() {
vec2 res = vec2(1.0f);
diff --git a/test/tint/builtins/gen/var/min/794711.wgsl.expected.glsl b/test/tint/builtins/gen/var/min/794711.wgsl.expected.glsl
index 3c834a1..75a8633 100644
--- a/test/tint/builtins/gen/var/min/794711.wgsl.expected.glsl
+++ b/test/tint/builtins/gen/var/min/794711.wgsl.expected.glsl
@@ -19,6 +19,7 @@
}
#version 310 es
precision highp float;
+precision highp int;
void min_794711() {
float res = 1.0f;
diff --git a/test/tint/builtins/gen/var/min/7c710a.wgsl.expected.glsl b/test/tint/builtins/gen/var/min/7c710a.wgsl.expected.glsl
index 3e704e7..3934150 100644
--- a/test/tint/builtins/gen/var/min/7c710a.wgsl.expected.glsl
+++ b/test/tint/builtins/gen/var/min/7c710a.wgsl.expected.glsl
@@ -28,6 +28,7 @@
#version 310 es
#extension GL_AMD_gpu_shader_half_float : require
precision highp float;
+precision highp int;
layout(binding = 0, std430) buffer prevent_dce_block_ssbo {
f16vec4 inner;
diff --git a/test/tint/builtins/gen/var/min/82b28f.wgsl.expected.glsl b/test/tint/builtins/gen/var/min/82b28f.wgsl.expected.glsl
index 0b0e4bc..e9d210c 100644
--- a/test/tint/builtins/gen/var/min/82b28f.wgsl.expected.glsl
+++ b/test/tint/builtins/gen/var/min/82b28f.wgsl.expected.glsl
@@ -26,6 +26,7 @@
}
#version 310 es
precision highp float;
+precision highp int;
layout(binding = 0, std430) buffer prevent_dce_block_ssbo {
uvec2 inner;
diff --git a/test/tint/builtins/gen/var/min/84c9fe.wgsl.expected.glsl b/test/tint/builtins/gen/var/min/84c9fe.wgsl.expected.glsl
index 79cbf5e..1c02dcd 100644
--- a/test/tint/builtins/gen/var/min/84c9fe.wgsl.expected.glsl
+++ b/test/tint/builtins/gen/var/min/84c9fe.wgsl.expected.glsl
@@ -19,6 +19,7 @@
}
#version 310 es
precision highp float;
+precision highp int;
void min_84c9fe() {
int res = 1;
diff --git a/test/tint/builtins/gen/var/min/93cfc4.wgsl.expected.glsl b/test/tint/builtins/gen/var/min/93cfc4.wgsl.expected.glsl
index cb85a90..7d4c9ff 100644
--- a/test/tint/builtins/gen/var/min/93cfc4.wgsl.expected.glsl
+++ b/test/tint/builtins/gen/var/min/93cfc4.wgsl.expected.glsl
@@ -27,6 +27,7 @@
}
#version 310 es
precision highp float;
+precision highp int;
layout(binding = 0, std430) buffer prevent_dce_block_ssbo {
vec3 inner;
diff --git a/test/tint/builtins/gen/var/min/98e797.wgsl.expected.glsl b/test/tint/builtins/gen/var/min/98e797.wgsl.expected.glsl
index 49f020f..31fa7e5 100644
--- a/test/tint/builtins/gen/var/min/98e797.wgsl.expected.glsl
+++ b/test/tint/builtins/gen/var/min/98e797.wgsl.expected.glsl
@@ -19,6 +19,7 @@
}
#version 310 es
precision highp float;
+precision highp int;
void min_98e797() {
vec4 res = vec4(1.0f);
diff --git a/test/tint/builtins/gen/var/min/a45171.wgsl.expected.glsl b/test/tint/builtins/gen/var/min/a45171.wgsl.expected.glsl
index 4f4d4b8..7e92b73 100644
--- a/test/tint/builtins/gen/var/min/a45171.wgsl.expected.glsl
+++ b/test/tint/builtins/gen/var/min/a45171.wgsl.expected.glsl
@@ -27,6 +27,7 @@
}
#version 310 es
precision highp float;
+precision highp int;
layout(binding = 0, std430) buffer prevent_dce_block_ssbo {
ivec3 inner;
diff --git a/test/tint/builtins/gen/var/min/aa28ad.wgsl.expected.glsl b/test/tint/builtins/gen/var/min/aa28ad.wgsl.expected.glsl
index 5a37f0c..045dc2f 100644
--- a/test/tint/builtins/gen/var/min/aa28ad.wgsl.expected.glsl
+++ b/test/tint/builtins/gen/var/min/aa28ad.wgsl.expected.glsl
@@ -26,6 +26,7 @@
}
#version 310 es
precision highp float;
+precision highp int;
layout(binding = 0, std430) buffer prevent_dce_block_ssbo {
vec2 inner;
diff --git a/test/tint/builtins/gen/var/min/ab0acd.wgsl.expected.glsl b/test/tint/builtins/gen/var/min/ab0acd.wgsl.expected.glsl
index d10eb5d..5f4d3c7 100644
--- a/test/tint/builtins/gen/var/min/ab0acd.wgsl.expected.glsl
+++ b/test/tint/builtins/gen/var/min/ab0acd.wgsl.expected.glsl
@@ -28,6 +28,7 @@
#version 310 es
#extension GL_AMD_gpu_shader_half_float : require
precision highp float;
+precision highp int;
layout(binding = 0, std430) buffer prevent_dce_block_ssbo {
f16vec3 inner;
diff --git a/test/tint/builtins/gen/var/min/ac84d6.wgsl.expected.glsl b/test/tint/builtins/gen/var/min/ac84d6.wgsl.expected.glsl
index a80d4b0..9f5c89a 100644
--- a/test/tint/builtins/gen/var/min/ac84d6.wgsl.expected.glsl
+++ b/test/tint/builtins/gen/var/min/ac84d6.wgsl.expected.glsl
@@ -28,6 +28,7 @@
#version 310 es
#extension GL_AMD_gpu_shader_half_float : require
precision highp float;
+precision highp int;
layout(binding = 0, std430) buffer prevent_dce_block_ssbo {
float16_t inner;
diff --git a/test/tint/builtins/gen/var/min/af326d.wgsl.expected.glsl b/test/tint/builtins/gen/var/min/af326d.wgsl.expected.glsl
index 6a51fb5..90b83a8 100644
--- a/test/tint/builtins/gen/var/min/af326d.wgsl.expected.glsl
+++ b/test/tint/builtins/gen/var/min/af326d.wgsl.expected.glsl
@@ -26,6 +26,7 @@
}
#version 310 es
precision highp float;
+precision highp int;
layout(binding = 0, std430) buffer prevent_dce_block_ssbo {
float inner;
diff --git a/test/tint/builtins/gen/var/min/af364e.wgsl.expected.glsl b/test/tint/builtins/gen/var/min/af364e.wgsl.expected.glsl
index 4a34614..0a5b7ca 100644
--- a/test/tint/builtins/gen/var/min/af364e.wgsl.expected.glsl
+++ b/test/tint/builtins/gen/var/min/af364e.wgsl.expected.glsl
@@ -19,6 +19,7 @@
}
#version 310 es
precision highp float;
+precision highp int;
void min_af364e() {
ivec4 res = ivec4(1);
diff --git a/test/tint/builtins/gen/var/min/c70bb7.wgsl.expected.glsl b/test/tint/builtins/gen/var/min/c70bb7.wgsl.expected.glsl
index d664469..01ebdef 100644
--- a/test/tint/builtins/gen/var/min/c70bb7.wgsl.expected.glsl
+++ b/test/tint/builtins/gen/var/min/c70bb7.wgsl.expected.glsl
@@ -27,6 +27,7 @@
}
#version 310 es
precision highp float;
+precision highp int;
layout(binding = 0, std430) buffer prevent_dce_block_ssbo {
uvec3 inner;
diff --git a/test/tint/builtins/gen/var/min/c73147.wgsl.expected.glsl b/test/tint/builtins/gen/var/min/c73147.wgsl.expected.glsl
index 8dd24be..1674410 100644
--- a/test/tint/builtins/gen/var/min/c73147.wgsl.expected.glsl
+++ b/test/tint/builtins/gen/var/min/c73147.wgsl.expected.glsl
@@ -26,6 +26,7 @@
}
#version 310 es
precision highp float;
+precision highp int;
layout(binding = 0, std430) buffer prevent_dce_block_ssbo {
int inner;
diff --git a/test/tint/builtins/gen/var/min/c76fa6.wgsl.expected.glsl b/test/tint/builtins/gen/var/min/c76fa6.wgsl.expected.glsl
index 69b8bc9..0f72485 100644
--- a/test/tint/builtins/gen/var/min/c76fa6.wgsl.expected.glsl
+++ b/test/tint/builtins/gen/var/min/c76fa6.wgsl.expected.glsl
@@ -26,6 +26,7 @@
}
#version 310 es
precision highp float;
+precision highp int;
layout(binding = 0, std430) buffer prevent_dce_block_ssbo {
vec4 inner;
diff --git a/test/tint/builtins/gen/var/min/e780f9.wgsl.expected.glsl b/test/tint/builtins/gen/var/min/e780f9.wgsl.expected.glsl
index 9730999..7591bab 100644
--- a/test/tint/builtins/gen/var/min/e780f9.wgsl.expected.glsl
+++ b/test/tint/builtins/gen/var/min/e780f9.wgsl.expected.glsl
@@ -28,6 +28,7 @@
#version 310 es
#extension GL_AMD_gpu_shader_half_float : require
precision highp float;
+precision highp int;
layout(binding = 0, std430) buffer prevent_dce_block_ssbo {
f16vec2 inner;
