[tint] Implement subgroupAnd, Or, Xor builtins
Implement subgroupAnd, subgroupOr and subgroupXor builtin functions for
WGSL, SPIR-V IR, MSL (AST and IR) and HLSL (AST and IR) backends.
Skip expectations for Tint end2end tests have also been regenerated for all subgroup builtins for FXC.
Bug: 354738715
Change-Id: Ief085297c5d659faaf0c5f8893357fc92dccb21f
Reviewed-on: https://dawn-review.googlesource.com/c/dawn/+/201695
Reviewed-by: dan sinclair <dsinclair@chromium.org>
Commit-Queue: Natalie Chouinard <chouinard@google.com>
diff --git a/src/tint/cmd/fuzz/wgsl/dictionary.txt b/src/tint/cmd/fuzz/wgsl/dictionary.txt
index 1e9c846..e5ea4ce 100644
--- a/src/tint/cmd/fuzz/wgsl/dictionary.txt
+++ b/src/tint/cmd/fuzz/wgsl/dictionary.txt
@@ -368,11 +368,14 @@
"storageBarrier"
"struct"
"subgroupAdd"
+"subgroupAnd"
"subgroupBallot"
"subgroupBroadcast"
"subgroupExclusiveAdd"
"subgroupExclusiveMul"
"subgroupMul"
+"subgroupOr"
+"subgroupXor"
"subgroup_invocation_id"
"subgroup_size"
"subgroups"
diff --git a/src/tint/lang/core/builtin_fn.cc b/src/tint/lang/core/builtin_fn.cc
index aaf8c76..30a98b4 100644
--- a/src/tint/lang/core/builtin_fn.cc
+++ b/src/tint/lang/core/builtin_fn.cc
@@ -417,6 +417,15 @@
if (name == "subgroupExclusiveMul") {
return BuiltinFn::kSubgroupExclusiveMul;
}
+ if (name == "subgroupAnd") {
+ return BuiltinFn::kSubgroupAnd;
+ }
+ if (name == "subgroupOr") {
+ return BuiltinFn::kSubgroupOr;
+ }
+ if (name == "subgroupXor") {
+ return BuiltinFn::kSubgroupXor;
+ }
return BuiltinFn::kNone;
}
@@ -676,6 +685,12 @@
return "subgroupMul";
case BuiltinFn::kSubgroupExclusiveMul:
return "subgroupExclusiveMul";
+ case BuiltinFn::kSubgroupAnd:
+ return "subgroupAnd";
+ case BuiltinFn::kSubgroupOr:
+ return "subgroupOr";
+ case BuiltinFn::kSubgroupXor:
+ return "subgroupXor";
}
return "<unknown>";
}
diff --git a/src/tint/lang/core/builtin_fn.h b/src/tint/lang/core/builtin_fn.h
index 02e6396..f1c230d 100644
--- a/src/tint/lang/core/builtin_fn.h
+++ b/src/tint/lang/core/builtin_fn.h
@@ -173,6 +173,9 @@
kSubgroupExclusiveAdd,
kSubgroupMul,
kSubgroupExclusiveMul,
+ kSubgroupAnd,
+ kSubgroupOr,
+ kSubgroupXor,
kNone,
};
@@ -321,6 +324,9 @@
BuiltinFn::kSubgroupExclusiveAdd,
BuiltinFn::kSubgroupMul,
BuiltinFn::kSubgroupExclusiveMul,
+ BuiltinFn::kSubgroupAnd,
+ BuiltinFn::kSubgroupOr,
+ BuiltinFn::kSubgroupXor,
};
/// All builtin function names
@@ -451,6 +457,9 @@
"subgroupExclusiveAdd",
"subgroupMul",
"subgroupExclusiveMul",
+ "subgroupAnd",
+ "subgroupOr",
+ "subgroupXor",
};
/// Determines if the given `f` is a coarse derivative.
diff --git a/src/tint/lang/core/core.def b/src/tint/lang/core/core.def
index 8e5d7c2..dd40211 100644
--- a/src/tint/lang/core/core.def
+++ b/src/tint/lang/core/core.def
@@ -710,6 +710,12 @@
@must_use @stage("fragment", "compute") fn subgroupMul[N: num, T: fiu32_f16](value: vec<N, T>) -> vec<N, T>
@must_use @stage("fragment", "compute") fn subgroupExclusiveMul[T: fiu32_f16](value: T) -> T
@must_use @stage("fragment", "compute") fn subgroupExclusiveMul[N: num, T: fiu32_f16](value: vec<N, T>) -> vec<N, T>
+@must_use @stage("fragment", "compute") fn subgroupAnd[T: iu32](value: T) -> T
+@must_use @stage("fragment", "compute") fn subgroupAnd[N: num, T: iu32](value: vec<N, T>) -> vec<N, T>
+@must_use @stage("fragment", "compute") fn subgroupOr[T: iu32](value: T) -> T
+@must_use @stage("fragment", "compute") fn subgroupOr[N: num, T: iu32](value: vec<N, T>) -> vec<N, T>
+@must_use @stage("fragment", "compute") fn subgroupXor[T: iu32](value: T) -> T
+@must_use @stage("fragment", "compute") fn subgroupXor[N: num, T: iu32](value: vec<N, T>) -> vec<N, T>
////////////////////////////////////////////////////////////////////////////////
// Value constructors //
diff --git a/src/tint/lang/core/intrinsic/data.cc b/src/tint/lang/core/intrinsic/data.cc
index d3072b5..51f5c73 100644
--- a/src/tint/lang/core/intrinsic/data.cc
+++ b/src/tint/lang/core/intrinsic/data.cc
@@ -8887,6 +8887,28 @@
},
{
/* [409] */
+ /* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
+ /* num_parameters */ 1,
+ /* num_explicit_templates */ 0,
+ /* num_templates */ 1,
+ /* templates */ TemplateIndex(28),
+ /* parameters */ ParameterIndex(350),
+ /* return_matcher_indices */ MatcherIndicesIndex(3),
+ /* const_eval_fn */ ConstEvalFunctionIndex(/* invalid */),
+ },
+ {
+ /* [410] */
+ /* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
+ /* num_parameters */ 1,
+ /* num_explicit_templates */ 0,
+ /* num_templates */ 2,
+ /* templates */ TemplateIndex(27),
+ /* parameters */ ParameterIndex(352),
+ /* return_matcher_indices */ MatcherIndicesIndex(38),
+ /* const_eval_fn */ ConstEvalFunctionIndex(/* invalid */),
+ },
+ {
+ /* [411] */
/* flags */ OverloadFlags(OverloadFlag::kIsOperator, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -8897,7 +8919,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(81),
},
{
- /* [410] */
+ /* [412] */
/* flags */ OverloadFlags(OverloadFlag::kIsOperator, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -8908,7 +8930,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(81),
},
{
- /* [411] */
+ /* [413] */
/* flags */ OverloadFlags(OverloadFlag::kIsOperator, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -8919,40 +8941,40 @@
/* const_eval_fn */ ConstEvalFunctionIndex(82),
},
{
- /* [412] */
- /* flags */ OverloadFlags(OverloadFlag::kIsOperator, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
- /* num_parameters */ 1,
- /* num_explicit_templates */ 0,
- /* num_templates */ 2,
- /* templates */ TemplateIndex(42),
- /* parameters */ ParameterIndex(221),
- /* return_matcher_indices */ MatcherIndicesIndex(44),
- /* const_eval_fn */ ConstEvalFunctionIndex(82),
- },
- {
- /* [413] */
- /* flags */ OverloadFlags(OverloadFlag::kIsOperator, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
- /* num_parameters */ 1,
- /* num_explicit_templates */ 0,
- /* num_templates */ 1,
- /* templates */ TemplateIndex(36),
- /* parameters */ ParameterIndex(1),
- /* return_matcher_indices */ MatcherIndicesIndex(3),
- /* const_eval_fn */ ConstEvalFunctionIndex(83),
- },
- {
/* [414] */
/* flags */ OverloadFlags(OverloadFlag::kIsOperator, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
/* num_templates */ 2,
+ /* templates */ TemplateIndex(42),
+ /* parameters */ ParameterIndex(221),
+ /* return_matcher_indices */ MatcherIndicesIndex(44),
+ /* const_eval_fn */ ConstEvalFunctionIndex(82),
+ },
+ {
+ /* [415] */
+ /* flags */ OverloadFlags(OverloadFlag::kIsOperator, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
+ /* num_parameters */ 1,
+ /* num_explicit_templates */ 0,
+ /* num_templates */ 1,
+ /* templates */ TemplateIndex(36),
+ /* parameters */ ParameterIndex(1),
+ /* return_matcher_indices */ MatcherIndicesIndex(3),
+ /* const_eval_fn */ ConstEvalFunctionIndex(83),
+ },
+ {
+ /* [416] */
+ /* flags */ OverloadFlags(OverloadFlag::kIsOperator, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
+ /* num_parameters */ 1,
+ /* num_explicit_templates */ 0,
+ /* num_templates */ 2,
/* templates */ TemplateIndex(36),
/* parameters */ ParameterIndex(221),
/* return_matcher_indices */ MatcherIndicesIndex(44),
/* const_eval_fn */ ConstEvalFunctionIndex(83),
},
{
- /* [415] */
+ /* [417] */
/* flags */ OverloadFlags(OverloadFlag::kIsOperator, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 2,
/* num_explicit_templates */ 0,
@@ -8963,7 +8985,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(92),
},
{
- /* [416] */
+ /* [418] */
/* flags */ OverloadFlags(OverloadFlag::kIsOperator, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 2,
/* num_explicit_templates */ 0,
@@ -8974,28 +8996,6 @@
/* const_eval_fn */ ConstEvalFunctionIndex(92),
},
{
- /* [417] */
- /* flags */ OverloadFlags(OverloadFlag::kIsOperator, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
- /* num_parameters */ 2,
- /* num_explicit_templates */ 0,
- /* num_templates */ 1,
- /* templates */ TemplateIndex(32),
- /* parameters */ ParameterIndex(1),
- /* return_matcher_indices */ MatcherIndicesIndex(43),
- /* const_eval_fn */ ConstEvalFunctionIndex(97),
- },
- {
- /* [418] */
- /* flags */ OverloadFlags(OverloadFlag::kIsOperator, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
- /* num_parameters */ 2,
- /* num_explicit_templates */ 0,
- /* num_templates */ 2,
- /* templates */ TemplateIndex(32),
- /* parameters */ ParameterIndex(221),
- /* return_matcher_indices */ MatcherIndicesIndex(156),
- /* const_eval_fn */ ConstEvalFunctionIndex(97),
- },
- {
/* [419] */
/* flags */ OverloadFlags(OverloadFlag::kIsOperator, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 2,
@@ -9004,7 +9004,7 @@
/* templates */ TemplateIndex(32),
/* parameters */ ParameterIndex(1),
/* return_matcher_indices */ MatcherIndicesIndex(43),
- /* const_eval_fn */ ConstEvalFunctionIndex(98),
+ /* const_eval_fn */ ConstEvalFunctionIndex(97),
},
{
/* [420] */
@@ -9015,7 +9015,7 @@
/* templates */ TemplateIndex(32),
/* parameters */ ParameterIndex(221),
/* return_matcher_indices */ MatcherIndicesIndex(156),
- /* const_eval_fn */ ConstEvalFunctionIndex(98),
+ /* const_eval_fn */ ConstEvalFunctionIndex(97),
},
{
/* [421] */
@@ -9023,10 +9023,10 @@
/* num_parameters */ 2,
/* num_explicit_templates */ 0,
/* num_templates */ 1,
- /* templates */ TemplateIndex(26),
+ /* templates */ TemplateIndex(32),
/* parameters */ ParameterIndex(1),
/* return_matcher_indices */ MatcherIndicesIndex(43),
- /* const_eval_fn */ ConstEvalFunctionIndex(99),
+ /* const_eval_fn */ ConstEvalFunctionIndex(98),
},
{
/* [422] */
@@ -9034,10 +9034,10 @@
/* num_parameters */ 2,
/* num_explicit_templates */ 0,
/* num_templates */ 2,
- /* templates */ TemplateIndex(26),
+ /* templates */ TemplateIndex(32),
/* parameters */ ParameterIndex(221),
/* return_matcher_indices */ MatcherIndicesIndex(156),
- /* const_eval_fn */ ConstEvalFunctionIndex(99),
+ /* const_eval_fn */ ConstEvalFunctionIndex(98),
},
{
/* [423] */
@@ -9048,7 +9048,7 @@
/* templates */ TemplateIndex(26),
/* parameters */ ParameterIndex(1),
/* return_matcher_indices */ MatcherIndicesIndex(43),
- /* const_eval_fn */ ConstEvalFunctionIndex(100),
+ /* const_eval_fn */ ConstEvalFunctionIndex(99),
},
{
/* [424] */
@@ -9059,7 +9059,7 @@
/* templates */ TemplateIndex(26),
/* parameters */ ParameterIndex(221),
/* return_matcher_indices */ MatcherIndicesIndex(156),
- /* const_eval_fn */ ConstEvalFunctionIndex(100),
+ /* const_eval_fn */ ConstEvalFunctionIndex(99),
},
{
/* [425] */
@@ -9070,7 +9070,7 @@
/* templates */ TemplateIndex(26),
/* parameters */ ParameterIndex(1),
/* return_matcher_indices */ MatcherIndicesIndex(43),
- /* const_eval_fn */ ConstEvalFunctionIndex(101),
+ /* const_eval_fn */ ConstEvalFunctionIndex(100),
},
{
/* [426] */
@@ -9081,7 +9081,7 @@
/* templates */ TemplateIndex(26),
/* parameters */ ParameterIndex(221),
/* return_matcher_indices */ MatcherIndicesIndex(156),
- /* const_eval_fn */ ConstEvalFunctionIndex(101),
+ /* const_eval_fn */ ConstEvalFunctionIndex(100),
},
{
/* [427] */
@@ -9092,7 +9092,7 @@
/* templates */ TemplateIndex(26),
/* parameters */ ParameterIndex(1),
/* return_matcher_indices */ MatcherIndicesIndex(43),
- /* const_eval_fn */ ConstEvalFunctionIndex(102),
+ /* const_eval_fn */ ConstEvalFunctionIndex(101),
},
{
/* [428] */
@@ -9103,7 +9103,7 @@
/* templates */ TemplateIndex(26),
/* parameters */ ParameterIndex(221),
/* return_matcher_indices */ MatcherIndicesIndex(156),
- /* const_eval_fn */ ConstEvalFunctionIndex(102),
+ /* const_eval_fn */ ConstEvalFunctionIndex(101),
},
{
/* [429] */
@@ -9111,10 +9111,10 @@
/* num_parameters */ 2,
/* num_explicit_templates */ 0,
/* num_templates */ 1,
- /* templates */ TemplateIndex(28),
- /* parameters */ ParameterIndex(16),
- /* return_matcher_indices */ MatcherIndicesIndex(3),
- /* const_eval_fn */ ConstEvalFunctionIndex(103),
+ /* templates */ TemplateIndex(26),
+ /* parameters */ ParameterIndex(1),
+ /* return_matcher_indices */ MatcherIndicesIndex(43),
+ /* const_eval_fn */ ConstEvalFunctionIndex(102),
},
{
/* [430] */
@@ -9122,10 +9122,10 @@
/* num_parameters */ 2,
/* num_explicit_templates */ 0,
/* num_templates */ 2,
- /* templates */ TemplateIndex(42),
- /* parameters */ ParameterIndex(356),
- /* return_matcher_indices */ MatcherIndicesIndex(44),
- /* const_eval_fn */ ConstEvalFunctionIndex(103),
+ /* templates */ TemplateIndex(26),
+ /* parameters */ ParameterIndex(221),
+ /* return_matcher_indices */ MatcherIndicesIndex(156),
+ /* const_eval_fn */ ConstEvalFunctionIndex(102),
},
{
/* [431] */
@@ -9136,7 +9136,7 @@
/* templates */ TemplateIndex(28),
/* parameters */ ParameterIndex(16),
/* return_matcher_indices */ MatcherIndicesIndex(3),
- /* const_eval_fn */ ConstEvalFunctionIndex(104),
+ /* const_eval_fn */ ConstEvalFunctionIndex(103),
},
{
/* [432] */
@@ -9147,10 +9147,32 @@
/* templates */ TemplateIndex(42),
/* parameters */ ParameterIndex(356),
/* return_matcher_indices */ MatcherIndicesIndex(44),
- /* const_eval_fn */ ConstEvalFunctionIndex(104),
+ /* const_eval_fn */ ConstEvalFunctionIndex(103),
},
{
/* [433] */
+ /* flags */ OverloadFlags(OverloadFlag::kIsOperator, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
+ /* num_parameters */ 2,
+ /* num_explicit_templates */ 0,
+ /* num_templates */ 1,
+ /* templates */ TemplateIndex(28),
+ /* parameters */ ParameterIndex(16),
+ /* return_matcher_indices */ MatcherIndicesIndex(3),
+ /* const_eval_fn */ ConstEvalFunctionIndex(104),
+ },
+ {
+ /* [434] */
+ /* flags */ OverloadFlags(OverloadFlag::kIsOperator, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
+ /* num_parameters */ 2,
+ /* num_explicit_templates */ 0,
+ /* num_templates */ 2,
+ /* templates */ TemplateIndex(42),
+ /* parameters */ ParameterIndex(356),
+ /* return_matcher_indices */ MatcherIndicesIndex(44),
+ /* const_eval_fn */ ConstEvalFunctionIndex(104),
+ },
+ {
+ /* [435] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -9161,7 +9183,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(/* invalid */),
},
{
- /* [434] */
+ /* [436] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 2,
/* num_explicit_templates */ 0,
@@ -9172,7 +9194,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(17),
},
{
- /* [435] */
+ /* [437] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -9183,7 +9205,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(19),
},
{
- /* [436] */
+ /* [438] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 2,
/* num_explicit_templates */ 0,
@@ -9194,7 +9216,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(21),
},
{
- /* [437] */
+ /* [439] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 2,
/* num_explicit_templates */ 0,
@@ -9205,7 +9227,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(22),
},
{
- /* [438] */
+ /* [440] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 2,
/* num_explicit_templates */ 0,
@@ -9216,7 +9238,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(23),
},
{
- /* [439] */
+ /* [441] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 3,
/* num_explicit_templates */ 0,
@@ -9227,7 +9249,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(27),
},
{
- /* [440] */
+ /* [442] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -9238,7 +9260,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(44),
},
{
- /* [441] */
+ /* [443] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -9249,7 +9271,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(45),
},
{
- /* [442] */
+ /* [444] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -9260,7 +9282,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(46),
},
{
- /* [443] */
+ /* [445] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -9271,7 +9293,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(47),
},
{
- /* [444] */
+ /* [446] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -9282,7 +9304,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(48),
},
{
- /* [445] */
+ /* [447] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -9293,7 +9315,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(49),
},
{
- /* [446] */
+ /* [448] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -9304,7 +9326,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(50),
},
{
- /* [447] */
+ /* [449] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -9315,7 +9337,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(51),
},
{
- /* [448] */
+ /* [450] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -9326,7 +9348,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(52),
},
{
- /* [449] */
+ /* [451] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -9337,7 +9359,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(53),
},
{
- /* [450] */
+ /* [452] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 2,
/* num_explicit_templates */ 0,
@@ -9348,7 +9370,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(57),
},
{
- /* [451] */
+ /* [453] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 3,
/* num_explicit_templates */ 0,
@@ -9359,7 +9381,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(58),
},
{
- /* [452] */
+ /* [454] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsComputePipeline),
/* num_parameters */ 0,
/* num_explicit_templates */ 0,
@@ -9370,7 +9392,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(/* invalid */),
},
{
- /* [453] */
+ /* [455] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -9381,7 +9403,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(72),
},
{
- /* [454] */
+ /* [456] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -9392,7 +9414,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(74),
},
{
- /* [455] */
+ /* [457] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -9403,7 +9425,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(75),
},
{
- /* [456] */
+ /* [458] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -9414,7 +9436,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(76),
},
{
- /* [457] */
+ /* [459] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -9425,7 +9447,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(77),
},
{
- /* [458] */
+ /* [460] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -9436,7 +9458,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(78),
},
{
- /* [459] */
+ /* [461] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -9447,7 +9469,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(79),
},
{
- /* [460] */
+ /* [462] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -9458,7 +9480,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(80),
},
{
- /* [461] */
+ /* [463] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsFragmentPipeline),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -9469,31 +9491,9 @@
/* const_eval_fn */ ConstEvalFunctionIndex(/* invalid */),
},
{
- /* [462] */
- /* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline),
- /* num_parameters */ 1,
- /* num_explicit_templates */ 0,
- /* num_templates */ 2,
- /* templates */ TemplateIndex(28),
- /* parameters */ ParameterIndex(0),
- /* return_matcher_indices */ MatcherIndicesIndex(3),
- /* const_eval_fn */ ConstEvalFunctionIndex(/* invalid */),
- },
- {
- /* [463] */
- /* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline),
- /* num_parameters */ 2,
- /* num_explicit_templates */ 0,
- /* num_templates */ 2,
- /* templates */ TemplateIndex(28),
- /* parameters */ ParameterIndex(0),
- /* return_matcher_indices */ MatcherIndicesIndex(/* invalid */),
- /* const_eval_fn */ ConstEvalFunctionIndex(/* invalid */),
- },
- {
/* [464] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline),
- /* num_parameters */ 2,
+ /* num_parameters */ 1,
/* num_explicit_templates */ 0,
/* num_templates */ 2,
/* templates */ TemplateIndex(28),
@@ -9504,6 +9504,28 @@
{
/* [465] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline),
+ /* num_parameters */ 2,
+ /* num_explicit_templates */ 0,
+ /* num_templates */ 2,
+ /* templates */ TemplateIndex(28),
+ /* parameters */ ParameterIndex(0),
+ /* return_matcher_indices */ MatcherIndicesIndex(/* invalid */),
+ /* const_eval_fn */ ConstEvalFunctionIndex(/* invalid */),
+ },
+ {
+ /* [466] */
+ /* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline),
+ /* num_parameters */ 2,
+ /* num_explicit_templates */ 0,
+ /* num_templates */ 2,
+ /* templates */ TemplateIndex(28),
+ /* parameters */ ParameterIndex(0),
+ /* return_matcher_indices */ MatcherIndicesIndex(3),
+ /* const_eval_fn */ ConstEvalFunctionIndex(/* invalid */),
+ },
+ {
+ /* [467] */
+ /* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline),
/* num_parameters */ 3,
/* num_explicit_templates */ 0,
/* num_templates */ 2,
@@ -9513,7 +9535,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(/* invalid */),
},
{
- /* [466] */
+ /* [468] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -9524,7 +9546,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(/* invalid */),
},
{
- /* [467] */
+ /* [469] */
/* flags */ OverloadFlags(OverloadFlag::kIsOperator, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 2,
/* num_explicit_templates */ 0,
@@ -9535,7 +9557,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(95),
},
{
- /* [468] */
+ /* [470] */
/* flags */ OverloadFlags(OverloadFlag::kIsOperator, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 2,
/* num_explicit_templates */ 0,
@@ -9590,7 +9612,7 @@
/* [5] */
/* fn arrayLength[T, A : access](ptr<storage, array<T>, A>) -> u32 */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(433),
+ /* overloads */ OverloadIndex(435),
},
{
/* [6] */
@@ -9680,7 +9702,7 @@
/* [18] */
/* fn cross[T : f32_f16](vec3<T>, vec3<T>) -> vec3<T> */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(434),
+ /* overloads */ OverloadIndex(436),
},
{
/* [19] */
@@ -9693,7 +9715,7 @@
/* [20] */
/* fn determinant[N : num, T : f32_f16](mat<N, N, T>) -> T */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(435),
+ /* overloads */ OverloadIndex(437),
},
{
/* [21] */
@@ -9706,19 +9728,19 @@
/* [22] */
/* fn dot[N : num, T : fiu32_f16](vec<N, T>, vec<N, T>) -> T */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(436),
+ /* overloads */ OverloadIndex(438),
},
{
/* [23] */
/* fn dot4I8Packed(u32, u32) -> i32 */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(437),
+ /* overloads */ OverloadIndex(439),
},
{
/* [24] */
/* fn dot4U8Packed(u32, u32) -> u32 */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(438),
+ /* overloads */ OverloadIndex(440),
},
{
/* [25] */
@@ -9787,7 +9809,7 @@
/* [34] */
/* fn faceForward[N : num, T : f32_f16](vec<N, T>, vec<N, T>, vec<N, T>) -> vec<N, T> */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(439),
+ /* overloads */ OverloadIndex(441),
},
{
/* [35] */
@@ -9927,61 +9949,61 @@
/* [54] */
/* fn normalize[N : num, T : f32_f16](vec<N, T>) -> vec<N, T> */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(440),
+ /* overloads */ OverloadIndex(442),
},
{
/* [55] */
/* fn pack2x16float(vec2<f32>) -> u32 */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(441),
+ /* overloads */ OverloadIndex(443),
},
{
/* [56] */
/* fn pack2x16snorm(vec2<f32>) -> u32 */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(442),
+ /* overloads */ OverloadIndex(444),
},
{
/* [57] */
/* fn pack2x16unorm(vec2<f32>) -> u32 */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(443),
+ /* overloads */ OverloadIndex(445),
},
{
/* [58] */
/* fn pack4x8snorm(vec4<f32>) -> u32 */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(444),
+ /* overloads */ OverloadIndex(446),
},
{
/* [59] */
/* fn pack4x8unorm(vec4<f32>) -> u32 */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(445),
+ /* overloads */ OverloadIndex(447),
},
{
/* [60] */
/* fn pack4xI8(vec4<i32>) -> u32 */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(446),
+ /* overloads */ OverloadIndex(448),
},
{
/* [61] */
/* fn pack4xU8(vec4<u32>) -> u32 */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(447),
+ /* overloads */ OverloadIndex(449),
},
{
/* [62] */
/* fn pack4xI8Clamp(vec4<i32>) -> u32 */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(448),
+ /* overloads */ OverloadIndex(450),
},
{
/* [63] */
/* fn pack4xU8Clamp(vec4<u32>) -> u32 */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(449),
+ /* overloads */ OverloadIndex(451),
},
{
/* [64] */
@@ -10008,13 +10030,13 @@
/* [67] */
/* fn reflect[N : num, T : f32_f16](vec<N, T>, vec<N, T>) -> vec<N, T> */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(450),
+ /* overloads */ OverloadIndex(452),
},
{
/* [68] */
/* fn refract[N : num, T : f32_f16](vec<N, T>, vec<N, T>, T) -> vec<N, T> */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(451),
+ /* overloads */ OverloadIndex(453),
},
{
/* [69] */
@@ -10091,7 +10113,7 @@
/* [79] */
/* fn storageBarrier() */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(452),
+ /* overloads */ OverloadIndex(454),
},
{
/* [80] */
@@ -10111,7 +10133,7 @@
/* [82] */
/* fn transpose[M : num, N : num, T : f32_f16](mat<M, N, T>) -> mat<N, M, T> */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(453),
+ /* overloads */ OverloadIndex(455),
},
{
/* [83] */
@@ -10124,55 +10146,55 @@
/* [84] */
/* fn unpack2x16float(u32) -> vec2<f32> */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(454),
+ /* overloads */ OverloadIndex(456),
},
{
/* [85] */
/* fn unpack2x16snorm(u32) -> vec2<f32> */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(455),
+ /* overloads */ OverloadIndex(457),
},
{
/* [86] */
/* fn unpack2x16unorm(u32) -> vec2<f32> */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(456),
+ /* overloads */ OverloadIndex(458),
},
{
/* [87] */
/* fn unpack4x8snorm(u32) -> vec4<f32> */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(457),
+ /* overloads */ OverloadIndex(459),
},
{
/* [88] */
/* fn unpack4x8unorm(u32) -> vec4<f32> */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(458),
+ /* overloads */ OverloadIndex(460),
},
{
/* [89] */
/* fn unpack4xI8(u32) -> vec4<i32> */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(459),
+ /* overloads */ OverloadIndex(461),
},
{
/* [90] */
/* fn unpack4xU8(u32) -> vec4<u32> */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(460),
+ /* overloads */ OverloadIndex(462),
},
{
/* [91] */
/* fn workgroupBarrier() */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(452),
+ /* overloads */ OverloadIndex(454),
},
{
/* [92] */
/* fn textureBarrier() */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(452),
+ /* overloads */ OverloadIndex(454),
},
{
/* [93] */
@@ -10407,79 +10429,79 @@
/* [108] */
/* fn inputAttachmentLoad[T : fiu32](input_attachment: input_attachment<T>) -> vec4<T> */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(461),
+ /* overloads */ OverloadIndex(463),
},
{
/* [109] */
/* fn atomicLoad[T : iu32, S : workgroup_or_storage](ptr<S, atomic<T>, read_write>) -> T */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(462),
+ /* overloads */ OverloadIndex(464),
},
{
/* [110] */
/* fn atomicStore[T : iu32, S : workgroup_or_storage](ptr<S, atomic<T>, read_write>, T) */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(463),
+ /* overloads */ OverloadIndex(465),
},
{
/* [111] */
/* fn atomicAdd[T : iu32, S : workgroup_or_storage](ptr<S, atomic<T>, read_write>, T) -> T */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(464),
+ /* overloads */ OverloadIndex(466),
},
{
/* [112] */
/* fn atomicSub[T : iu32, S : workgroup_or_storage](ptr<S, atomic<T>, read_write>, T) -> T */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(464),
+ /* overloads */ OverloadIndex(466),
},
{
/* [113] */
/* fn atomicMax[T : iu32, S : workgroup_or_storage](ptr<S, atomic<T>, read_write>, T) -> T */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(464),
+ /* overloads */ OverloadIndex(466),
},
{
/* [114] */
/* fn atomicMin[T : iu32, S : workgroup_or_storage](ptr<S, atomic<T>, read_write>, T) -> T */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(464),
+ /* overloads */ OverloadIndex(466),
},
{
/* [115] */
/* fn atomicAnd[T : iu32, S : workgroup_or_storage](ptr<S, atomic<T>, read_write>, T) -> T */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(464),
+ /* overloads */ OverloadIndex(466),
},
{
/* [116] */
/* fn atomicOr[T : iu32, S : workgroup_or_storage](ptr<S, atomic<T>, read_write>, T) -> T */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(464),
+ /* overloads */ OverloadIndex(466),
},
{
/* [117] */
/* fn atomicXor[T : iu32, S : workgroup_or_storage](ptr<S, atomic<T>, read_write>, T) -> T */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(464),
+ /* overloads */ OverloadIndex(466),
},
{
/* [118] */
/* fn atomicExchange[T : iu32, S : workgroup_or_storage](ptr<S, atomic<T>, read_write>, T) -> T */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(464),
+ /* overloads */ OverloadIndex(466),
},
{
/* [119] */
/* fn atomicCompareExchangeWeak[T : iu32, S : workgroup_or_storage](ptr<S, atomic<T>, read_write>, T, T) -> __atomic_compare_exchange_result<T> */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(465),
+ /* overloads */ OverloadIndex(467),
},
{
/* [120] */
/* fn subgroupBallot(bool) -> vec4<u32> */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(466),
+ /* overloads */ OverloadIndex(468),
},
{
/* [121] */
@@ -10516,6 +10538,27 @@
/* num overloads */ 2,
/* overloads */ OverloadIndex(407),
},
+ {
+ /* [126] */
+ /* fn subgroupAnd[T : iu32](value: T) -> T */
+ /* fn subgroupAnd[N : num, T : iu32](value: vec<N, T>) -> vec<N, T> */
+ /* num overloads */ 2,
+ /* overloads */ OverloadIndex(409),
+ },
+ {
+ /* [127] */
+ /* fn subgroupOr[T : iu32](value: T) -> T */
+ /* fn subgroupOr[N : num, T : iu32](value: vec<N, T>) -> vec<N, T> */
+ /* num overloads */ 2,
+ /* overloads */ OverloadIndex(409),
+ },
+ {
+ /* [128] */
+ /* fn subgroupXor[T : iu32](value: T) -> T */
+ /* fn subgroupXor[N : num, T : iu32](value: vec<N, T>) -> vec<N, T> */
+ /* num overloads */ 2,
+ /* overloads */ OverloadIndex(409),
+ },
};
constexpr IntrinsicInfo kUnaryOperators[] = {
@@ -10524,21 +10567,21 @@
/* op !(bool) -> bool */
/* op  -> vec<N, bool> */
/* num overloads */ 2,
- /* overloads */ OverloadIndex(409),
+ /* overloads */ OverloadIndex(411),
},
{
/* [1] */
/* op ~[T : iu32](T) -> T */
/* op ~[T : iu32, N : num](vec<N, T>) -> vec<N, T> */
/* num overloads */ 2,
- /* overloads */ OverloadIndex(411),
+ /* overloads */ OverloadIndex(413),
},
{
/* [2] */
/* op -[T : fi32_f16](T) -> T */
/* op -[T : fi32_f16, N : num](vec<N, T>) -> vec<N, T> */
/* num overloads */ 2,
- /* overloads */ OverloadIndex(413),
+ /* overloads */ OverloadIndex(415),
},
};
constexpr uint8_t kUnaryOperatorNot = 0;
@@ -10603,7 +10646,7 @@
/* op ^[T : iu32](T, T) -> T */
/* op ^[T : iu32, N : num](vec<N, T>, vec<N, T>) -> vec<N, T> */
/* num overloads */ 2,
- /* overloads */ OverloadIndex(415),
+ /* overloads */ OverloadIndex(417),
},
{
/* [6] */
@@ -10627,69 +10670,69 @@
/* [8] */
/* op &&(bool, bool) -> bool */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(467),
+ /* overloads */ OverloadIndex(469),
},
{
/* [9] */
/* op ||(bool, bool) -> bool */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(468),
+ /* overloads */ OverloadIndex(470),
},
{
/* [10] */
/* op ==[T : scalar](T, T) -> bool */
/* op ==[T : scalar, N : num](vec<N, T>, vec<N, T>) -> vec<N, bool> */
/* num overloads */ 2,
- /* overloads */ OverloadIndex(417),
+ /* overloads */ OverloadIndex(419),
},
{
/* [11] */
/* op !=[T : scalar](T, T) -> bool */
/* op !=[T : scalar, N : num](vec<N, T>, vec<N, T>) -> vec<N, bool> */
/* num overloads */ 2,
- /* overloads */ OverloadIndex(419),
+ /* overloads */ OverloadIndex(421),
},
{
/* [12] */
/* op <[T : fiu32_f16](T, T) -> bool */
/* op <[T : fiu32_f16, N : num](vec<N, T>, vec<N, T>) -> vec<N, bool> */
/* num overloads */ 2,
- /* overloads */ OverloadIndex(421),
+ /* overloads */ OverloadIndex(423),
},
{
/* [13] */
/* op >[T : fiu32_f16](T, T) -> bool */
/* op >[T : fiu32_f16, N : num](vec<N, T>, vec<N, T>) -> vec<N, bool> */
/* num overloads */ 2,
- /* overloads */ OverloadIndex(423),
+ /* overloads */ OverloadIndex(425),
},
{
/* [14] */
/* op <=[T : fiu32_f16](T, T) -> bool */
/* op <=[T : fiu32_f16, N : num](vec<N, T>, vec<N, T>) -> vec<N, bool> */
/* num overloads */ 2,
- /* overloads */ OverloadIndex(425),
+ /* overloads */ OverloadIndex(427),
},
{
/* [15] */
/* op >=[T : fiu32_f16](T, T) -> bool */
/* op >=[T : fiu32_f16, N : num](vec<N, T>, vec<N, T>) -> vec<N, bool> */
/* num overloads */ 2,
- /* overloads */ OverloadIndex(427),
+ /* overloads */ OverloadIndex(429),
},
{
/* [16] */
/* op <<[T : iu32](T, u32) -> T */
/* op <<[T : iu32, N : num](vec<N, T>, vec<N, u32>) -> vec<N, T> */
/* num overloads */ 2,
- /* overloads */ OverloadIndex(429),
+ /* overloads */ OverloadIndex(431),
},
{
/* [17] */
/* op >>[T : iu32](T, u32) -> T */
/* op >>[T : iu32, N : num](vec<N, T>, vec<N, u32>) -> vec<N, T> */
/* num overloads */ 2,
- /* overloads */ OverloadIndex(431),
+ /* overloads */ OverloadIndex(433),
},
};
constexpr uint8_t kBinaryOperatorPlus = 0;
diff --git a/src/tint/lang/core/ir/binary/decode.cc b/src/tint/lang/core/ir/binary/decode.cc
index bc43946..30c2447 100644
--- a/src/tint/lang/core/ir/binary/decode.cc
+++ b/src/tint/lang/core/ir/binary/decode.cc
@@ -1637,6 +1637,12 @@
return core::BuiltinFn::kSubgroupMul;
case pb::BuiltinFn::subgroup_exclusive_mul:
return core::BuiltinFn::kSubgroupExclusiveMul;
+ case pb::BuiltinFn::subgroup_and:
+ return core::BuiltinFn::kSubgroupAnd;
+ case pb::BuiltinFn::subgroup_or:
+ return core::BuiltinFn::kSubgroupOr;
+ case pb::BuiltinFn::subgroup_xor:
+ return core::BuiltinFn::kSubgroupXor;
case pb::BuiltinFn::BuiltinFn_INT_MIN_SENTINEL_DO_NOT_USE_:
case pb::BuiltinFn::BuiltinFn_INT_MAX_SENTINEL_DO_NOT_USE_:
diff --git a/src/tint/lang/core/ir/binary/encode.cc b/src/tint/lang/core/ir/binary/encode.cc
index e6ce605..af0b13c 100644
--- a/src/tint/lang/core/ir/binary/encode.cc
+++ b/src/tint/lang/core/ir/binary/encode.cc
@@ -1149,6 +1149,12 @@
return pb::BuiltinFn::subgroup_mul;
case core::BuiltinFn::kSubgroupExclusiveMul:
return pb::BuiltinFn::subgroup_exclusive_mul;
+ case core::BuiltinFn::kSubgroupAnd:
+ return pb::BuiltinFn::subgroup_and;
+ case core::BuiltinFn::kSubgroupOr:
+ return pb::BuiltinFn::subgroup_or;
+ case core::BuiltinFn::kSubgroupXor:
+ return pb::BuiltinFn::subgroup_xor;
case core::BuiltinFn::kNone:
break;
}
diff --git a/src/tint/lang/hlsl/writer/ast_printer/ast_printer.cc b/src/tint/lang/hlsl/writer/ast_printer/ast_printer.cc
index a67cceb..cd9c3d9 100644
--- a/src/tint/lang/hlsl/writer/ast_printer/ast_printer.cc
+++ b/src/tint/lang/hlsl/writer/ast_printer/ast_printer.cc
@@ -1263,12 +1263,36 @@
return false;
}
- // Handle single argument builtins that only accept and return uint (not int overload). We need
- // to explicitly cast the return value (we also cast the arg for good measure). See
- // crbug.com/tint/1550
- if (type == wgsl::BuiltinFn::kCountOneBits || type == wgsl::BuiltinFn::kReverseBits) {
+ // Handle single argument builtins that only accept and return uint (not int overload).
+ // For count bits and reverse bits, we need to explicitly cast the return value (we also cast
+ // the arg for good measure). See crbug.com/tint/1550.
+ // For the following subgroup builtins, the lack of support may be a bug in DXC. See
+ // github.com/microsoft/DirectXShaderCompiler/issues/6850.
+ if (type == wgsl::BuiltinFn::kCountOneBits || type == wgsl::BuiltinFn::kReverseBits ||
+ type == wgsl::BuiltinFn::kSubgroupAnd || type == wgsl::BuiltinFn::kSubgroupOr ||
+ type == wgsl::BuiltinFn::kSubgroupXor) {
auto* arg = call->Arguments()[0];
- if (arg->Type()->UnwrapRef()->is_signed_integer_scalar_or_vector()) {
+ auto* argType = arg->Type()->UnwrapRef();
+ if (argType->is_signed_integer_scalar_or_vector()) {
+ // Bitcast of literal int vectors fails in DXC so extract arg to a var. See
+ // github.com/microsoft/DirectXShaderCompiler/issues/6851.
+ if (argType->is_signed_integer_vector() &&
+ arg->Stage() == core::EvaluationStage::kConstant) {
+ auto varName = UniqueIdentifier(kTempNamePrefix);
+ auto pre = Line();
+ if (!EmitTypeAndName(pre, argType, core::AddressSpace::kUndefined,
+ core::Access::kUndefined, varName)) {
+ return false;
+ }
+ pre << " = ";
+ if (!EmitExpression(pre, arg->Declaration())) {
+ return false;
+ }
+ pre << ";";
+ out << "asint(" << name << "(asuint(" << varName << ")))";
+ return true;
+ }
+
out << "asint(" << name << "(asuint(";
if (!EmitExpression(out, arg->Declaration())) {
return false;
@@ -3082,6 +3106,12 @@
return "WaveActiveProduct";
case wgsl::BuiltinFn::kSubgroupExclusiveMul:
return "WavePrefixProduct";
+ case wgsl::BuiltinFn::kSubgroupAnd:
+ return "WaveActiveBitAnd";
+ case wgsl::BuiltinFn::kSubgroupOr:
+ return "WaveActiveBitOr";
+ case wgsl::BuiltinFn::kSubgroupXor:
+ return "WaveActiveBitXor";
default:
diagnostics_.AddError(Source{}) << "Unknown builtin method: " << builtin->str();
}
diff --git a/src/tint/lang/hlsl/writer/printer/printer.cc b/src/tint/lang/hlsl/writer/printer/printer.cc
index 15d640c..ccda7e0 100644
--- a/src/tint/lang/hlsl/writer/printer/printer.cc
+++ b/src/tint/lang/hlsl/writer/printer/printer.cc
@@ -1017,7 +1017,15 @@
case core::BuiltinFn::kSubgroupExclusiveMul:
out << "WavePrefixProduct";
break;
-
+ case core::BuiltinFn::kSubgroupAnd:
+ out << "WaveActiveBitAnd";
+ break;
+ case core::BuiltinFn::kSubgroupOr:
+ out << "WaveActiveBitOr";
+ break;
+ case core::BuiltinFn::kSubgroupXor:
+ out << "WaveActiveBitXor";
+ break;
default:
TINT_UNREACHABLE() << "unhandled: " << func;
}
diff --git a/src/tint/lang/hlsl/writer/raise/builtin_polyfill.cc b/src/tint/lang/hlsl/writer/raise/builtin_polyfill.cc
index 2796ee5..742702c 100644
--- a/src/tint/lang/hlsl/writer/raise/builtin_polyfill.cc
+++ b/src/tint/lang/hlsl/writer/raise/builtin_polyfill.cc
@@ -116,6 +116,9 @@
case core::BuiltinFn::kReverseBits:
case core::BuiltinFn::kSelect:
case core::BuiltinFn::kSign:
+ case core::BuiltinFn::kSubgroupAnd:
+ case core::BuiltinFn::kSubgroupOr:
+ case core::BuiltinFn::kSubgroupXor:
case core::BuiltinFn::kTextureDimensions:
case core::BuiltinFn::kTextureGather:
case core::BuiltinFn::kTextureGatherCompare:
@@ -254,6 +257,11 @@
case core::BuiltinFn::kSign:
Sign(call);
break;
+ case core::BuiltinFn::kSubgroupAnd:
+ case core::BuiltinFn::kSubgroupOr:
+ case core::BuiltinFn::kSubgroupXor:
+ BitcastToIntOverloadCall(call);
+ break;
case core::BuiltinFn::kTextureDimensions:
TextureDimensions(call);
break;
@@ -1714,12 +1722,19 @@
void BitcastToIntOverloadCall(core::ir::CoreBuiltinCall* call) {
TINT_ASSERT(call->Args().Length() == 1);
auto* arg = call->Args()[0];
- if (arg->Type()->UnwrapRef()->is_signed_integer_scalar_or_vector()) {
+ auto* arg_type = arg->Type()->UnwrapRef();
+ if (arg_type->is_signed_integer_scalar_or_vector()) {
auto* result_ty = call->Result(0)->Type();
auto* u32_type = ty.match_width(ty.u32(), result_ty);
b.InsertBefore(call, [&] {
+ core::ir::Value* val = arg;
+ // Bitcast of literal int vectors fails in DXC so extract arg to a var. See
+ // github.com/microsoft/DirectXShaderCompiler/issues/6851.
+ if (arg_type->is_signed_integer_vector() && arg->Is<core::ir::Constant>()) {
+ val = b.Let("arg", arg)->Result(0);
+ }
auto* inner =
- b.Call<hlsl::ir::BuiltinCall>(u32_type, hlsl::BuiltinFn::kAsuint, arg);
+ b.Call<hlsl::ir::BuiltinCall>(u32_type, hlsl::BuiltinFn::kAsuint, val);
auto* func = b.Call(u32_type, call->Func(), inner);
b.CallWithResult<hlsl::ir::BuiltinCall>(call->DetachResult(),
hlsl::BuiltinFn::kAsint, func);
diff --git a/src/tint/lang/hlsl/writer/raise/builtin_polyfill_test.cc b/src/tint/lang/hlsl/writer/raise/builtin_polyfill_test.cc
index 6dac993..f2ffe16 100644
--- a/src/tint/lang/hlsl/writer/raise/builtin_polyfill_test.cc
+++ b/src/tint/lang/hlsl/writer/raise/builtin_polyfill_test.cc
@@ -6923,5 +6923,40 @@
EXPECT_EQ(expect, str());
}
+TEST_F(HlslWriter_BuiltinPolyfillTest, SubgroupAndLiteralVec) {
+ auto* func = b.Function("foo", ty.void_(), core::ir::Function::PipelineStage::kFragment);
+ b.Append(func->Block(), [&] {
+ b.Let("a", b.Call(ty.vec3<i32>(), core::BuiltinFn::kSubgroupAnd,
+ b.Composite(ty.vec3<i32>(), 1_i, 1_i, 1_i)));
+ b.Return(func);
+ });
+
+ auto* src = R"(
+%foo = @fragment func():void {
+ $B1: {
+ %2:vec3<i32> = subgroupAnd vec3<i32>(1i)
+ %a:vec3<i32> = let %2
+ ret
+ }
+}
+)";
+ ASSERT_EQ(src, str());
+
+ auto* expect = R"(
+%foo = @fragment func():void {
+ $B1: {
+ %arg:vec3<i32> = let vec3<i32>(1i)
+ %3:vec3<u32> = hlsl.asuint %arg
+ %4:vec3<u32> = subgroupAnd %3
+ %5:vec3<i32> = hlsl.asint %4
+ %a:vec3<i32> = let %5
+ ret
+ }
+}
+)";
+ Run(BuiltinPolyfill);
+ EXPECT_EQ(expect, str());
+}
+
} // namespace
} // namespace tint::hlsl::writer::raise
diff --git a/src/tint/lang/msl/writer/ast_printer/ast_printer.cc b/src/tint/lang/msl/writer/ast_printer/ast_printer.cc
index e4b7a10..784adf8 100644
--- a/src/tint/lang/msl/writer/ast_printer/ast_printer.cc
+++ b/src/tint/lang/msl/writer/ast_printer/ast_printer.cc
@@ -841,6 +841,33 @@
return true;
}
+ case wgsl::BuiltinFn::kSubgroupAnd: {
+ out << "simd_and(";
+ if (!EmitExpression(out, expr->args[0])) {
+ return false;
+ }
+ out << ")";
+ return true;
+ }
+
+ case wgsl::BuiltinFn::kSubgroupOr: {
+ out << "simd_or(";
+ if (!EmitExpression(out, expr->args[0])) {
+ return false;
+ }
+ out << ")";
+ return true;
+ }
+
+ case wgsl::BuiltinFn::kSubgroupXor: {
+ out << "simd_xor(";
+ if (!EmitExpression(out, expr->args[0])) {
+ return false;
+ }
+ out << ")";
+ return true;
+ }
+
default:
break;
}
diff --git a/src/tint/lang/msl/writer/printer/printer.cc b/src/tint/lang/msl/writer/printer/printer.cc
index a36dd02..1ba5fd7 100644
--- a/src/tint/lang/msl/writer/printer/printer.cc
+++ b/src/tint/lang/msl/writer/printer/printer.cc
@@ -991,6 +991,15 @@
case core::BuiltinFn::kSubgroupExclusiveMul:
out << "simd_prefix_exclusive_product";
break;
+ case core::BuiltinFn::kSubgroupAnd:
+ out << "simd_and";
+ break;
+ case core::BuiltinFn::kSubgroupOr:
+ out << "simd_or";
+ break;
+ case core::BuiltinFn::kSubgroupXor:
+ out << "simd_xor";
+ break;
case core::BuiltinFn::kInverseSqrt:
out << "rsqrt";
break;
diff --git a/src/tint/lang/spirv/writer/ast_printer/builder.cc b/src/tint/lang/spirv/writer/ast_printer/builder.cc
index 0b46db8..45de8ff 100644
--- a/src/tint/lang/spirv/writer/ast_printer/builder.cc
+++ b/src/tint/lang/spirv/writer/ast_printer/builder.cc
@@ -2568,9 +2568,12 @@
case wgsl::BuiltinFn::kSubgroupAdd:
case wgsl::BuiltinFn::kSubgroupExclusiveAdd:
case wgsl::BuiltinFn::kSubgroupMul:
- case wgsl::BuiltinFn::kSubgroupExclusiveMul: {
- // TODO(crbug.com/354738715): Implement more subgroup builtins. Adding this explicit
- // failure in the intermediary CL to avoid a new ICE that can get caught by the fuzzers.
+ case wgsl::BuiltinFn::kSubgroupExclusiveMul:
+ case wgsl::BuiltinFn::kSubgroupAnd:
+ case wgsl::BuiltinFn::kSubgroupOr:
+ case wgsl::BuiltinFn::kSubgroupXor: {
+ // This file should be removed soon with the SPIR-V AST backend, but in the meantime we
+ // need this explicit failure to avoid a new ICE that can get caught by the fuzzers.
return 0;
}
default: {
diff --git a/src/tint/lang/spirv/writer/printer/printer.cc b/src/tint/lang/spirv/writer/printer/printer.cc
index a728558..a31e264 100644
--- a/src/tint/lang/spirv/writer/printer/printer.cc
+++ b/src/tint/lang/spirv/writer/printer/printer.cc
@@ -1686,6 +1686,24 @@
op = spv::Op::OpGroupNonUniformBroadcast;
operands.push_back(Constant(ir_.constant_values.Get(u32(spv::Scope::Subgroup))));
break;
+ case core::BuiltinFn::kSubgroupAnd:
+ module_.PushCapability(SpvCapabilityGroupNonUniformArithmetic);
+ op = spv::Op::OpGroupNonUniformBitwiseAnd;
+ operands.push_back(Constant(ir_.constant_values.Get(u32(spv::Scope::Subgroup))));
+ operands.push_back(U32Operand(u32(spv::GroupOperation::Reduce)));
+ break;
+ case core::BuiltinFn::kSubgroupOr:
+ module_.PushCapability(SpvCapabilityGroupNonUniformArithmetic);
+ op = spv::Op::OpGroupNonUniformBitwiseOr;
+ operands.push_back(Constant(ir_.constant_values.Get(u32(spv::Scope::Subgroup))));
+ operands.push_back(U32Operand(u32(spv::GroupOperation::Reduce)));
+ break;
+ case core::BuiltinFn::kSubgroupXor:
+ module_.PushCapability(SpvCapabilityGroupNonUniformArithmetic);
+ op = spv::Op::OpGroupNonUniformBitwiseXor;
+ operands.push_back(Constant(ir_.constant_values.Get(u32(spv::Scope::Subgroup))));
+ operands.push_back(U32Operand(u32(spv::GroupOperation::Reduce)));
+ break;
case core::BuiltinFn::kTan:
glsl_ext_inst(GLSLstd450Tan);
break;
diff --git a/src/tint/lang/wgsl/builtin_fn.cc b/src/tint/lang/wgsl/builtin_fn.cc
index 26bf650..1bad377 100644
--- a/src/tint/lang/wgsl/builtin_fn.cc
+++ b/src/tint/lang/wgsl/builtin_fn.cc
@@ -423,6 +423,15 @@
if (name == "subgroupExclusiveMul") {
return BuiltinFn::kSubgroupExclusiveMul;
}
+ if (name == "subgroupAnd") {
+ return BuiltinFn::kSubgroupAnd;
+ }
+ if (name == "subgroupOr") {
+ return BuiltinFn::kSubgroupOr;
+ }
+ if (name == "subgroupXor") {
+ return BuiltinFn::kSubgroupXor;
+ }
if (name == "__tint_materialize") {
return BuiltinFn::kTintMaterialize;
}
@@ -689,6 +698,12 @@
return "subgroupMul";
case BuiltinFn::kSubgroupExclusiveMul:
return "subgroupExclusiveMul";
+ case BuiltinFn::kSubgroupAnd:
+ return "subgroupAnd";
+ case BuiltinFn::kSubgroupOr:
+ return "subgroupOr";
+ case BuiltinFn::kSubgroupXor:
+ return "subgroupXor";
case BuiltinFn::kTintMaterialize:
return "__tint_materialize";
}
@@ -769,6 +784,9 @@
case BuiltinFn::kSubgroupExclusiveAdd:
case BuiltinFn::kSubgroupMul:
case BuiltinFn::kSubgroupExclusiveMul:
+ case BuiltinFn::kSubgroupAnd:
+ case BuiltinFn::kSubgroupOr:
+ case BuiltinFn::kSubgroupXor:
return true;
default:
return false;
diff --git a/src/tint/lang/wgsl/builtin_fn.cc.tmpl b/src/tint/lang/wgsl/builtin_fn.cc.tmpl
index 4abe603..40a07f4 100644
--- a/src/tint/lang/wgsl/builtin_fn.cc.tmpl
+++ b/src/tint/lang/wgsl/builtin_fn.cc.tmpl
@@ -115,6 +115,9 @@
case BuiltinFn::kSubgroupExclusiveAdd:
case BuiltinFn::kSubgroupMul:
case BuiltinFn::kSubgroupExclusiveMul:
+ case BuiltinFn::kSubgroupAnd:
+ case BuiltinFn::kSubgroupOr:
+ case BuiltinFn::kSubgroupXor:
return true;
default:
return false;
diff --git a/src/tint/lang/wgsl/builtin_fn.h b/src/tint/lang/wgsl/builtin_fn.h
index da9de21..16f48aa 100644
--- a/src/tint/lang/wgsl/builtin_fn.h
+++ b/src/tint/lang/wgsl/builtin_fn.h
@@ -175,6 +175,9 @@
kSubgroupExclusiveAdd,
kSubgroupMul,
kSubgroupExclusiveMul,
+ kSubgroupAnd,
+ kSubgroupOr,
+ kSubgroupXor,
kTintMaterialize,
kNone,
};
@@ -326,6 +329,9 @@
BuiltinFn::kSubgroupExclusiveAdd,
BuiltinFn::kSubgroupMul,
BuiltinFn::kSubgroupExclusiveMul,
+ BuiltinFn::kSubgroupAnd,
+ BuiltinFn::kSubgroupOr,
+ BuiltinFn::kSubgroupXor,
BuiltinFn::kTintMaterialize,
};
@@ -459,6 +465,9 @@
"subgroupExclusiveAdd",
"subgroupMul",
"subgroupExclusiveMul",
+ "subgroupAnd",
+ "subgroupOr",
+ "subgroupXor",
"__tint_materialize",
};
diff --git a/src/tint/lang/wgsl/intrinsic/data.cc b/src/tint/lang/wgsl/intrinsic/data.cc
index de00c10..b049e9b 100644
--- a/src/tint/lang/wgsl/intrinsic/data.cc
+++ b/src/tint/lang/wgsl/intrinsic/data.cc
@@ -10333,6 +10333,28 @@
},
{
/* [485] */
+ /* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
+ /* num_parameters */ 1,
+ /* num_explicit_templates */ 0,
+ /* num_templates */ 1,
+ /* templates */ TemplateIndex(72),
+ /* parameters */ ParameterIndex(323),
+ /* return_matcher_indices */ MatcherIndicesIndex(3),
+ /* const_eval_fn */ ConstEvalFunctionIndex(/* invalid */),
+ },
+ {
+ /* [486] */
+ /* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
+ /* num_parameters */ 1,
+ /* num_explicit_templates */ 0,
+ /* num_templates */ 2,
+ /* templates */ TemplateIndex(71),
+ /* parameters */ ParameterIndex(325),
+ /* return_matcher_indices */ MatcherIndicesIndex(50),
+ /* const_eval_fn */ ConstEvalFunctionIndex(/* invalid */),
+ },
+ {
+ /* [487] */
/* flags */ OverloadFlags(OverloadFlag::kIsOperator, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -10343,7 +10365,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(83),
},
{
- /* [486] */
+ /* [488] */
/* flags */ OverloadFlags(OverloadFlag::kIsOperator, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -10354,37 +10376,15 @@
/* const_eval_fn */ ConstEvalFunctionIndex(83),
},
{
- /* [487] */
- /* flags */ OverloadFlags(OverloadFlag::kIsOperator, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
- /* num_parameters */ 1,
- /* num_explicit_templates */ 0,
- /* num_templates */ 1,
- /* templates */ TemplateIndex(99),
- /* parameters */ ParameterIndex(1),
- /* return_matcher_indices */ MatcherIndicesIndex(3),
- /* const_eval_fn */ ConstEvalFunctionIndex(84),
- },
- {
- /* [488] */
- /* flags */ OverloadFlags(OverloadFlag::kIsOperator, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
- /* num_parameters */ 1,
- /* num_explicit_templates */ 0,
- /* num_templates */ 2,
- /* templates */ TemplateIndex(99),
- /* parameters */ ParameterIndex(221),
- /* return_matcher_indices */ MatcherIndicesIndex(56),
- /* const_eval_fn */ ConstEvalFunctionIndex(84),
- },
- {
/* [489] */
/* flags */ OverloadFlags(OverloadFlag::kIsOperator, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
/* num_templates */ 1,
- /* templates */ TemplateIndex(84),
+ /* templates */ TemplateIndex(99),
/* parameters */ ParameterIndex(1),
/* return_matcher_indices */ MatcherIndicesIndex(3),
- /* const_eval_fn */ ConstEvalFunctionIndex(85),
+ /* const_eval_fn */ ConstEvalFunctionIndex(84),
},
{
/* [490] */
@@ -10392,13 +10392,35 @@
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
/* num_templates */ 2,
+ /* templates */ TemplateIndex(99),
+ /* parameters */ ParameterIndex(221),
+ /* return_matcher_indices */ MatcherIndicesIndex(56),
+ /* const_eval_fn */ ConstEvalFunctionIndex(84),
+ },
+ {
+ /* [491] */
+ /* flags */ OverloadFlags(OverloadFlag::kIsOperator, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
+ /* num_parameters */ 1,
+ /* num_explicit_templates */ 0,
+ /* num_templates */ 1,
+ /* templates */ TemplateIndex(84),
+ /* parameters */ ParameterIndex(1),
+ /* return_matcher_indices */ MatcherIndicesIndex(3),
+ /* const_eval_fn */ ConstEvalFunctionIndex(85),
+ },
+ {
+ /* [492] */
+ /* flags */ OverloadFlags(OverloadFlag::kIsOperator, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
+ /* num_parameters */ 1,
+ /* num_explicit_templates */ 0,
+ /* num_templates */ 2,
/* templates */ TemplateIndex(84),
/* parameters */ ParameterIndex(221),
/* return_matcher_indices */ MatcherIndicesIndex(56),
/* const_eval_fn */ ConstEvalFunctionIndex(85),
},
{
- /* [491] */
+ /* [493] */
/* flags */ OverloadFlags(OverloadFlag::kIsOperator, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 2,
/* num_explicit_templates */ 0,
@@ -10409,7 +10431,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(94),
},
{
- /* [492] */
+ /* [494] */
/* flags */ OverloadFlags(OverloadFlag::kIsOperator, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 2,
/* num_explicit_templates */ 0,
@@ -10420,28 +10442,6 @@
/* const_eval_fn */ ConstEvalFunctionIndex(94),
},
{
- /* [493] */
- /* flags */ OverloadFlags(OverloadFlag::kIsOperator, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
- /* num_parameters */ 2,
- /* num_explicit_templates */ 0,
- /* num_templates */ 1,
- /* templates */ TemplateIndex(82),
- /* parameters */ ParameterIndex(1),
- /* return_matcher_indices */ MatcherIndicesIndex(55),
- /* const_eval_fn */ ConstEvalFunctionIndex(99),
- },
- {
- /* [494] */
- /* flags */ OverloadFlags(OverloadFlag::kIsOperator, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
- /* num_parameters */ 2,
- /* num_explicit_templates */ 0,
- /* num_templates */ 2,
- /* templates */ TemplateIndex(82),
- /* parameters */ ParameterIndex(221),
- /* return_matcher_indices */ MatcherIndicesIndex(113),
- /* const_eval_fn */ ConstEvalFunctionIndex(99),
- },
- {
/* [495] */
/* flags */ OverloadFlags(OverloadFlag::kIsOperator, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 2,
@@ -10450,7 +10450,7 @@
/* templates */ TemplateIndex(82),
/* parameters */ ParameterIndex(1),
/* return_matcher_indices */ MatcherIndicesIndex(55),
- /* const_eval_fn */ ConstEvalFunctionIndex(100),
+ /* const_eval_fn */ ConstEvalFunctionIndex(99),
},
{
/* [496] */
@@ -10461,7 +10461,7 @@
/* templates */ TemplateIndex(82),
/* parameters */ ParameterIndex(221),
/* return_matcher_indices */ MatcherIndicesIndex(113),
- /* const_eval_fn */ ConstEvalFunctionIndex(100),
+ /* const_eval_fn */ ConstEvalFunctionIndex(99),
},
{
/* [497] */
@@ -10469,10 +10469,10 @@
/* num_parameters */ 2,
/* num_explicit_templates */ 0,
/* num_templates */ 1,
- /* templates */ TemplateIndex(70),
+ /* templates */ TemplateIndex(82),
/* parameters */ ParameterIndex(1),
/* return_matcher_indices */ MatcherIndicesIndex(55),
- /* const_eval_fn */ ConstEvalFunctionIndex(101),
+ /* const_eval_fn */ ConstEvalFunctionIndex(100),
},
{
/* [498] */
@@ -10480,10 +10480,10 @@
/* num_parameters */ 2,
/* num_explicit_templates */ 0,
/* num_templates */ 2,
- /* templates */ TemplateIndex(70),
+ /* templates */ TemplateIndex(82),
/* parameters */ ParameterIndex(221),
/* return_matcher_indices */ MatcherIndicesIndex(113),
- /* const_eval_fn */ ConstEvalFunctionIndex(101),
+ /* const_eval_fn */ ConstEvalFunctionIndex(100),
},
{
/* [499] */
@@ -10494,7 +10494,7 @@
/* templates */ TemplateIndex(70),
/* parameters */ ParameterIndex(1),
/* return_matcher_indices */ MatcherIndicesIndex(55),
- /* const_eval_fn */ ConstEvalFunctionIndex(102),
+ /* const_eval_fn */ ConstEvalFunctionIndex(101),
},
{
/* [500] */
@@ -10505,7 +10505,7 @@
/* templates */ TemplateIndex(70),
/* parameters */ ParameterIndex(221),
/* return_matcher_indices */ MatcherIndicesIndex(113),
- /* const_eval_fn */ ConstEvalFunctionIndex(102),
+ /* const_eval_fn */ ConstEvalFunctionIndex(101),
},
{
/* [501] */
@@ -10516,7 +10516,7 @@
/* templates */ TemplateIndex(70),
/* parameters */ ParameterIndex(1),
/* return_matcher_indices */ MatcherIndicesIndex(55),
- /* const_eval_fn */ ConstEvalFunctionIndex(103),
+ /* const_eval_fn */ ConstEvalFunctionIndex(102),
},
{
/* [502] */
@@ -10527,7 +10527,7 @@
/* templates */ TemplateIndex(70),
/* parameters */ ParameterIndex(221),
/* return_matcher_indices */ MatcherIndicesIndex(113),
- /* const_eval_fn */ ConstEvalFunctionIndex(103),
+ /* const_eval_fn */ ConstEvalFunctionIndex(102),
},
{
/* [503] */
@@ -10538,7 +10538,7 @@
/* templates */ TemplateIndex(70),
/* parameters */ ParameterIndex(1),
/* return_matcher_indices */ MatcherIndicesIndex(55),
- /* const_eval_fn */ ConstEvalFunctionIndex(104),
+ /* const_eval_fn */ ConstEvalFunctionIndex(103),
},
{
/* [504] */
@@ -10549,7 +10549,7 @@
/* templates */ TemplateIndex(70),
/* parameters */ ParameterIndex(221),
/* return_matcher_indices */ MatcherIndicesIndex(113),
- /* const_eval_fn */ ConstEvalFunctionIndex(104),
+ /* const_eval_fn */ ConstEvalFunctionIndex(103),
},
{
/* [505] */
@@ -10557,10 +10557,10 @@
/* num_parameters */ 2,
/* num_explicit_templates */ 0,
/* num_templates */ 1,
- /* templates */ TemplateIndex(99),
- /* parameters */ ParameterIndex(16),
- /* return_matcher_indices */ MatcherIndicesIndex(3),
- /* const_eval_fn */ ConstEvalFunctionIndex(105),
+ /* templates */ TemplateIndex(70),
+ /* parameters */ ParameterIndex(1),
+ /* return_matcher_indices */ MatcherIndicesIndex(55),
+ /* const_eval_fn */ ConstEvalFunctionIndex(104),
},
{
/* [506] */
@@ -10568,10 +10568,10 @@
/* num_parameters */ 2,
/* num_explicit_templates */ 0,
/* num_templates */ 2,
- /* templates */ TemplateIndex(99),
- /* parameters */ ParameterIndex(329),
- /* return_matcher_indices */ MatcherIndicesIndex(56),
- /* const_eval_fn */ ConstEvalFunctionIndex(105),
+ /* templates */ TemplateIndex(70),
+ /* parameters */ ParameterIndex(221),
+ /* return_matcher_indices */ MatcherIndicesIndex(113),
+ /* const_eval_fn */ ConstEvalFunctionIndex(104),
},
{
/* [507] */
@@ -10582,7 +10582,7 @@
/* templates */ TemplateIndex(99),
/* parameters */ ParameterIndex(16),
/* return_matcher_indices */ MatcherIndicesIndex(3),
- /* const_eval_fn */ ConstEvalFunctionIndex(106),
+ /* const_eval_fn */ ConstEvalFunctionIndex(105),
},
{
/* [508] */
@@ -10593,10 +10593,32 @@
/* templates */ TemplateIndex(99),
/* parameters */ ParameterIndex(329),
/* return_matcher_indices */ MatcherIndicesIndex(56),
- /* const_eval_fn */ ConstEvalFunctionIndex(106),
+ /* const_eval_fn */ ConstEvalFunctionIndex(105),
},
{
/* [509] */
+ /* flags */ OverloadFlags(OverloadFlag::kIsOperator, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
+ /* num_parameters */ 2,
+ /* num_explicit_templates */ 0,
+ /* num_templates */ 1,
+ /* templates */ TemplateIndex(99),
+ /* parameters */ ParameterIndex(16),
+ /* return_matcher_indices */ MatcherIndicesIndex(3),
+ /* const_eval_fn */ ConstEvalFunctionIndex(106),
+ },
+ {
+ /* [510] */
+ /* flags */ OverloadFlags(OverloadFlag::kIsOperator, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
+ /* num_parameters */ 2,
+ /* num_explicit_templates */ 0,
+ /* num_templates */ 2,
+ /* templates */ TemplateIndex(99),
+ /* parameters */ ParameterIndex(329),
+ /* return_matcher_indices */ MatcherIndicesIndex(56),
+ /* const_eval_fn */ ConstEvalFunctionIndex(106),
+ },
+ {
+ /* [511] */
/* flags */ OverloadFlags(OverloadFlag::kIsConverter, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 1,
@@ -10607,7 +10629,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(108),
},
{
- /* [510] */
+ /* [512] */
/* flags */ OverloadFlags(OverloadFlag::kIsConverter, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -10618,7 +10640,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(108),
},
{
- /* [511] */
+ /* [513] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 2,
/* num_explicit_templates */ 0,
@@ -10629,7 +10651,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(18),
},
{
- /* [512] */
+ /* [514] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -10640,7 +10662,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(20),
},
{
- /* [513] */
+ /* [515] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 2,
/* num_explicit_templates */ 0,
@@ -10651,7 +10673,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(22),
},
{
- /* [514] */
+ /* [516] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 2,
/* num_explicit_templates */ 0,
@@ -10662,7 +10684,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(23),
},
{
- /* [515] */
+ /* [517] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 2,
/* num_explicit_templates */ 0,
@@ -10673,7 +10695,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(24),
},
{
- /* [516] */
+ /* [518] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 3,
/* num_explicit_templates */ 0,
@@ -10684,7 +10706,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(28),
},
{
- /* [517] */
+ /* [519] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -10695,7 +10717,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(45),
},
{
- /* [518] */
+ /* [520] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -10706,7 +10728,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(46),
},
{
- /* [519] */
+ /* [521] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -10717,7 +10739,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(47),
},
{
- /* [520] */
+ /* [522] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -10728,7 +10750,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(48),
},
{
- /* [521] */
+ /* [523] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -10739,7 +10761,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(49),
},
{
- /* [522] */
+ /* [524] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -10750,7 +10772,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(50),
},
{
- /* [523] */
+ /* [525] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -10761,7 +10783,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(51),
},
{
- /* [524] */
+ /* [526] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -10772,7 +10794,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(52),
},
{
- /* [525] */
+ /* [527] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -10783,7 +10805,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(53),
},
{
- /* [526] */
+ /* [528] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -10794,7 +10816,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(54),
},
{
- /* [527] */
+ /* [529] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 2,
/* num_explicit_templates */ 0,
@@ -10805,7 +10827,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(58),
},
{
- /* [528] */
+ /* [530] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 3,
/* num_explicit_templates */ 0,
@@ -10816,7 +10838,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(59),
},
{
- /* [529] */
+ /* [531] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsComputePipeline),
/* num_parameters */ 0,
/* num_explicit_templates */ 0,
@@ -10827,7 +10849,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(/* invalid */),
},
{
- /* [530] */
+ /* [532] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -10838,7 +10860,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(73),
},
{
- /* [531] */
+ /* [533] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -10849,7 +10871,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(75),
},
{
- /* [532] */
+ /* [534] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -10860,7 +10882,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(76),
},
{
- /* [533] */
+ /* [535] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -10871,7 +10893,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(77),
},
{
- /* [534] */
+ /* [536] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -10882,7 +10904,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(78),
},
{
- /* [535] */
+ /* [537] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -10893,7 +10915,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(79),
},
{
- /* [536] */
+ /* [538] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -10904,7 +10926,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(80),
},
{
- /* [537] */
+ /* [539] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -10915,7 +10937,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(81),
},
{
- /* [538] */
+ /* [540] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -10926,7 +10948,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(/* invalid */),
},
{
- /* [539] */
+ /* [541] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsFragmentPipeline),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -10937,31 +10959,9 @@
/* const_eval_fn */ ConstEvalFunctionIndex(/* invalid */),
},
{
- /* [540] */
- /* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline),
- /* num_parameters */ 1,
- /* num_explicit_templates */ 0,
- /* num_templates */ 2,
- /* templates */ TemplateIndex(72),
- /* parameters */ ParameterIndex(0),
- /* return_matcher_indices */ MatcherIndicesIndex(3),
- /* const_eval_fn */ ConstEvalFunctionIndex(/* invalid */),
- },
- {
- /* [541] */
- /* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline),
- /* num_parameters */ 2,
- /* num_explicit_templates */ 0,
- /* num_templates */ 2,
- /* templates */ TemplateIndex(72),
- /* parameters */ ParameterIndex(0),
- /* return_matcher_indices */ MatcherIndicesIndex(/* invalid */),
- /* const_eval_fn */ ConstEvalFunctionIndex(/* invalid */),
- },
- {
/* [542] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline),
- /* num_parameters */ 2,
+ /* num_parameters */ 1,
/* num_explicit_templates */ 0,
/* num_templates */ 2,
/* templates */ TemplateIndex(72),
@@ -10972,6 +10972,28 @@
{
/* [543] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline),
+ /* num_parameters */ 2,
+ /* num_explicit_templates */ 0,
+ /* num_templates */ 2,
+ /* templates */ TemplateIndex(72),
+ /* parameters */ ParameterIndex(0),
+ /* return_matcher_indices */ MatcherIndicesIndex(/* invalid */),
+ /* const_eval_fn */ ConstEvalFunctionIndex(/* invalid */),
+ },
+ {
+ /* [544] */
+ /* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline),
+ /* num_parameters */ 2,
+ /* num_explicit_templates */ 0,
+ /* num_templates */ 2,
+ /* templates */ TemplateIndex(72),
+ /* parameters */ ParameterIndex(0),
+ /* return_matcher_indices */ MatcherIndicesIndex(3),
+ /* const_eval_fn */ ConstEvalFunctionIndex(/* invalid */),
+ },
+ {
+ /* [545] */
+ /* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline),
/* num_parameters */ 3,
/* num_explicit_templates */ 0,
/* num_templates */ 2,
@@ -10981,7 +11003,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(/* invalid */),
},
{
- /* [544] */
+ /* [546] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -10992,7 +11014,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(/* invalid */),
},
{
- /* [545] */
+ /* [547] */
/* flags */ OverloadFlags(OverloadFlag::kIsBuiltin, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -11003,7 +11025,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(82),
},
{
- /* [546] */
+ /* [548] */
/* flags */ OverloadFlags(OverloadFlag::kIsOperator, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -11014,7 +11036,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(/* invalid */),
},
{
- /* [547] */
+ /* [549] */
/* flags */ OverloadFlags(OverloadFlag::kIsOperator, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 1,
/* num_explicit_templates */ 0,
@@ -11025,7 +11047,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(/* invalid */),
},
{
- /* [548] */
+ /* [550] */
/* flags */ OverloadFlags(OverloadFlag::kIsOperator, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 2,
/* num_explicit_templates */ 0,
@@ -11036,7 +11058,7 @@
/* const_eval_fn */ ConstEvalFunctionIndex(97),
},
{
- /* [549] */
+ /* [551] */
/* flags */ OverloadFlags(OverloadFlag::kIsOperator, OverloadFlag::kSupportsVertexPipeline, OverloadFlag::kSupportsFragmentPipeline, OverloadFlag::kSupportsComputePipeline, OverloadFlag::kMustUse),
/* num_parameters */ 2,
/* num_explicit_templates */ 0,
@@ -11197,7 +11219,7 @@
/* [19] */
/* fn cross[T : fa_f32_f16](vec3<T>, vec3<T>) -> vec3<T> */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(511),
+ /* overloads */ OverloadIndex(513),
},
{
/* [20] */
@@ -11210,7 +11232,7 @@
/* [21] */
/* fn determinant[N : num, T : fa_f32_f16](mat<N, N, T>) -> T */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(512),
+ /* overloads */ OverloadIndex(514),
},
{
/* [22] */
@@ -11223,19 +11245,19 @@
/* [23] */
/* fn dot[N : num, T : fia_fiu32_f16](vec<N, T>, vec<N, T>) -> T */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(513),
+ /* overloads */ OverloadIndex(515),
},
{
/* [24] */
/* fn dot4I8Packed(u32, u32) -> i32 */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(514),
+ /* overloads */ OverloadIndex(516),
},
{
/* [25] */
/* fn dot4U8Packed(u32, u32) -> u32 */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(515),
+ /* overloads */ OverloadIndex(517),
},
{
/* [26] */
@@ -11304,7 +11326,7 @@
/* [35] */
/* fn faceForward[N : num, T : fa_f32_f16](vec<N, T>, vec<N, T>, vec<N, T>) -> vec<N, T> */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(516),
+ /* overloads */ OverloadIndex(518),
},
{
/* [36] */
@@ -11444,61 +11466,61 @@
/* [55] */
/* fn normalize[N : num, T : fa_f32_f16](vec<N, T>) -> vec<N, T> */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(517),
+ /* overloads */ OverloadIndex(519),
},
{
/* [56] */
/* fn pack2x16float(vec2<f32>) -> u32 */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(518),
+ /* overloads */ OverloadIndex(520),
},
{
/* [57] */
/* fn pack2x16snorm(vec2<f32>) -> u32 */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(519),
+ /* overloads */ OverloadIndex(521),
},
{
/* [58] */
/* fn pack2x16unorm(vec2<f32>) -> u32 */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(520),
+ /* overloads */ OverloadIndex(522),
},
{
/* [59] */
/* fn pack4x8snorm(vec4<f32>) -> u32 */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(521),
+ /* overloads */ OverloadIndex(523),
},
{
/* [60] */
/* fn pack4x8unorm(vec4<f32>) -> u32 */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(522),
+ /* overloads */ OverloadIndex(524),
},
{
/* [61] */
/* fn pack4xI8(vec4<i32>) -> u32 */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(523),
+ /* overloads */ OverloadIndex(525),
},
{
/* [62] */
/* fn pack4xU8(vec4<u32>) -> u32 */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(524),
+ /* overloads */ OverloadIndex(526),
},
{
/* [63] */
/* fn pack4xI8Clamp(vec4<i32>) -> u32 */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(525),
+ /* overloads */ OverloadIndex(527),
},
{
/* [64] */
/* fn pack4xU8Clamp(vec4<u32>) -> u32 */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(526),
+ /* overloads */ OverloadIndex(528),
},
{
/* [65] */
@@ -11525,13 +11547,13 @@
/* [68] */
/* fn reflect[N : num, T : fa_f32_f16](vec<N, T>, vec<N, T>) -> vec<N, T> */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(527),
+ /* overloads */ OverloadIndex(529),
},
{
/* [69] */
/* fn refract[N : num, T : fa_f32_f16](vec<N, T>, vec<N, T>, T) -> vec<N, T> */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(528),
+ /* overloads */ OverloadIndex(530),
},
{
/* [70] */
@@ -11608,7 +11630,7 @@
/* [80] */
/* fn storageBarrier() */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(529),
+ /* overloads */ OverloadIndex(531),
},
{
/* [81] */
@@ -11628,7 +11650,7 @@
/* [83] */
/* fn transpose[M : num, N : num, T : fa_f32_f16](mat<M, N, T>) -> mat<N, M, T> */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(530),
+ /* overloads */ OverloadIndex(532),
},
{
/* [84] */
@@ -11641,61 +11663,61 @@
/* [85] */
/* fn unpack2x16float(u32) -> vec2<f32> */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(531),
+ /* overloads */ OverloadIndex(533),
},
{
/* [86] */
/* fn unpack2x16snorm(u32) -> vec2<f32> */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(532),
+ /* overloads */ OverloadIndex(534),
},
{
/* [87] */
/* fn unpack2x16unorm(u32) -> vec2<f32> */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(533),
+ /* overloads */ OverloadIndex(535),
},
{
/* [88] */
/* fn unpack4x8snorm(u32) -> vec4<f32> */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(534),
+ /* overloads */ OverloadIndex(536),
},
{
/* [89] */
/* fn unpack4x8unorm(u32) -> vec4<f32> */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(535),
+ /* overloads */ OverloadIndex(537),
},
{
/* [90] */
/* fn unpack4xI8(u32) -> vec4<i32> */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(536),
+ /* overloads */ OverloadIndex(538),
},
{
/* [91] */
/* fn unpack4xU8(u32) -> vec4<u32> */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(537),
+ /* overloads */ OverloadIndex(539),
},
{
/* [92] */
/* fn workgroupBarrier() */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(529),
+ /* overloads */ OverloadIndex(531),
},
{
/* [93] */
/* fn workgroupUniformLoad[T](ptr<workgroup, T, read_write>) -> T */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(538),
+ /* overloads */ OverloadIndex(540),
},
{
/* [94] */
/* fn textureBarrier() */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(529),
+ /* overloads */ OverloadIndex(531),
},
{
/* [95] */
@@ -11947,79 +11969,79 @@
/* [110] */
/* fn inputAttachmentLoad[T : fiu32](input_attachment: input_attachment<T>) -> vec4<T> */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(539),
+ /* overloads */ OverloadIndex(541),
},
{
/* [111] */
/* fn atomicLoad[T : iu32, S : workgroup_or_storage](ptr<S, atomic<T>, read_write>) -> T */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(540),
+ /* overloads */ OverloadIndex(542),
},
{
/* [112] */
/* fn atomicStore[T : iu32, S : workgroup_or_storage](ptr<S, atomic<T>, read_write>, T) */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(541),
+ /* overloads */ OverloadIndex(543),
},
{
/* [113] */
/* fn atomicAdd[T : iu32, S : workgroup_or_storage](ptr<S, atomic<T>, read_write>, T) -> T */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(542),
+ /* overloads */ OverloadIndex(544),
},
{
/* [114] */
/* fn atomicSub[T : iu32, S : workgroup_or_storage](ptr<S, atomic<T>, read_write>, T) -> T */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(542),
+ /* overloads */ OverloadIndex(544),
},
{
/* [115] */
/* fn atomicMax[T : iu32, S : workgroup_or_storage](ptr<S, atomic<T>, read_write>, T) -> T */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(542),
+ /* overloads */ OverloadIndex(544),
},
{
/* [116] */
/* fn atomicMin[T : iu32, S : workgroup_or_storage](ptr<S, atomic<T>, read_write>, T) -> T */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(542),
+ /* overloads */ OverloadIndex(544),
},
{
/* [117] */
/* fn atomicAnd[T : iu32, S : workgroup_or_storage](ptr<S, atomic<T>, read_write>, T) -> T */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(542),
+ /* overloads */ OverloadIndex(544),
},
{
/* [118] */
/* fn atomicOr[T : iu32, S : workgroup_or_storage](ptr<S, atomic<T>, read_write>, T) -> T */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(542),
+ /* overloads */ OverloadIndex(544),
},
{
/* [119] */
/* fn atomicXor[T : iu32, S : workgroup_or_storage](ptr<S, atomic<T>, read_write>, T) -> T */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(542),
+ /* overloads */ OverloadIndex(544),
},
{
/* [120] */
/* fn atomicExchange[T : iu32, S : workgroup_or_storage](ptr<S, atomic<T>, read_write>, T) -> T */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(542),
+ /* overloads */ OverloadIndex(544),
},
{
/* [121] */
/* fn atomicCompareExchangeWeak[T : iu32, S : workgroup_or_storage](ptr<S, atomic<T>, read_write>, T, T) -> __atomic_compare_exchange_result<T> */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(543),
+ /* overloads */ OverloadIndex(545),
},
{
/* [122] */
/* fn subgroupBallot(bool) -> vec4<u32> */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(544),
+ /* overloads */ OverloadIndex(546),
},
{
/* [123] */
@@ -12058,9 +12080,30 @@
},
{
/* [128] */
+ /* fn subgroupAnd[T : iu32](value: T) -> T */
+ /* fn subgroupAnd[N : num, T : iu32](value: vec<N, T>) -> vec<N, T> */
+ /* num overloads */ 2,
+ /* overloads */ OverloadIndex(485),
+ },
+ {
+ /* [129] */
+ /* fn subgroupOr[T : iu32](value: T) -> T */
+ /* fn subgroupOr[N : num, T : iu32](value: vec<N, T>) -> vec<N, T> */
+ /* num overloads */ 2,
+ /* overloads */ OverloadIndex(485),
+ },
+ {
+ /* [130] */
+ /* fn subgroupXor[T : iu32](value: T) -> T */
+ /* fn subgroupXor[N : num, T : iu32](value: vec<N, T>) -> vec<N, T> */
+ /* num overloads */ 2,
+ /* overloads */ OverloadIndex(485),
+ },
+ {
+ /* [131] */
/* fn __tint_materialize[T](T) -> T */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(545),
+ /* overloads */ OverloadIndex(547),
},
};
@@ -12069,34 +12112,34 @@
/* [0] */
/* op &[S : address_space, T, A : access](ref<S, T, A>) -> ptr<S, T, A> */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(546),
+ /* overloads */ OverloadIndex(548),
},
{
/* [1] */
/* op *[S : address_space, T, A : access](ptr<S, T, A>) -> ref<S, T, A> */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(547),
+ /* overloads */ OverloadIndex(549),
},
{
/* [2] */
/* op !(bool) -> bool */
/* op  -> vec<N, bool> */
/* num overloads */ 2,
- /* overloads */ OverloadIndex(485),
+ /* overloads */ OverloadIndex(487),
},
{
/* [3] */
/* op ~[T : ia_iu32](T) -> T */
/* op ~[T : ia_iu32, N : num](vec<N, T>) -> vec<N, T> */
/* num overloads */ 2,
- /* overloads */ OverloadIndex(487),
+ /* overloads */ OverloadIndex(489),
},
{
/* [4] */
/* op -[T : fia_fi32_f16](T) -> T */
/* op -[T : fia_fi32_f16, N : num](vec<N, T>) -> vec<N, T> */
/* num overloads */ 2,
- /* overloads */ OverloadIndex(489),
+ /* overloads */ OverloadIndex(491),
},
};
constexpr uint8_t kUnaryOperatorAnd = 0;
@@ -12163,7 +12206,7 @@
/* op ^[T : ia_iu32](T, T) -> T */
/* op ^[T : ia_iu32, N : num](vec<N, T>, vec<N, T>) -> vec<N, T> */
/* num overloads */ 2,
- /* overloads */ OverloadIndex(491),
+ /* overloads */ OverloadIndex(493),
},
{
/* [6] */
@@ -12187,69 +12230,69 @@
/* [8] */
/* op &&(bool, bool) -> bool */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(548),
+ /* overloads */ OverloadIndex(550),
},
{
/* [9] */
/* op ||(bool, bool) -> bool */
/* num overloads */ 1,
- /* overloads */ OverloadIndex(549),
+ /* overloads */ OverloadIndex(551),
},
{
/* [10] */
/* op ==[T : scalar](T, T) -> bool */
/* op ==[T : scalar, N : num](vec<N, T>, vec<N, T>) -> vec<N, bool> */
/* num overloads */ 2,
- /* overloads */ OverloadIndex(493),
+ /* overloads */ OverloadIndex(495),
},
{
/* [11] */
/* op !=[T : scalar](T, T) -> bool */
/* op !=[T : scalar, N : num](vec<N, T>, vec<N, T>) -> vec<N, bool> */
/* num overloads */ 2,
- /* overloads */ OverloadIndex(495),
+ /* overloads */ OverloadIndex(497),
},
{
/* [12] */
/* op <[T : fia_fiu32_f16](T, T) -> bool */
/* op <[T : fia_fiu32_f16, N : num](vec<N, T>, vec<N, T>) -> vec<N, bool> */
/* num overloads */ 2,
- /* overloads */ OverloadIndex(497),
+ /* overloads */ OverloadIndex(499),
},
{
/* [13] */
/* op >[T : fia_fiu32_f16](T, T) -> bool */
/* op >[T : fia_fiu32_f16, N : num](vec<N, T>, vec<N, T>) -> vec<N, bool> */
/* num overloads */ 2,
- /* overloads */ OverloadIndex(499),
+ /* overloads */ OverloadIndex(501),
},
{
/* [14] */
/* op <=[T : fia_fiu32_f16](T, T) -> bool */
/* op <=[T : fia_fiu32_f16, N : num](vec<N, T>, vec<N, T>) -> vec<N, bool> */
/* num overloads */ 2,
- /* overloads */ OverloadIndex(501),
+ /* overloads */ OverloadIndex(503),
},
{
/* [15] */
/* op >=[T : fia_fiu32_f16](T, T) -> bool */
/* op >=[T : fia_fiu32_f16, N : num](vec<N, T>, vec<N, T>) -> vec<N, bool> */
/* num overloads */ 2,
- /* overloads */ OverloadIndex(503),
+ /* overloads */ OverloadIndex(505),
},
{
/* [16] */
/* op <<[T : ia_iu32](T, u32) -> T */
/* op <<[T : ia_iu32, N : num](vec<N, T>, vec<N, u32>) -> vec<N, T> */
/* num overloads */ 2,
- /* overloads */ OverloadIndex(505),
+ /* overloads */ OverloadIndex(507),
},
{
/* [17] */
/* op >>[T : ia_iu32](T, u32) -> T */
/* op >>[T : ia_iu32, N : num](vec<N, T>, vec<N, u32>) -> vec<N, T> */
/* num overloads */ 2,
- /* overloads */ OverloadIndex(507),
+ /* overloads */ OverloadIndex(509),
},
};
constexpr uint8_t kBinaryOperatorPlus = 0;
@@ -12513,7 +12556,7 @@
/* conv packedVec3<T : concrete_scalar>(vec3<T>) -> packedVec3<T> */
/* conv packedVec3[T : concrete_scalar](vec3<T>) -> packedVec3<T> */
/* num overloads */ 2,
- /* overloads */ OverloadIndex(509),
+ /* overloads */ OverloadIndex(511),
},
};
diff --git a/src/tint/lang/wgsl/reader/lower/lower.cc b/src/tint/lang/wgsl/reader/lower/lower.cc
index 223be6a..505c5df 100644
--- a/src/tint/lang/wgsl/reader/lower/lower.cc
+++ b/src/tint/lang/wgsl/reader/lower/lower.cc
@@ -172,6 +172,9 @@
CASE(kSubgroupExclusiveAdd)
CASE(kSubgroupMul)
CASE(kSubgroupExclusiveMul)
+ CASE(kSubgroupAnd)
+ CASE(kSubgroupOr)
+ CASE(kSubgroupXor)
case tint::wgsl::BuiltinFn::kBitcast: // should lower to ir::Bitcast
case tint::wgsl::BuiltinFn::kWorkgroupUniformLoad: // should be handled in Lower()
diff --git a/src/tint/lang/wgsl/wgsl.def b/src/tint/lang/wgsl/wgsl.def
index d1a9f6f..7572c2b 100644
--- a/src/tint/lang/wgsl/wgsl.def
+++ b/src/tint/lang/wgsl/wgsl.def
@@ -630,6 +630,12 @@
@must_use @stage("fragment", "compute") fn subgroupMul[N: num, T: fiu32_f16](value: vec<N, T>) -> vec<N, T>
@must_use @stage("fragment", "compute") fn subgroupExclusiveMul[T: fiu32_f16](value: T) -> T
@must_use @stage("fragment", "compute") fn subgroupExclusiveMul[N: num, T: fiu32_f16](value: vec<N, T>) -> vec<N, T>
+@must_use @stage("fragment", "compute") fn subgroupAnd[T: iu32](value: T) -> T
+@must_use @stage("fragment", "compute") fn subgroupAnd[N: num, T: iu32](value: vec<N, T>) -> vec<N, T>
+@must_use @stage("fragment", "compute") fn subgroupOr[T: iu32](value: T) -> T
+@must_use @stage("fragment", "compute") fn subgroupOr[N: num, T: iu32](value: vec<N, T>) -> vec<N, T>
+@must_use @stage("fragment", "compute") fn subgroupXor[T: iu32](value: T) -> T
+@must_use @stage("fragment", "compute") fn subgroupXor[N: num, T: iu32](value: vec<N, T>) -> vec<N, T>
////////////////////////////////////////////////////////////////////////////////
// Value constructors //
diff --git a/src/tint/lang/wgsl/writer/ir_to_program/ir_to_program.cc b/src/tint/lang/wgsl/writer/ir_to_program/ir_to_program.cc
index 5877df8..b4876b18 100644
--- a/src/tint/lang/wgsl/writer/ir_to_program/ir_to_program.cc
+++ b/src/tint/lang/wgsl/writer/ir_to_program/ir_to_program.cc
@@ -650,6 +650,9 @@
case wgsl::BuiltinFn::kSubgroupExclusiveAdd:
case wgsl::BuiltinFn::kSubgroupMul:
case wgsl::BuiltinFn::kSubgroupExclusiveMul:
+ case wgsl::BuiltinFn::kSubgroupAnd:
+ case wgsl::BuiltinFn::kSubgroupOr:
+ case wgsl::BuiltinFn::kSubgroupXor:
Enable(wgsl::Extension::kChromiumExperimentalSubgroups);
break;
default:
diff --git a/src/tint/lang/wgsl/writer/raise/raise.cc b/src/tint/lang/wgsl/writer/raise/raise.cc
index f58ddd8..8422844 100644
--- a/src/tint/lang/wgsl/writer/raise/raise.cc
+++ b/src/tint/lang/wgsl/writer/raise/raise.cc
@@ -176,6 +176,9 @@
CASE(kSubgroupMul)
CASE(kSubgroupExclusiveMul)
CASE(kInputAttachmentLoad)
+ CASE(kSubgroupAnd)
+ CASE(kSubgroupOr)
+ CASE(kSubgroupXor)
case core::BuiltinFn::kNone:
break;
}
diff --git a/src/tint/utils/protos/ir/ir.proto b/src/tint/utils/protos/ir/ir.proto
index 5c81367..f2a569e 100644
--- a/src/tint/utils/protos/ir/ir.proto
+++ b/src/tint/utils/protos/ir/ir.proto
@@ -636,4 +636,7 @@
subgroup_exclusive_add = 123;
subgroup_mul = 124;
subgroup_exclusive_mul = 125;
+ subgroup_and = 126;
+ subgroup_or = 127;
+ subgroup_xor = 128;
}
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/0dd12a.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/0dd12a.wgsl.expected.fxc.hlsl
index e4a3759..44d060e 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/0dd12a.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/0dd12a.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store<vector<float16_t, 3> >(0u, subgroupAdd_0dd12a());
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001661A078960(3,8-16): error X3000: syntax error: unexpected token 'float16_t'
+
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/0dd12a.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/0dd12a.wgsl.expected.ir.dxc.hlsl
index f49191a..5de76d8 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/0dd12a.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/0dd12a.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<vector<float16_t, 3> >(0u, subgroupAdd_0dd12a());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<vector<float16_t, 3> >(0u, subgroupAdd_0dd12a());
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/0dd12a.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupAdd/0dd12a.wgsl.expected.ir.msl
index ac492e0..09e3c03 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/0dd12a.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/0dd12a.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device half3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAdd_0dd12a();
+}
+
kernel void compute_main(device half3* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupAdd_0dd12a();
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/1280c8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/1280c8.wgsl.expected.fxc.hlsl
index 9ef6160..2beeb4e 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/1280c8.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/1280c8.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store2(0u, asuint(subgroupAdd_1280c8()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001BDE3BAF2E0(4,15-36): error X3004: undeclared identifier 'WaveActiveSum'
+
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/1280c8.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/1280c8.wgsl.expected.ir.dxc.hlsl
index e0fe802..1a8bdc9 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/1280c8.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/1280c8.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store2(0u, subgroupAdd_1280c8());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store2(0u, subgroupAdd_1280c8());
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/1280c8.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupAdd/1280c8.wgsl.expected.ir.msl
index 47c684f..7dde23d 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/1280c8.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/1280c8.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device uint2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAdd_1280c8();
+}
+
kernel void compute_main(device uint2* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupAdd_1280c8();
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/1eb429.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/1eb429.wgsl.expected.fxc.hlsl
index 6a2dd87..eb88bf4 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/1eb429.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/1eb429.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store2(0u, asuint(subgroupAdd_1eb429()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000018C2972F3E0(4,14-34): error X3004: undeclared identifier 'WaveActiveSum'
+
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/1eb429.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/1eb429.wgsl.expected.ir.dxc.hlsl
index 52b4657..ba9d4ab 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/1eb429.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/1eb429.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupAdd_1eb429()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store2(0u, asuint(subgroupAdd_1eb429()));
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/1eb429.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupAdd/1eb429.wgsl.expected.ir.msl
index 734bad7..e4231cb 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/1eb429.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/1eb429.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device int2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAdd_1eb429();
+}
+
kernel void compute_main(device int2* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupAdd_1eb429();
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/225207.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/225207.wgsl.expected.fxc.hlsl
index 4f56ea1..2ad96d5 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/225207.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/225207.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store<float16_t>(0u, subgroupAdd_225207());
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000222ADE019D0(3,1-9): error X3000: unrecognized identifier 'float16_t'
+
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/225207.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/225207.wgsl.expected.ir.dxc.hlsl
index 4d9d979..ba68332 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/225207.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/225207.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<float16_t>(0u, subgroupAdd_225207());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<float16_t>(0u, subgroupAdd_225207());
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/225207.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupAdd/225207.wgsl.expected.ir.msl
index 9bbad35..a5692f7 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/225207.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/225207.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device half* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAdd_225207();
+}
+
kernel void compute_main(device half* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupAdd_225207();
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/22d041.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/22d041.wgsl.expected.fxc.hlsl
index d2372be..f60f456 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/22d041.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/22d041.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store3(0u, asuint(subgroupAdd_22d041()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000002FC41D5EFF0(4,14-35): error X3004: undeclared identifier 'WaveActiveSum'
+
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/22d041.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/22d041.wgsl.expected.ir.dxc.hlsl
index b812050..173ad5d 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/22d041.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/22d041.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupAdd_22d041()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store3(0u, asuint(subgroupAdd_22d041()));
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/22d041.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupAdd/22d041.wgsl.expected.ir.msl
index 94b82a1..67c83b4 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/22d041.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/22d041.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device int3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAdd_22d041();
+}
+
kernel void compute_main(device int3* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupAdd_22d041();
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/28db2c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/28db2c.wgsl.expected.fxc.hlsl
index 507c20b..13b7562 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/28db2c.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/28db2c.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store4(0u, asuint(subgroupAdd_28db2c()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000002314343F3E0(4,14-36): error X3004: undeclared identifier 'WaveActiveSum'
+
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/28db2c.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/28db2c.wgsl.expected.ir.dxc.hlsl
index 818f1d7..6c177aa 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/28db2c.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/28db2c.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupAdd_28db2c()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store4(0u, asuint(subgroupAdd_28db2c()));
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/28db2c.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupAdd/28db2c.wgsl.expected.ir.msl
index e645afe..62a5d4c 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/28db2c.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/28db2c.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device int4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAdd_28db2c();
+}
+
kernel void compute_main(device int4* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupAdd_28db2c();
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/2ab40a.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/2ab40a.wgsl.expected.fxc.hlsl
index 8a6a62a..ff7cc33 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/2ab40a.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/2ab40a.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store<vector<float16_t, 4> >(0u, subgroupAdd_2ab40a());
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000266E3967020(3,8-16): error X3000: syntax error: unexpected token 'float16_t'
+
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/2ab40a.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/2ab40a.wgsl.expected.ir.dxc.hlsl
index 1184033..447fdf1 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/2ab40a.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/2ab40a.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<vector<float16_t, 4> >(0u, subgroupAdd_2ab40a());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<vector<float16_t, 4> >(0u, subgroupAdd_2ab40a());
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/2ab40a.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupAdd/2ab40a.wgsl.expected.ir.msl
index cd777ee..f6c4c9c 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/2ab40a.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/2ab40a.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device half4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAdd_2ab40a();
+}
+
kernel void compute_main(device half4* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupAdd_2ab40a();
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/3854ae.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/3854ae.wgsl.expected.fxc.hlsl
index 1202deb..0235de3 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/3854ae.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/3854ae.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store(0u, asuint(subgroupAdd_3854ae()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001B8C9424340(4,15-33): error X3004: undeclared identifier 'WaveActiveSum'
+
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/3854ae.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/3854ae.wgsl.expected.ir.dxc.hlsl
index 2b63ee7..89134db 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/3854ae.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/3854ae.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupAdd_3854ae()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store(0u, asuint(subgroupAdd_3854ae()));
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/3854ae.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupAdd/3854ae.wgsl.expected.ir.msl
index 09752ea..5ff1445 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/3854ae.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/3854ae.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device float* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAdd_3854ae();
+}
+
kernel void compute_main(device float* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupAdd_3854ae();
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/6587ff.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/6587ff.wgsl.expected.fxc.hlsl
index a613d28..a4cf741 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/6587ff.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/6587ff.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store3(0u, asuint(subgroupAdd_6587ff()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000029ADEE61DA0(4,15-37): error X3004: undeclared identifier 'WaveActiveSum'
+
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/6587ff.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/6587ff.wgsl.expected.ir.dxc.hlsl
index db59d93..8d1f025 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/6587ff.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/6587ff.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store3(0u, subgroupAdd_6587ff());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store3(0u, subgroupAdd_6587ff());
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/6587ff.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupAdd/6587ff.wgsl.expected.ir.msl
index 5cb63ff..bb94b70 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/6587ff.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/6587ff.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device uint3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAdd_6587ff();
+}
+
kernel void compute_main(device uint3* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupAdd_6587ff();
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/7d1215.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/7d1215.wgsl.expected.fxc.hlsl
index 1c8c0d5..48e4494 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/7d1215.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/7d1215.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store3(0u, asuint(subgroupAdd_7d1215()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001CCCB8544D0(4,16-40): error X3004: undeclared identifier 'WaveActiveSum'
+
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/7d1215.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/7d1215.wgsl.expected.ir.dxc.hlsl
index 8e59c52..66ebf60 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/7d1215.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/7d1215.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupAdd_7d1215()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store3(0u, asuint(subgroupAdd_7d1215()));
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/7d1215.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupAdd/7d1215.wgsl.expected.ir.msl
index 16b35fc..d66a613 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/7d1215.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/7d1215.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device float3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAdd_7d1215();
+}
+
kernel void compute_main(device float3* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupAdd_7d1215();
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/8f4c15.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/8f4c15.wgsl.expected.fxc.hlsl
index 6efad6c..01d102f 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/8f4c15.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/8f4c15.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store4(0u, asuint(subgroupAdd_8f4c15()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000019F67A3F2E0(4,16-41): error X3004: undeclared identifier 'WaveActiveSum'
+
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/8f4c15.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/8f4c15.wgsl.expected.ir.dxc.hlsl
index 7146a0d..a1c53fa 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/8f4c15.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/8f4c15.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupAdd_8f4c15()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store4(0u, asuint(subgroupAdd_8f4c15()));
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/8f4c15.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupAdd/8f4c15.wgsl.expected.ir.msl
index 11faa14..6da7177 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/8f4c15.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/8f4c15.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device float4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAdd_8f4c15();
+}
+
kernel void compute_main(device float4* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupAdd_8f4c15();
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/b61df7.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/b61df7.wgsl.expected.fxc.hlsl
index dcbc4fb..201e52e 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/b61df7.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/b61df7.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store(0u, asuint(subgroupAdd_b61df7()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000022108E12040(4,14-30): error X3004: undeclared identifier 'WaveActiveSum'
+
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/b61df7.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/b61df7.wgsl.expected.ir.dxc.hlsl
index 9f79631..d261b5e 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/b61df7.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/b61df7.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store(0u, subgroupAdd_b61df7());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store(0u, subgroupAdd_b61df7());
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/b61df7.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupAdd/b61df7.wgsl.expected.ir.msl
index db917f8..120fb5b 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/b61df7.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/b61df7.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device uint* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAdd_b61df7();
+}
+
kernel void compute_main(device uint* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupAdd_b61df7();
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/ba53f9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/ba53f9.wgsl.expected.fxc.hlsl
index ef17b46..310aad5 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/ba53f9.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/ba53f9.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store(0u, asuint(subgroupAdd_ba53f9()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001D4149A22A0(4,13-28): error X3004: undeclared identifier 'WaveActiveSum'
+
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/ba53f9.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/ba53f9.wgsl.expected.ir.dxc.hlsl
index 8cf6a14..2b9bcf2 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/ba53f9.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/ba53f9.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupAdd_ba53f9()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store(0u, asuint(subgroupAdd_ba53f9()));
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/ba53f9.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupAdd/ba53f9.wgsl.expected.ir.msl
index e19e783..e98875d 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/ba53f9.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/ba53f9.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device int* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAdd_ba53f9();
+}
+
kernel void compute_main(device int* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupAdd_ba53f9();
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/cae1ed.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/cae1ed.wgsl.expected.fxc.hlsl
index 40ca027..88a2ad0 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/cae1ed.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/cae1ed.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store<vector<float16_t, 2> >(0u, subgroupAdd_cae1ed());
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000022F6A42F430(3,8-16): error X3000: syntax error: unexpected token 'float16_t'
+
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/cae1ed.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/cae1ed.wgsl.expected.ir.dxc.hlsl
index 9241d27..8273f26 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/cae1ed.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/cae1ed.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<vector<float16_t, 2> >(0u, subgroupAdd_cae1ed());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<vector<float16_t, 2> >(0u, subgroupAdd_cae1ed());
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/cae1ed.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupAdd/cae1ed.wgsl.expected.ir.msl
index 4899492..44fee8b 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/cae1ed.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/cae1ed.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device half2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAdd_cae1ed();
+}
+
kernel void compute_main(device half2* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupAdd_cae1ed();
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/dcf73f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/dcf73f.wgsl.expected.fxc.hlsl
index a346652..21d8e29 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/dcf73f.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/dcf73f.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store2(0u, asuint(subgroupAdd_dcf73f()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000020DED641DA0(4,16-39): error X3004: undeclared identifier 'WaveActiveSum'
+
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/dcf73f.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/dcf73f.wgsl.expected.ir.dxc.hlsl
index dceb6a2..5291bcb 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/dcf73f.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/dcf73f.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupAdd_dcf73f()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store2(0u, asuint(subgroupAdd_dcf73f()));
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/dcf73f.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupAdd/dcf73f.wgsl.expected.ir.msl
index 2019047..239188a 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/dcf73f.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/dcf73f.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device float2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAdd_dcf73f();
+}
+
kernel void compute_main(device float2* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupAdd_dcf73f();
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/fbc357.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/fbc357.wgsl.expected.fxc.hlsl
index b462565..7b23a86 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/fbc357.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/fbc357.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store4(0u, asuint(subgroupAdd_fbc357()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000166A6A2F2E0(4,15-38): error X3004: undeclared identifier 'WaveActiveSum'
+
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/fbc357.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupAdd/fbc357.wgsl.expected.ir.dxc.hlsl
index 388a2b9..36d18e8 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/fbc357.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/fbc357.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store4(0u, subgroupAdd_fbc357());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store4(0u, subgroupAdd_fbc357());
diff --git a/test/tint/builtins/gen/literal/subgroupAdd/fbc357.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupAdd/fbc357.wgsl.expected.ir.msl
index dd5e4fe..07047e2 100644
--- a/test/tint/builtins/gen/literal/subgroupAdd/fbc357.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupAdd/fbc357.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device uint4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAdd_fbc357();
+}
+
kernel void compute_main(device uint4* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupAdd_fbc357();
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl b/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl
new file mode 100644
index 0000000..2dd4a1a
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl
@@ -0,0 +1,58 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<i32>;
+
+
+// fn subgroupAnd(value: vec<3, i32>) -> vec<3, i32>
+fn subgroupAnd_1877b3() -> vec3<i32>{
+ var res: vec3<i32> = subgroupAnd(vec3<i32>(1i));
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupAnd_1877b3();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_1877b3();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..525cc10
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl.expected.dxc.hlsl
@@ -0,0 +1,18 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int3 subgroupAnd_1877b3() {
+ int3 tint_tmp = (1).xxx;
+ int3 res = asint(WaveActiveBitAnd(asuint(tint_tmp)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupAnd_1877b3()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupAnd_1877b3()));
+ return;
+}
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..2b24bcf
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl.expected.fxc.hlsl
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int3 subgroupAnd_1877b3() {
+ int3 tint_tmp = (1).xxx;
+ int3 res = asint(WaveActiveBitAnd(asuint(tint_tmp)));
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupAnd_1877b3()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001E52F512120(5,20-53): error X3004: undeclared identifier 'WaveActiveBitAnd'
+
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl.expected.glsl b/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl.expected.glsl
new file mode 100644
index 0000000..1dafecf
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl.expected.glsl
@@ -0,0 +1,21 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<i32>;
+
+fn subgroupAnd_1877b3() -> vec3<i32> {
+ var res : vec3<i32> = subgroupAnd(vec3<i32>(1i));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_1877b3();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..8e21cde
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,17 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+int3 subgroupAnd_1877b3() {
+ int3 arg = (1).xxx;
+ int3 res = asint(WaveActiveBitAnd(asuint(arg)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupAnd_1877b3()));
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupAnd_1877b3()));
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl.expected.ir.msl
new file mode 100644
index 0000000..81acd5f
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl.expected.ir.msl
@@ -0,0 +1,21 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device int3* prevent_dce;
+};
+
+int3 subgroupAnd_1877b3() {
+ int3 res = simd_and(int3(1));
+ return res;
+}
+
+fragment void fragment_main(device int3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAnd_1877b3();
+}
+
+kernel void compute_main(device int3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAnd_1877b3();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..660df7e
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl.expected.ir.spvasm
@@ -0,0 +1,59 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 29
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupAnd_1877b3 "subgroupAnd_1877b3"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %int = OpTypeInt 32 1
+ %v3int = OpTypeVector %int 3
+%tint_symbol_1 = OpTypeStruct %v3int
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v3int
+ %uint = OpTypeInt 32 0
+ %uint_3 = OpConstant %uint 3
+ %int_1 = OpConstant %int 1
+ %12 = OpConstantComposite %v3int %int_1 %int_1 %int_1
+%_ptr_Function_v3int = OpTypePointer Function %v3int
+ %void = OpTypeVoid
+ %19 = OpTypeFunction %void
+%_ptr_StorageBuffer_v3int = OpTypePointer StorageBuffer %v3int
+ %uint_0 = OpConstant %uint 0
+%subgroupAnd_1877b3 = OpFunction %v3int None %7
+ %8 = OpLabel
+ %res = OpVariable %_ptr_Function_v3int Function
+ %9 = OpGroupNonUniformBitwiseAnd %v3int %uint_3 Reduce %12
+ OpStore %res %9
+ %16 = OpLoad %v3int %res
+ OpReturnValue %16
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %19
+ %20 = OpLabel
+ %21 = OpFunctionCall %v3int %subgroupAnd_1877b3
+ %22 = OpAccessChain %_ptr_StorageBuffer_v3int %1 %uint_0
+ OpStore %22 %21
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %19
+ %26 = OpLabel
+ %27 = OpFunctionCall %v3int %subgroupAnd_1877b3
+ %28 = OpAccessChain %_ptr_StorageBuffer_v3int %1 %uint_0
+ OpStore %28 %27
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl.expected.msl b/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl.expected.msl
new file mode 100644
index 0000000..17666fe
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl.expected.msl
@@ -0,0 +1,18 @@
+#include <metal_stdlib>
+
+using namespace metal;
+int3 subgroupAnd_1877b3() {
+ int3 res = simd_and(int3(1));
+ return res;
+}
+
+fragment void fragment_main(device packed_int3* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = packed_int3(subgroupAnd_1877b3());
+ return;
+}
+
+kernel void compute_main(device packed_int3* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = packed_int3(subgroupAnd_1877b3());
+ return;
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl.expected.spvasm b/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl.expected.spvasm
new file mode 100644
index 0000000..0c52c2e
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl.expected.spvasm
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<i32>;
+
+fn subgroupAnd_1877b3() -> vec3<i32> {
+ var res : vec3<i32> = subgroupAnd(vec3<i32>(1i));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_1877b3();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl.expected.wgsl b/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl.expected.wgsl
new file mode 100644
index 0000000..41e96b4
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/1877b3.wgsl.expected.wgsl
@@ -0,0 +1,18 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<i32>;
+
+fn subgroupAnd_1877b3() -> vec3<i32> {
+ var res : vec3<i32> = subgroupAnd(vec3<i32>(1i));
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupAnd_1877b3();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_1877b3();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl b/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl
new file mode 100644
index 0000000..8e3feaa
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl
@@ -0,0 +1,58 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<u32>;
+
+
+// fn subgroupAnd(value: vec<2, u32>) -> vec<2, u32>
+fn subgroupAnd_376802() -> vec2<u32>{
+ var res: vec2<u32> = subgroupAnd(vec2<u32>(1u));
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupAnd_376802();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_376802();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..f50605d
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl.expected.dxc.hlsl
@@ -0,0 +1,17 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint2 subgroupAnd_376802() {
+ uint2 res = WaveActiveBitAnd((1u).xx);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupAnd_376802()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupAnd_376802()));
+ return;
+}
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..ef07ceb
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl.expected.fxc.hlsl
@@ -0,0 +1,17 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint2 subgroupAnd_376802() {
+ uint2 res = WaveActiveBitAnd((1u).xx);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupAnd_376802()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001F31EC14340(4,15-39): error X3004: undeclared identifier 'WaveActiveBitAnd'
+
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl.expected.glsl b/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl.expected.glsl
new file mode 100644
index 0000000..17f5159
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl.expected.glsl
@@ -0,0 +1,21 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<u32>;
+
+fn subgroupAnd_376802() -> vec2<u32> {
+ var res : vec2<u32> = subgroupAnd(vec2<u32>(1u));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_376802();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..c1e9f42
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,16 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+uint2 subgroupAnd_376802() {
+ uint2 res = WaveActiveBitAnd((1u).xx);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store2(0u, subgroupAnd_376802());
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, subgroupAnd_376802());
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl.expected.ir.msl
new file mode 100644
index 0000000..e3d4587
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl.expected.ir.msl
@@ -0,0 +1,21 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device uint2* prevent_dce;
+};
+
+uint2 subgroupAnd_376802() {
+ uint2 res = simd_and(uint2(1u));
+ return res;
+}
+
+fragment void fragment_main(device uint2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAnd_376802();
+}
+
+kernel void compute_main(device uint2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAnd_376802();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..8a0512d
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl.expected.ir.spvasm
@@ -0,0 +1,58 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 28
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupAnd_376802 "subgroupAnd_376802"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %uint = OpTypeInt 32 0
+ %v2uint = OpTypeVector %uint 2
+%tint_symbol_1 = OpTypeStruct %v2uint
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v2uint
+ %uint_3 = OpConstant %uint 3
+ %uint_1 = OpConstant %uint 1
+ %11 = OpConstantComposite %v2uint %uint_1 %uint_1
+%_ptr_Function_v2uint = OpTypePointer Function %v2uint
+ %void = OpTypeVoid
+ %18 = OpTypeFunction %void
+%_ptr_StorageBuffer_v2uint = OpTypePointer StorageBuffer %v2uint
+ %uint_0 = OpConstant %uint 0
+%subgroupAnd_376802 = OpFunction %v2uint None %7
+ %8 = OpLabel
+ %res = OpVariable %_ptr_Function_v2uint Function
+ %9 = OpGroupNonUniformBitwiseAnd %v2uint %uint_3 Reduce %11
+ OpStore %res %9
+ %15 = OpLoad %v2uint %res
+ OpReturnValue %15
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %18
+ %19 = OpLabel
+ %20 = OpFunctionCall %v2uint %subgroupAnd_376802
+ %21 = OpAccessChain %_ptr_StorageBuffer_v2uint %1 %uint_0
+ OpStore %21 %20
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %18
+ %25 = OpLabel
+ %26 = OpFunctionCall %v2uint %subgroupAnd_376802
+ %27 = OpAccessChain %_ptr_StorageBuffer_v2uint %1 %uint_0
+ OpStore %27 %26
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl.expected.msl b/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl.expected.msl
new file mode 100644
index 0000000..1269ea0
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl.expected.msl
@@ -0,0 +1,18 @@
+#include <metal_stdlib>
+
+using namespace metal;
+uint2 subgroupAnd_376802() {
+ uint2 res = simd_and(uint2(1u));
+ return res;
+}
+
+fragment void fragment_main(device uint2* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupAnd_376802();
+ return;
+}
+
+kernel void compute_main(device uint2* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupAnd_376802();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl.expected.spvasm b/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl.expected.spvasm
new file mode 100644
index 0000000..3421df5
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl.expected.spvasm
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<u32>;
+
+fn subgroupAnd_376802() -> vec2<u32> {
+ var res : vec2<u32> = subgroupAnd(vec2<u32>(1u));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_376802();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl.expected.wgsl b/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl.expected.wgsl
new file mode 100644
index 0000000..8c6b7b0
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/376802.wgsl.expected.wgsl
@@ -0,0 +1,18 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<u32>;
+
+fn subgroupAnd_376802() -> vec2<u32> {
+ var res : vec2<u32> = subgroupAnd(vec2<u32>(1u));
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupAnd_376802();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_376802();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl b/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl
new file mode 100644
index 0000000..87ff8a4
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl
@@ -0,0 +1,58 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<i32>;
+
+
+// fn subgroupAnd(value: vec<2, i32>) -> vec<2, i32>
+fn subgroupAnd_4adc72() -> vec2<i32>{
+ var res: vec2<i32> = subgroupAnd(vec2<i32>(1i));
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupAnd_4adc72();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_4adc72();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..3d8ca00
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl.expected.dxc.hlsl
@@ -0,0 +1,18 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int2 subgroupAnd_4adc72() {
+ int2 tint_tmp = (1).xx;
+ int2 res = asint(WaveActiveBitAnd(asuint(tint_tmp)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupAnd_4adc72()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupAnd_4adc72()));
+ return;
+}
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..f1aa4a9
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl.expected.fxc.hlsl
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int2 subgroupAnd_4adc72() {
+ int2 tint_tmp = (1).xx;
+ int2 res = asint(WaveActiveBitAnd(asuint(tint_tmp)));
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupAnd_4adc72()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000017C0FBA7D40(5,20-53): error X3004: undeclared identifier 'WaveActiveBitAnd'
+
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl.expected.glsl b/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl.expected.glsl
new file mode 100644
index 0000000..28a6946
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl.expected.glsl
@@ -0,0 +1,21 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<i32>;
+
+fn subgroupAnd_4adc72() -> vec2<i32> {
+ var res : vec2<i32> = subgroupAnd(vec2<i32>(1i));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_4adc72();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..190f55e
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,17 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+int2 subgroupAnd_4adc72() {
+ int2 arg = (1).xx;
+ int2 res = asint(WaveActiveBitAnd(asuint(arg)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupAnd_4adc72()));
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupAnd_4adc72()));
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl.expected.ir.msl
new file mode 100644
index 0000000..9e76ead
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl.expected.ir.msl
@@ -0,0 +1,21 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device int2* prevent_dce;
+};
+
+int2 subgroupAnd_4adc72() {
+ int2 res = simd_and(int2(1));
+ return res;
+}
+
+fragment void fragment_main(device int2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAnd_4adc72();
+}
+
+kernel void compute_main(device int2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAnd_4adc72();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..c75b481
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl.expected.ir.spvasm
@@ -0,0 +1,59 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 29
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupAnd_4adc72 "subgroupAnd_4adc72"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %int = OpTypeInt 32 1
+ %v2int = OpTypeVector %int 2
+%tint_symbol_1 = OpTypeStruct %v2int
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v2int
+ %uint = OpTypeInt 32 0
+ %uint_3 = OpConstant %uint 3
+ %int_1 = OpConstant %int 1
+ %12 = OpConstantComposite %v2int %int_1 %int_1
+%_ptr_Function_v2int = OpTypePointer Function %v2int
+ %void = OpTypeVoid
+ %19 = OpTypeFunction %void
+%_ptr_StorageBuffer_v2int = OpTypePointer StorageBuffer %v2int
+ %uint_0 = OpConstant %uint 0
+%subgroupAnd_4adc72 = OpFunction %v2int None %7
+ %8 = OpLabel
+ %res = OpVariable %_ptr_Function_v2int Function
+ %9 = OpGroupNonUniformBitwiseAnd %v2int %uint_3 Reduce %12
+ OpStore %res %9
+ %16 = OpLoad %v2int %res
+ OpReturnValue %16
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %19
+ %20 = OpLabel
+ %21 = OpFunctionCall %v2int %subgroupAnd_4adc72
+ %22 = OpAccessChain %_ptr_StorageBuffer_v2int %1 %uint_0
+ OpStore %22 %21
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %19
+ %26 = OpLabel
+ %27 = OpFunctionCall %v2int %subgroupAnd_4adc72
+ %28 = OpAccessChain %_ptr_StorageBuffer_v2int %1 %uint_0
+ OpStore %28 %27
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl.expected.msl b/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl.expected.msl
new file mode 100644
index 0000000..0035f66
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl.expected.msl
@@ -0,0 +1,18 @@
+#include <metal_stdlib>
+
+using namespace metal;
+int2 subgroupAnd_4adc72() {
+ int2 res = simd_and(int2(1));
+ return res;
+}
+
+fragment void fragment_main(device int2* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupAnd_4adc72();
+ return;
+}
+
+kernel void compute_main(device int2* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupAnd_4adc72();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl.expected.spvasm b/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl.expected.spvasm
new file mode 100644
index 0000000..17b4bd4
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl.expected.spvasm
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<i32>;
+
+fn subgroupAnd_4adc72() -> vec2<i32> {
+ var res : vec2<i32> = subgroupAnd(vec2<i32>(1i));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_4adc72();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl.expected.wgsl b/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl.expected.wgsl
new file mode 100644
index 0000000..29e6e57
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/4adc72.wgsl.expected.wgsl
@@ -0,0 +1,18 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<i32>;
+
+fn subgroupAnd_4adc72() -> vec2<i32> {
+ var res : vec2<i32> = subgroupAnd(vec2<i32>(1i));
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupAnd_4adc72();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_4adc72();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl b/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl
new file mode 100644
index 0000000..34bc3fa
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl
@@ -0,0 +1,58 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : u32;
+
+
+// fn subgroupAnd(value: u32) -> u32
+fn subgroupAnd_4df632() -> u32{
+ var res: u32 = subgroupAnd(1u);
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupAnd_4df632();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_4df632();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..bde3e40
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl.expected.dxc.hlsl
@@ -0,0 +1,17 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint subgroupAnd_4df632() {
+ uint res = WaveActiveBitAnd(1u);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupAnd_4df632()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupAnd_4df632()));
+ return;
+}
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..a5ab851
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl.expected.fxc.hlsl
@@ -0,0 +1,17 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint subgroupAnd_4df632() {
+ uint res = WaveActiveBitAnd(1u);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupAnd_4df632()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001C62A3C1D70(4,14-33): error X3004: undeclared identifier 'WaveActiveBitAnd'
+
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl.expected.glsl b/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl.expected.glsl
new file mode 100644
index 0000000..b81ba20
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl.expected.glsl
@@ -0,0 +1,21 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : u32;
+
+fn subgroupAnd_4df632() -> u32 {
+ var res : u32 = subgroupAnd(1u);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_4df632();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..be8ce78
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,16 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+uint subgroupAnd_4df632() {
+ uint res = WaveActiveBitAnd(1u);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store(0u, subgroupAnd_4df632());
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, subgroupAnd_4df632());
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl.expected.ir.msl
new file mode 100644
index 0000000..f136833
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl.expected.ir.msl
@@ -0,0 +1,21 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device uint* prevent_dce;
+};
+
+uint subgroupAnd_4df632() {
+ uint res = simd_and(1u);
+ return res;
+}
+
+fragment void fragment_main(device uint* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAnd_4df632();
+}
+
+kernel void compute_main(device uint* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAnd_4df632();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..9aa655d
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl.expected.ir.spvasm
@@ -0,0 +1,56 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 26
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupAnd_4df632 "subgroupAnd_4df632"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %uint = OpTypeInt 32 0
+%tint_symbol_1 = OpTypeStruct %uint
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %6 = OpTypeFunction %uint
+ %uint_3 = OpConstant %uint 3
+ %uint_1 = OpConstant %uint 1
+%_ptr_Function_uint = OpTypePointer Function %uint
+ %void = OpTypeVoid
+ %16 = OpTypeFunction %void
+%_ptr_StorageBuffer_uint = OpTypePointer StorageBuffer %uint
+ %uint_0 = OpConstant %uint 0
+%subgroupAnd_4df632 = OpFunction %uint None %6
+ %7 = OpLabel
+ %res = OpVariable %_ptr_Function_uint Function
+ %8 = OpGroupNonUniformBitwiseAnd %uint %uint_3 Reduce %uint_1
+ OpStore %res %8
+ %13 = OpLoad %uint %res
+ OpReturnValue %13
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %16
+ %17 = OpLabel
+ %18 = OpFunctionCall %uint %subgroupAnd_4df632
+ %19 = OpAccessChain %_ptr_StorageBuffer_uint %1 %uint_0
+ OpStore %19 %18
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %16
+ %23 = OpLabel
+ %24 = OpFunctionCall %uint %subgroupAnd_4df632
+ %25 = OpAccessChain %_ptr_StorageBuffer_uint %1 %uint_0
+ OpStore %25 %24
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl.expected.msl b/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl.expected.msl
new file mode 100644
index 0000000..0a27b695
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl.expected.msl
@@ -0,0 +1,18 @@
+#include <metal_stdlib>
+
+using namespace metal;
+uint subgroupAnd_4df632() {
+ uint res = simd_and(1u);
+ return res;
+}
+
+fragment void fragment_main(device uint* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupAnd_4df632();
+ return;
+}
+
+kernel void compute_main(device uint* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupAnd_4df632();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl.expected.spvasm b/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl.expected.spvasm
new file mode 100644
index 0000000..62215a0
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl.expected.spvasm
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : u32;
+
+fn subgroupAnd_4df632() -> u32 {
+ var res : u32 = subgroupAnd(1u);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_4df632();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl.expected.wgsl b/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl.expected.wgsl
new file mode 100644
index 0000000..50e63a0
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/4df632.wgsl.expected.wgsl
@@ -0,0 +1,18 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : u32;
+
+fn subgroupAnd_4df632() -> u32 {
+ var res : u32 = subgroupAnd(1u);
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupAnd_4df632();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_4df632();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl b/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl
new file mode 100644
index 0000000..708e94a7
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl
@@ -0,0 +1,58 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<i32>;
+
+
+// fn subgroupAnd(value: vec<4, i32>) -> vec<4, i32>
+fn subgroupAnd_97655b() -> vec4<i32>{
+ var res: vec4<i32> = subgroupAnd(vec4<i32>(1i));
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupAnd_97655b();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_97655b();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..721966e
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl.expected.dxc.hlsl
@@ -0,0 +1,18 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int4 subgroupAnd_97655b() {
+ int4 tint_tmp = (1).xxxx;
+ int4 res = asint(WaveActiveBitAnd(asuint(tint_tmp)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupAnd_97655b()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupAnd_97655b()));
+ return;
+}
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..d9f6ebe
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl.expected.fxc.hlsl
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int4 subgroupAnd_97655b() {
+ int4 tint_tmp = (1).xxxx;
+ int4 res = asint(WaveActiveBitAnd(asuint(tint_tmp)));
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupAnd_97655b()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001613FAC8480(5,20-53): error X3004: undeclared identifier 'WaveActiveBitAnd'
+
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl.expected.glsl b/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl.expected.glsl
new file mode 100644
index 0000000..e95b860
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl.expected.glsl
@@ -0,0 +1,21 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<i32>;
+
+fn subgroupAnd_97655b() -> vec4<i32> {
+ var res : vec4<i32> = subgroupAnd(vec4<i32>(1i));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_97655b();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..7bcbb34
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,17 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+int4 subgroupAnd_97655b() {
+ int4 arg = (1).xxxx;
+ int4 res = asint(WaveActiveBitAnd(asuint(arg)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupAnd_97655b()));
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupAnd_97655b()));
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl.expected.ir.msl
new file mode 100644
index 0000000..3cb299d
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl.expected.ir.msl
@@ -0,0 +1,21 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device int4* prevent_dce;
+};
+
+int4 subgroupAnd_97655b() {
+ int4 res = simd_and(int4(1));
+ return res;
+}
+
+fragment void fragment_main(device int4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAnd_97655b();
+}
+
+kernel void compute_main(device int4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAnd_97655b();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..7222131
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl.expected.ir.spvasm
@@ -0,0 +1,59 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 29
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupAnd_97655b "subgroupAnd_97655b"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %int = OpTypeInt 32 1
+ %v4int = OpTypeVector %int 4
+%tint_symbol_1 = OpTypeStruct %v4int
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v4int
+ %uint = OpTypeInt 32 0
+ %uint_3 = OpConstant %uint 3
+ %int_1 = OpConstant %int 1
+ %12 = OpConstantComposite %v4int %int_1 %int_1 %int_1 %int_1
+%_ptr_Function_v4int = OpTypePointer Function %v4int
+ %void = OpTypeVoid
+ %19 = OpTypeFunction %void
+%_ptr_StorageBuffer_v4int = OpTypePointer StorageBuffer %v4int
+ %uint_0 = OpConstant %uint 0
+%subgroupAnd_97655b = OpFunction %v4int None %7
+ %8 = OpLabel
+ %res = OpVariable %_ptr_Function_v4int Function
+ %9 = OpGroupNonUniformBitwiseAnd %v4int %uint_3 Reduce %12
+ OpStore %res %9
+ %16 = OpLoad %v4int %res
+ OpReturnValue %16
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %19
+ %20 = OpLabel
+ %21 = OpFunctionCall %v4int %subgroupAnd_97655b
+ %22 = OpAccessChain %_ptr_StorageBuffer_v4int %1 %uint_0
+ OpStore %22 %21
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %19
+ %26 = OpLabel
+ %27 = OpFunctionCall %v4int %subgroupAnd_97655b
+ %28 = OpAccessChain %_ptr_StorageBuffer_v4int %1 %uint_0
+ OpStore %28 %27
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl.expected.msl b/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl.expected.msl
new file mode 100644
index 0000000..2574f5d
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl.expected.msl
@@ -0,0 +1,18 @@
+#include <metal_stdlib>
+
+using namespace metal;
+int4 subgroupAnd_97655b() {
+ int4 res = simd_and(int4(1));
+ return res;
+}
+
+fragment void fragment_main(device int4* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupAnd_97655b();
+ return;
+}
+
+kernel void compute_main(device int4* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupAnd_97655b();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl.expected.spvasm b/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl.expected.spvasm
new file mode 100644
index 0000000..a77b37d
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl.expected.spvasm
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<i32>;
+
+fn subgroupAnd_97655b() -> vec4<i32> {
+ var res : vec4<i32> = subgroupAnd(vec4<i32>(1i));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_97655b();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl.expected.wgsl b/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl.expected.wgsl
new file mode 100644
index 0000000..fd08591
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/97655b.wgsl.expected.wgsl
@@ -0,0 +1,18 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<i32>;
+
+fn subgroupAnd_97655b() -> vec4<i32> {
+ var res : vec4<i32> = subgroupAnd(vec4<i32>(1i));
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupAnd_97655b();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_97655b();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl b/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl
new file mode 100644
index 0000000..ea9bd88
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl
@@ -0,0 +1,58 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<u32>;
+
+
+// fn subgroupAnd(value: vec<3, u32>) -> vec<3, u32>
+fn subgroupAnd_ad0cd3() -> vec3<u32>{
+ var res: vec3<u32> = subgroupAnd(vec3<u32>(1u));
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupAnd_ad0cd3();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_ad0cd3();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..927ae89
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl.expected.dxc.hlsl
@@ -0,0 +1,17 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint3 subgroupAnd_ad0cd3() {
+ uint3 res = WaveActiveBitAnd((1u).xxx);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupAnd_ad0cd3()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupAnd_ad0cd3()));
+ return;
+}
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..6a7ecca
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl.expected.fxc.hlsl
@@ -0,0 +1,17 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint3 subgroupAnd_ad0cd3() {
+ uint3 res = WaveActiveBitAnd((1u).xxx);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupAnd_ad0cd3()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001C8B473F2E0(4,15-40): error X3004: undeclared identifier 'WaveActiveBitAnd'
+
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl.expected.glsl b/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl.expected.glsl
new file mode 100644
index 0000000..a6c7c97
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl.expected.glsl
@@ -0,0 +1,21 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<u32>;
+
+fn subgroupAnd_ad0cd3() -> vec3<u32> {
+ var res : vec3<u32> = subgroupAnd(vec3<u32>(1u));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_ad0cd3();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..81d96ed
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,16 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+uint3 subgroupAnd_ad0cd3() {
+ uint3 res = WaveActiveBitAnd((1u).xxx);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store3(0u, subgroupAnd_ad0cd3());
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, subgroupAnd_ad0cd3());
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl.expected.ir.msl
new file mode 100644
index 0000000..5b84dcc
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl.expected.ir.msl
@@ -0,0 +1,21 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device uint3* prevent_dce;
+};
+
+uint3 subgroupAnd_ad0cd3() {
+ uint3 res = simd_and(uint3(1u));
+ return res;
+}
+
+fragment void fragment_main(device uint3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAnd_ad0cd3();
+}
+
+kernel void compute_main(device uint3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAnd_ad0cd3();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..2957660
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl.expected.ir.spvasm
@@ -0,0 +1,58 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 28
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupAnd_ad0cd3 "subgroupAnd_ad0cd3"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %uint = OpTypeInt 32 0
+ %v3uint = OpTypeVector %uint 3
+%tint_symbol_1 = OpTypeStruct %v3uint
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v3uint
+ %uint_3 = OpConstant %uint 3
+ %uint_1 = OpConstant %uint 1
+ %11 = OpConstantComposite %v3uint %uint_1 %uint_1 %uint_1
+%_ptr_Function_v3uint = OpTypePointer Function %v3uint
+ %void = OpTypeVoid
+ %18 = OpTypeFunction %void
+%_ptr_StorageBuffer_v3uint = OpTypePointer StorageBuffer %v3uint
+ %uint_0 = OpConstant %uint 0
+%subgroupAnd_ad0cd3 = OpFunction %v3uint None %7
+ %8 = OpLabel
+ %res = OpVariable %_ptr_Function_v3uint Function
+ %9 = OpGroupNonUniformBitwiseAnd %v3uint %uint_3 Reduce %11
+ OpStore %res %9
+ %15 = OpLoad %v3uint %res
+ OpReturnValue %15
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %18
+ %19 = OpLabel
+ %20 = OpFunctionCall %v3uint %subgroupAnd_ad0cd3
+ %21 = OpAccessChain %_ptr_StorageBuffer_v3uint %1 %uint_0
+ OpStore %21 %20
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %18
+ %25 = OpLabel
+ %26 = OpFunctionCall %v3uint %subgroupAnd_ad0cd3
+ %27 = OpAccessChain %_ptr_StorageBuffer_v3uint %1 %uint_0
+ OpStore %27 %26
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl.expected.msl b/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl.expected.msl
new file mode 100644
index 0000000..b4db20f
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl.expected.msl
@@ -0,0 +1,18 @@
+#include <metal_stdlib>
+
+using namespace metal;
+uint3 subgroupAnd_ad0cd3() {
+ uint3 res = simd_and(uint3(1u));
+ return res;
+}
+
+fragment void fragment_main(device packed_uint3* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = packed_uint3(subgroupAnd_ad0cd3());
+ return;
+}
+
+kernel void compute_main(device packed_uint3* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = packed_uint3(subgroupAnd_ad0cd3());
+ return;
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl.expected.spvasm b/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl.expected.spvasm
new file mode 100644
index 0000000..60f582a
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl.expected.spvasm
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<u32>;
+
+fn subgroupAnd_ad0cd3() -> vec3<u32> {
+ var res : vec3<u32> = subgroupAnd(vec3<u32>(1u));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_ad0cd3();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl.expected.wgsl b/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl.expected.wgsl
new file mode 100644
index 0000000..8e78479
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/ad0cd3.wgsl.expected.wgsl
@@ -0,0 +1,18 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<u32>;
+
+fn subgroupAnd_ad0cd3() -> vec3<u32> {
+ var res : vec3<u32> = subgroupAnd(vec3<u32>(1u));
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupAnd_ad0cd3();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_ad0cd3();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl b/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl
new file mode 100644
index 0000000..80adb0b
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl
@@ -0,0 +1,58 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : i32;
+
+
+// fn subgroupAnd(value: i32) -> i32
+fn subgroupAnd_c6fc92() -> i32{
+ var res: i32 = subgroupAnd(1i);
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupAnd_c6fc92();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_c6fc92();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..30aaa02
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl.expected.dxc.hlsl
@@ -0,0 +1,17 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int subgroupAnd_c6fc92() {
+ int res = asint(WaveActiveBitAnd(asuint(1)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupAnd_c6fc92()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupAnd_c6fc92()));
+ return;
+}
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..2c07048
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl.expected.fxc.hlsl
@@ -0,0 +1,17 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int subgroupAnd_c6fc92() {
+ int res = asint(WaveActiveBitAnd(asuint(1)));
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupAnd_c6fc92()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001D230F277C0(4,19-45): error X3004: undeclared identifier 'WaveActiveBitAnd'
+
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl.expected.glsl b/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl.expected.glsl
new file mode 100644
index 0000000..e3b7b4e
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl.expected.glsl
@@ -0,0 +1,21 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : i32;
+
+fn subgroupAnd_c6fc92() -> i32 {
+ var res : i32 = subgroupAnd(1i);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_c6fc92();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..2d15c53
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,16 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+int subgroupAnd_c6fc92() {
+ int res = asint(WaveActiveBitAnd(asuint(1)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupAnd_c6fc92()));
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupAnd_c6fc92()));
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl.expected.ir.msl
new file mode 100644
index 0000000..845c78e
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl.expected.ir.msl
@@ -0,0 +1,21 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device int* prevent_dce;
+};
+
+int subgroupAnd_c6fc92() {
+ int res = simd_and(1);
+ return res;
+}
+
+fragment void fragment_main(device int* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAnd_c6fc92();
+}
+
+kernel void compute_main(device int* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAnd_c6fc92();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..7808aad
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl.expected.ir.spvasm
@@ -0,0 +1,57 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 27
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupAnd_c6fc92 "subgroupAnd_c6fc92"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %int = OpTypeInt 32 1
+%tint_symbol_1 = OpTypeStruct %int
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %6 = OpTypeFunction %int
+ %uint = OpTypeInt 32 0
+ %uint_3 = OpConstant %uint 3
+ %int_1 = OpConstant %int 1
+%_ptr_Function_int = OpTypePointer Function %int
+ %void = OpTypeVoid
+ %17 = OpTypeFunction %void
+%_ptr_StorageBuffer_int = OpTypePointer StorageBuffer %int
+ %uint_0 = OpConstant %uint 0
+%subgroupAnd_c6fc92 = OpFunction %int None %6
+ %7 = OpLabel
+ %res = OpVariable %_ptr_Function_int Function
+ %8 = OpGroupNonUniformBitwiseAnd %int %uint_3 Reduce %int_1
+ OpStore %res %8
+ %14 = OpLoad %int %res
+ OpReturnValue %14
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %17
+ %18 = OpLabel
+ %19 = OpFunctionCall %int %subgroupAnd_c6fc92
+ %20 = OpAccessChain %_ptr_StorageBuffer_int %1 %uint_0
+ OpStore %20 %19
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %17
+ %24 = OpLabel
+ %25 = OpFunctionCall %int %subgroupAnd_c6fc92
+ %26 = OpAccessChain %_ptr_StorageBuffer_int %1 %uint_0
+ OpStore %26 %25
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl.expected.msl b/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl.expected.msl
new file mode 100644
index 0000000..a05d45e
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl.expected.msl
@@ -0,0 +1,18 @@
+#include <metal_stdlib>
+
+using namespace metal;
+int subgroupAnd_c6fc92() {
+ int res = simd_and(1);
+ return res;
+}
+
+fragment void fragment_main(device int* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupAnd_c6fc92();
+ return;
+}
+
+kernel void compute_main(device int* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupAnd_c6fc92();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl.expected.spvasm b/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl.expected.spvasm
new file mode 100644
index 0000000..fbfe31a
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl.expected.spvasm
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : i32;
+
+fn subgroupAnd_c6fc92() -> i32 {
+ var res : i32 = subgroupAnd(1i);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_c6fc92();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl.expected.wgsl b/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl.expected.wgsl
new file mode 100644
index 0000000..9018965
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/c6fc92.wgsl.expected.wgsl
@@ -0,0 +1,18 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : i32;
+
+fn subgroupAnd_c6fc92() -> i32 {
+ var res : i32 = subgroupAnd(1i);
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupAnd_c6fc92();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_c6fc92();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl b/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl
new file mode 100644
index 0000000..5cb2369
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl
@@ -0,0 +1,58 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<u32>;
+
+
+// fn subgroupAnd(value: vec<4, u32>) -> vec<4, u32>
+fn subgroupAnd_d2c9a6() -> vec4<u32>{
+ var res: vec4<u32> = subgroupAnd(vec4<u32>(1u));
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupAnd_d2c9a6();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_d2c9a6();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..15958b6
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl.expected.dxc.hlsl
@@ -0,0 +1,17 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint4 subgroupAnd_d2c9a6() {
+ uint4 res = WaveActiveBitAnd((1u).xxxx);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupAnd_d2c9a6()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupAnd_d2c9a6()));
+ return;
+}
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..148c3e6
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl.expected.fxc.hlsl
@@ -0,0 +1,17 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint4 subgroupAnd_d2c9a6() {
+ uint4 res = WaveActiveBitAnd((1u).xxxx);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupAnd_d2c9a6()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001576ECA5300(4,15-41): error X3004: undeclared identifier 'WaveActiveBitAnd'
+
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl.expected.glsl b/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl.expected.glsl
new file mode 100644
index 0000000..ad56764
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl.expected.glsl
@@ -0,0 +1,21 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<u32>;
+
+fn subgroupAnd_d2c9a6() -> vec4<u32> {
+ var res : vec4<u32> = subgroupAnd(vec4<u32>(1u));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_d2c9a6();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..f35138f
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,16 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+uint4 subgroupAnd_d2c9a6() {
+ uint4 res = WaveActiveBitAnd((1u).xxxx);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store4(0u, subgroupAnd_d2c9a6());
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, subgroupAnd_d2c9a6());
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl.expected.ir.msl
new file mode 100644
index 0000000..34f7917
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl.expected.ir.msl
@@ -0,0 +1,21 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device uint4* prevent_dce;
+};
+
+uint4 subgroupAnd_d2c9a6() {
+ uint4 res = simd_and(uint4(1u));
+ return res;
+}
+
+fragment void fragment_main(device uint4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAnd_d2c9a6();
+}
+
+kernel void compute_main(device uint4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAnd_d2c9a6();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..7890363
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl.expected.ir.spvasm
@@ -0,0 +1,58 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 28
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupAnd_d2c9a6 "subgroupAnd_d2c9a6"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %uint = OpTypeInt 32 0
+ %v4uint = OpTypeVector %uint 4
+%tint_symbol_1 = OpTypeStruct %v4uint
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v4uint
+ %uint_3 = OpConstant %uint 3
+ %uint_1 = OpConstant %uint 1
+ %11 = OpConstantComposite %v4uint %uint_1 %uint_1 %uint_1 %uint_1
+%_ptr_Function_v4uint = OpTypePointer Function %v4uint
+ %void = OpTypeVoid
+ %18 = OpTypeFunction %void
+%_ptr_StorageBuffer_v4uint = OpTypePointer StorageBuffer %v4uint
+ %uint_0 = OpConstant %uint 0
+%subgroupAnd_d2c9a6 = OpFunction %v4uint None %7
+ %8 = OpLabel
+ %res = OpVariable %_ptr_Function_v4uint Function
+ %9 = OpGroupNonUniformBitwiseAnd %v4uint %uint_3 Reduce %11
+ OpStore %res %9
+ %15 = OpLoad %v4uint %res
+ OpReturnValue %15
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %18
+ %19 = OpLabel
+ %20 = OpFunctionCall %v4uint %subgroupAnd_d2c9a6
+ %21 = OpAccessChain %_ptr_StorageBuffer_v4uint %1 %uint_0
+ OpStore %21 %20
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %18
+ %25 = OpLabel
+ %26 = OpFunctionCall %v4uint %subgroupAnd_d2c9a6
+ %27 = OpAccessChain %_ptr_StorageBuffer_v4uint %1 %uint_0
+ OpStore %27 %26
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl.expected.msl b/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl.expected.msl
new file mode 100644
index 0000000..1af3d4f
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl.expected.msl
@@ -0,0 +1,18 @@
+#include <metal_stdlib>
+
+using namespace metal;
+uint4 subgroupAnd_d2c9a6() {
+ uint4 res = simd_and(uint4(1u));
+ return res;
+}
+
+fragment void fragment_main(device uint4* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupAnd_d2c9a6();
+ return;
+}
+
+kernel void compute_main(device uint4* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupAnd_d2c9a6();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl.expected.spvasm b/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl.expected.spvasm
new file mode 100644
index 0000000..66daac9
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl.expected.spvasm
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<u32>;
+
+fn subgroupAnd_d2c9a6() -> vec4<u32> {
+ var res : vec4<u32> = subgroupAnd(vec4<u32>(1u));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_d2c9a6();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl.expected.wgsl b/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl.expected.wgsl
new file mode 100644
index 0000000..81d4192
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupAnd/d2c9a6.wgsl.expected.wgsl
@@ -0,0 +1,18 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<u32>;
+
+fn subgroupAnd_d2c9a6() -> vec4<u32> {
+ var res : vec4<u32> = subgroupAnd(vec4<u32>(1u));
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupAnd_d2c9a6();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_d2c9a6();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupBallot/1a8251.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBallot/1a8251.wgsl.expected.fxc.hlsl
index 0b7c2e7..9037fc7 100644
--- a/test/tint/builtins/gen/literal/subgroupBallot/1a8251.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupBallot/1a8251.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store4(0u, asuint(subgroupBallot_1a8251()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000002563DC4D4F0(4,15-36): error X3004: undeclared identifier 'WaveActiveBallot'
+
diff --git a/test/tint/builtins/gen/literal/subgroupBallot/1a8251.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupBallot/1a8251.wgsl.expected.ir.dxc.hlsl
index afcaa70..6339f6a 100644
--- a/test/tint/builtins/gen/literal/subgroupBallot/1a8251.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupBallot/1a8251.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store4(0u, subgroupBallot_1a8251());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store4(0u, subgroupBallot_1a8251());
diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/07e2d8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/07e2d8.wgsl.expected.fxc.hlsl
index 157e3dd..82c4a6c 100644
--- a/test/tint/builtins/gen/literal/subgroupBroadcast/07e2d8.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupBroadcast/07e2d8.wgsl.expected.fxc.hlsl
@@ -1,14 +1,17 @@
SKIP: FAILED
-RWByteAddressBuffer prevent_dce : register(u0, space2);
+RWByteAddressBuffer prevent_dce : register(u0);
-void subgroupBroadcast_07e2d8() {
+float16_t subgroupBroadcast_07e2d8() {
float16_t res = WaveReadLaneAt(float16_t(1.0h), 1u);
- prevent_dce.Store<float16_t>(0u, res);
+ return res;
}
[numthreads(1, 1, 1)]
void compute_main() {
- subgroupBroadcast_07e2d8();
+ prevent_dce.Store<float16_t>(0u, subgroupBroadcast_07e2d8());
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000207D706F440(3,1-9): error X3000: unrecognized identifier 'float16_t'
+
diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/07e2d8.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/07e2d8.wgsl.expected.ir.dxc.hlsl
index 32aec75..4d70c8b 100644
--- a/test/tint/builtins/gen/literal/subgroupBroadcast/07e2d8.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupBroadcast/07e2d8.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<float16_t>(0u, subgroupBroadcast_07e2d8());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<float16_t>(0u, subgroupBroadcast_07e2d8());
diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/08beca.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/08beca.wgsl.expected.fxc.hlsl
index 9f667dd..af3b990 100644
--- a/test/tint/builtins/gen/literal/subgroupBroadcast/08beca.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupBroadcast/08beca.wgsl.expected.fxc.hlsl
@@ -1,9 +1,17 @@
SKIP: FAILED
-/build/dawn/src/tint/lang/hlsl/writer/ast_printer/ast_printer.cc:2510 internal compiler error: TINT_UNREACHABLE unexpected subgroup builtin type subgroupBroadcast
-********************************************************************
-* The tint shader compiler has encountered an unexpected error. *
-* *
-* Please help us fix this issue by submitting a bug report at *
-* crbug.com/tint with the source program that triggered the bug. *
-********************************************************************
+RWByteAddressBuffer prevent_dce : register(u0);
+
+float subgroupBroadcast_08beca() {
+ float res = WaveReadLaneAt(1.0f, 1u);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupBroadcast_08beca()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001F382910100(4,15-38): error X3004: undeclared identifier 'WaveReadLaneAt'
+
diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/08beca.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/08beca.wgsl.expected.ir.dxc.hlsl
index 2ee8261..6c884c6 100644
--- a/test/tint/builtins/gen/literal/subgroupBroadcast/08beca.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupBroadcast/08beca.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupBroadcast_08beca()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store(0u, asuint(subgroupBroadcast_08beca()));
diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/0f44e2.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/0f44e2.wgsl.expected.fxc.hlsl
index 9f667dd..ac6f641 100644
--- a/test/tint/builtins/gen/literal/subgroupBroadcast/0f44e2.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupBroadcast/0f44e2.wgsl.expected.fxc.hlsl
@@ -1,9 +1,17 @@
SKIP: FAILED
-/build/dawn/src/tint/lang/hlsl/writer/ast_printer/ast_printer.cc:2510 internal compiler error: TINT_UNREACHABLE unexpected subgroup builtin type subgroupBroadcast
-********************************************************************
-* The tint shader compiler has encountered an unexpected error. *
-* *
-* Please help us fix this issue by submitting a bug report at *
-* crbug.com/tint with the source program that triggered the bug. *
-********************************************************************
+RWByteAddressBuffer prevent_dce : register(u0);
+
+vector<float16_t, 4> subgroupBroadcast_0f44e2() {
+ vector<float16_t, 4> res = WaveReadLaneAt((float16_t(1.0h)).xxxx, 1u);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store<vector<float16_t, 4> >(0u, subgroupBroadcast_0f44e2());
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000019016CEC400(3,8-16): error X3000: syntax error: unexpected token 'float16_t'
+
diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/0f44e2.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/0f44e2.wgsl.expected.ir.dxc.hlsl
index 596a06b..b0beabd 100644
--- a/test/tint/builtins/gen/literal/subgroupBroadcast/0f44e2.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupBroadcast/0f44e2.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<vector<float16_t, 4> >(0u, subgroupBroadcast_0f44e2());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<vector<float16_t, 4> >(0u, subgroupBroadcast_0f44e2());
diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/13f36c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/13f36c.wgsl.expected.fxc.hlsl
index 9f667dd..4c8411f 100644
--- a/test/tint/builtins/gen/literal/subgroupBroadcast/13f36c.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupBroadcast/13f36c.wgsl.expected.fxc.hlsl
@@ -1,9 +1,17 @@
SKIP: FAILED
-/build/dawn/src/tint/lang/hlsl/writer/ast_printer/ast_printer.cc:2510 internal compiler error: TINT_UNREACHABLE unexpected subgroup builtin type subgroupBroadcast
-********************************************************************
-* The tint shader compiler has encountered an unexpected error. *
-* *
-* Please help us fix this issue by submitting a bug report at *
-* crbug.com/tint with the source program that triggered the bug. *
-********************************************************************
+RWByteAddressBuffer prevent_dce : register(u0);
+
+vector<float16_t, 2> subgroupBroadcast_13f36c() {
+ vector<float16_t, 2> res = WaveReadLaneAt((float16_t(1.0h)).xx, 1u);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store<vector<float16_t, 2> >(0u, subgroupBroadcast_13f36c());
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000027E59DAF440(3,8-16): error X3000: syntax error: unexpected token 'float16_t'
+
diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/13f36c.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/13f36c.wgsl.expected.ir.dxc.hlsl
index 0c5b327..7c528c8 100644
--- a/test/tint/builtins/gen/literal/subgroupBroadcast/13f36c.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupBroadcast/13f36c.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<vector<float16_t, 2> >(0u, subgroupBroadcast_13f36c());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<vector<float16_t, 2> >(0u, subgroupBroadcast_13f36c());
diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/1d79c7.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/1d79c7.wgsl.expected.fxc.hlsl
index 9f667dd..092f41e 100644
--- a/test/tint/builtins/gen/literal/subgroupBroadcast/1d79c7.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupBroadcast/1d79c7.wgsl.expected.fxc.hlsl
@@ -1,9 +1,17 @@
SKIP: FAILED
-/build/dawn/src/tint/lang/hlsl/writer/ast_printer/ast_printer.cc:2510 internal compiler error: TINT_UNREACHABLE unexpected subgroup builtin type subgroupBroadcast
-********************************************************************
-* The tint shader compiler has encountered an unexpected error. *
-* *
-* Please help us fix this issue by submitting a bug report at *
-* crbug.com/tint with the source program that triggered the bug. *
-********************************************************************
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int subgroupBroadcast_1d79c7() {
+ int res = WaveReadLaneAt(1, 1u);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupBroadcast_1d79c7()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000017D40F3C6A0(4,13-33): error X3004: undeclared identifier 'WaveReadLaneAt'
+
diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/1d79c7.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/1d79c7.wgsl.expected.ir.dxc.hlsl
index f7ca939..a46a6c0 100644
--- a/test/tint/builtins/gen/literal/subgroupBroadcast/1d79c7.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupBroadcast/1d79c7.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupBroadcast_1d79c7()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store(0u, asuint(subgroupBroadcast_1d79c7()));
diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/279027.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/279027.wgsl.expected.fxc.hlsl
index 9f667dd..5abc47c 100644
--- a/test/tint/builtins/gen/literal/subgroupBroadcast/279027.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupBroadcast/279027.wgsl.expected.fxc.hlsl
@@ -1,9 +1,17 @@
SKIP: FAILED
-/build/dawn/src/tint/lang/hlsl/writer/ast_printer/ast_printer.cc:2510 internal compiler error: TINT_UNREACHABLE unexpected subgroup builtin type subgroupBroadcast
-********************************************************************
-* The tint shader compiler has encountered an unexpected error. *
-* *
-* Please help us fix this issue by submitting a bug report at *
-* crbug.com/tint with the source program that triggered the bug. *
-********************************************************************
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint4 subgroupBroadcast_279027() {
+ uint4 res = WaveReadLaneAt((1u).xxxx, 1u);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupBroadcast_279027()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000002212FF5C630(4,15-43): error X3004: undeclared identifier 'WaveReadLaneAt'
+
diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/279027.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/279027.wgsl.expected.ir.dxc.hlsl
index ed7f18d..c136189 100644
--- a/test/tint/builtins/gen/literal/subgroupBroadcast/279027.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupBroadcast/279027.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store4(0u, subgroupBroadcast_279027());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store4(0u, subgroupBroadcast_279027());
diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/34fa3d.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/34fa3d.wgsl.expected.fxc.hlsl
index 9f667dd..7c1babf 100644
--- a/test/tint/builtins/gen/literal/subgroupBroadcast/34fa3d.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupBroadcast/34fa3d.wgsl.expected.fxc.hlsl
@@ -1,9 +1,17 @@
SKIP: FAILED
-/build/dawn/src/tint/lang/hlsl/writer/ast_printer/ast_printer.cc:2510 internal compiler error: TINT_UNREACHABLE unexpected subgroup builtin type subgroupBroadcast
-********************************************************************
-* The tint shader compiler has encountered an unexpected error. *
-* *
-* Please help us fix this issue by submitting a bug report at *
-* crbug.com/tint with the source program that triggered the bug. *
-********************************************************************
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint3 subgroupBroadcast_34fa3d() {
+ uint3 res = WaveReadLaneAt((1u).xxx, 1u);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupBroadcast_34fa3d()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000002247C411740(4,15-42): error X3004: undeclared identifier 'WaveReadLaneAt'
+
diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/34fa3d.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/34fa3d.wgsl.expected.ir.dxc.hlsl
index 8269f0f..6fb8eaf 100644
--- a/test/tint/builtins/gen/literal/subgroupBroadcast/34fa3d.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupBroadcast/34fa3d.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store3(0u, subgroupBroadcast_34fa3d());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store3(0u, subgroupBroadcast_34fa3d());
diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/3e6879.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/3e6879.wgsl.expected.fxc.hlsl
index 9f667dd..a89cad2 100644
--- a/test/tint/builtins/gen/literal/subgroupBroadcast/3e6879.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupBroadcast/3e6879.wgsl.expected.fxc.hlsl
@@ -1,9 +1,17 @@
SKIP: FAILED
-/build/dawn/src/tint/lang/hlsl/writer/ast_printer/ast_printer.cc:2510 internal compiler error: TINT_UNREACHABLE unexpected subgroup builtin type subgroupBroadcast
-********************************************************************
-* The tint shader compiler has encountered an unexpected error. *
-* *
-* Please help us fix this issue by submitting a bug report at *
-* crbug.com/tint with the source program that triggered the bug. *
-********************************************************************
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int2 subgroupBroadcast_3e6879() {
+ int2 res = WaveReadLaneAt((1).xx, 1u);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupBroadcast_3e6879()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000024C7A480D80(4,14-39): error X3004: undeclared identifier 'WaveReadLaneAt'
+
diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/3e6879.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/3e6879.wgsl.expected.ir.dxc.hlsl
index 01a78e8..dd38aef 100644
--- a/test/tint/builtins/gen/literal/subgroupBroadcast/3e6879.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupBroadcast/3e6879.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupBroadcast_3e6879()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store2(0u, asuint(subgroupBroadcast_3e6879()));
diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/41e5d7.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/41e5d7.wgsl.expected.fxc.hlsl
index 9f667dd..089c5ad 100644
--- a/test/tint/builtins/gen/literal/subgroupBroadcast/41e5d7.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupBroadcast/41e5d7.wgsl.expected.fxc.hlsl
@@ -1,9 +1,17 @@
SKIP: FAILED
-/build/dawn/src/tint/lang/hlsl/writer/ast_printer/ast_printer.cc:2510 internal compiler error: TINT_UNREACHABLE unexpected subgroup builtin type subgroupBroadcast
-********************************************************************
-* The tint shader compiler has encountered an unexpected error. *
-* *
-* Please help us fix this issue by submitting a bug report at *
-* crbug.com/tint with the source program that triggered the bug. *
-********************************************************************
+RWByteAddressBuffer prevent_dce : register(u0);
+
+vector<float16_t, 3> subgroupBroadcast_41e5d7() {
+ vector<float16_t, 3> res = WaveReadLaneAt((float16_t(1.0h)).xxx, 1u);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store<vector<float16_t, 3> >(0u, subgroupBroadcast_41e5d7());
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000213C7AF8740(3,8-16): error X3000: syntax error: unexpected token 'float16_t'
+
diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/41e5d7.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/41e5d7.wgsl.expected.ir.dxc.hlsl
index 07d3bef..e2c578d 100644
--- a/test/tint/builtins/gen/literal/subgroupBroadcast/41e5d7.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupBroadcast/41e5d7.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<vector<float16_t, 3> >(0u, subgroupBroadcast_41e5d7());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<vector<float16_t, 3> >(0u, subgroupBroadcast_41e5d7());
diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/4a4334.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/4a4334.wgsl.expected.fxc.hlsl
index 9f667dd..723b874 100644
--- a/test/tint/builtins/gen/literal/subgroupBroadcast/4a4334.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupBroadcast/4a4334.wgsl.expected.fxc.hlsl
@@ -1,9 +1,17 @@
SKIP: FAILED
-/build/dawn/src/tint/lang/hlsl/writer/ast_printer/ast_printer.cc:2510 internal compiler error: TINT_UNREACHABLE unexpected subgroup builtin type subgroupBroadcast
-********************************************************************
-* The tint shader compiler has encountered an unexpected error. *
-* *
-* Please help us fix this issue by submitting a bug report at *
-* crbug.com/tint with the source program that triggered the bug. *
-********************************************************************
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint2 subgroupBroadcast_4a4334() {
+ uint2 res = WaveReadLaneAt((1u).xx, 1u);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupBroadcast_4a4334()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000017F3FA1F380(4,15-41): error X3004: undeclared identifier 'WaveReadLaneAt'
+
diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/4a4334.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/4a4334.wgsl.expected.ir.dxc.hlsl
index 265729a..75e478d 100644
--- a/test/tint/builtins/gen/literal/subgroupBroadcast/4a4334.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupBroadcast/4a4334.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store2(0u, subgroupBroadcast_4a4334());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store2(0u, subgroupBroadcast_4a4334());
diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/5196c8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/5196c8.wgsl.expected.fxc.hlsl
index 9f667dd..3e3304f 100644
--- a/test/tint/builtins/gen/literal/subgroupBroadcast/5196c8.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupBroadcast/5196c8.wgsl.expected.fxc.hlsl
@@ -1,9 +1,17 @@
SKIP: FAILED
-/build/dawn/src/tint/lang/hlsl/writer/ast_printer/ast_printer.cc:2510 internal compiler error: TINT_UNREACHABLE unexpected subgroup builtin type subgroupBroadcast
-********************************************************************
-* The tint shader compiler has encountered an unexpected error. *
-* *
-* Please help us fix this issue by submitting a bug report at *
-* crbug.com/tint with the source program that triggered the bug. *
-********************************************************************
+RWByteAddressBuffer prevent_dce : register(u0);
+
+float2 subgroupBroadcast_5196c8() {
+ float2 res = WaveReadLaneAt((1.0f).xx, 1u);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupBroadcast_5196c8()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000224A7E223E0(4,16-44): error X3004: undeclared identifier 'WaveReadLaneAt'
+
diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/5196c8.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/5196c8.wgsl.expected.ir.dxc.hlsl
index c8b9822..a237473 100644
--- a/test/tint/builtins/gen/literal/subgroupBroadcast/5196c8.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupBroadcast/5196c8.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupBroadcast_5196c8()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store2(0u, asuint(subgroupBroadcast_5196c8()));
diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/912ff5.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/912ff5.wgsl.expected.fxc.hlsl
index 9f667dd..d5cb6a2 100644
--- a/test/tint/builtins/gen/literal/subgroupBroadcast/912ff5.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupBroadcast/912ff5.wgsl.expected.fxc.hlsl
@@ -1,9 +1,17 @@
SKIP: FAILED
-/build/dawn/src/tint/lang/hlsl/writer/ast_printer/ast_printer.cc:2510 internal compiler error: TINT_UNREACHABLE unexpected subgroup builtin type subgroupBroadcast
-********************************************************************
-* The tint shader compiler has encountered an unexpected error. *
-* *
-* Please help us fix this issue by submitting a bug report at *
-* crbug.com/tint with the source program that triggered the bug. *
-********************************************************************
+RWByteAddressBuffer prevent_dce : register(u0);
+
+float3 subgroupBroadcast_912ff5() {
+ float3 res = WaveReadLaneAt((1.0f).xxx, 1u);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupBroadcast_912ff5()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001F7AC5AEE90(4,16-45): error X3004: undeclared identifier 'WaveReadLaneAt'
+
diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/912ff5.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/912ff5.wgsl.expected.ir.dxc.hlsl
index 64ceb3a..79677bd 100644
--- a/test/tint/builtins/gen/literal/subgroupBroadcast/912ff5.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupBroadcast/912ff5.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupBroadcast_912ff5()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store3(0u, asuint(subgroupBroadcast_912ff5()));
diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/b7e93b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/b7e93b.wgsl.expected.fxc.hlsl
index 9f667dd..2904a3c 100644
--- a/test/tint/builtins/gen/literal/subgroupBroadcast/b7e93b.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupBroadcast/b7e93b.wgsl.expected.fxc.hlsl
@@ -1,9 +1,17 @@
SKIP: FAILED
-/build/dawn/src/tint/lang/hlsl/writer/ast_printer/ast_printer.cc:2510 internal compiler error: TINT_UNREACHABLE unexpected subgroup builtin type subgroupBroadcast
-********************************************************************
-* The tint shader compiler has encountered an unexpected error. *
-* *
-* Please help us fix this issue by submitting a bug report at *
-* crbug.com/tint with the source program that triggered the bug. *
-********************************************************************
+RWByteAddressBuffer prevent_dce : register(u0);
+
+float4 subgroupBroadcast_b7e93b() {
+ float4 res = WaveReadLaneAt((1.0f).xxxx, 1u);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupBroadcast_b7e93b()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000002A4C62002F0(4,16-46): error X3004: undeclared identifier 'WaveReadLaneAt'
+
diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/b7e93b.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/b7e93b.wgsl.expected.ir.dxc.hlsl
index 8ded22c..f293c2f 100644
--- a/test/tint/builtins/gen/literal/subgroupBroadcast/b7e93b.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupBroadcast/b7e93b.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupBroadcast_b7e93b()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store4(0u, asuint(subgroupBroadcast_b7e93b()));
diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/c36fe1.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/c36fe1.wgsl.expected.fxc.hlsl
index 9f667dd..6d7e6c6 100644
--- a/test/tint/builtins/gen/literal/subgroupBroadcast/c36fe1.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupBroadcast/c36fe1.wgsl.expected.fxc.hlsl
@@ -1,9 +1,17 @@
SKIP: FAILED
-/build/dawn/src/tint/lang/hlsl/writer/ast_printer/ast_printer.cc:2510 internal compiler error: TINT_UNREACHABLE unexpected subgroup builtin type subgroupBroadcast
-********************************************************************
-* The tint shader compiler has encountered an unexpected error. *
-* *
-* Please help us fix this issue by submitting a bug report at *
-* crbug.com/tint with the source program that triggered the bug. *
-********************************************************************
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint subgroupBroadcast_c36fe1() {
+ uint res = WaveReadLaneAt(1u, 1u);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupBroadcast_c36fe1()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000028F3D630CD0(4,14-35): error X3004: undeclared identifier 'WaveReadLaneAt'
+
diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/c36fe1.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/c36fe1.wgsl.expected.ir.dxc.hlsl
index f68bf9d..ee48ffc 100644
--- a/test/tint/builtins/gen/literal/subgroupBroadcast/c36fe1.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupBroadcast/c36fe1.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store(0u, subgroupBroadcast_c36fe1());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store(0u, subgroupBroadcast_c36fe1());
diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/e275c8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/e275c8.wgsl.expected.fxc.hlsl
index 9f667dd..70976fa 100644
--- a/test/tint/builtins/gen/literal/subgroupBroadcast/e275c8.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupBroadcast/e275c8.wgsl.expected.fxc.hlsl
@@ -1,9 +1,17 @@
SKIP: FAILED
-/build/dawn/src/tint/lang/hlsl/writer/ast_printer/ast_printer.cc:2510 internal compiler error: TINT_UNREACHABLE unexpected subgroup builtin type subgroupBroadcast
-********************************************************************
-* The tint shader compiler has encountered an unexpected error. *
-* *
-* Please help us fix this issue by submitting a bug report at *
-* crbug.com/tint with the source program that triggered the bug. *
-********************************************************************
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int3 subgroupBroadcast_e275c8() {
+ int3 res = WaveReadLaneAt((1).xxx, 1u);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupBroadcast_e275c8()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000002A9C6836020(4,14-40): error X3004: undeclared identifier 'WaveReadLaneAt'
+
diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/e275c8.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/e275c8.wgsl.expected.ir.dxc.hlsl
index 2688f25..f0ac901 100644
--- a/test/tint/builtins/gen/literal/subgroupBroadcast/e275c8.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupBroadcast/e275c8.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupBroadcast_e275c8()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store3(0u, asuint(subgroupBroadcast_e275c8()));
diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/f637f9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/f637f9.wgsl.expected.fxc.hlsl
index 9f667dd..53a7b311 100644
--- a/test/tint/builtins/gen/literal/subgroupBroadcast/f637f9.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupBroadcast/f637f9.wgsl.expected.fxc.hlsl
@@ -1,9 +1,17 @@
SKIP: FAILED
-/build/dawn/src/tint/lang/hlsl/writer/ast_printer/ast_printer.cc:2510 internal compiler error: TINT_UNREACHABLE unexpected subgroup builtin type subgroupBroadcast
-********************************************************************
-* The tint shader compiler has encountered an unexpected error. *
-* *
-* Please help us fix this issue by submitting a bug report at *
-* crbug.com/tint with the source program that triggered the bug. *
-********************************************************************
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int4 subgroupBroadcast_f637f9() {
+ int4 res = WaveReadLaneAt((1).xxxx, 1u);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupBroadcast_f637f9()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001EC7B068090(4,14-41): error X3004: undeclared identifier 'WaveReadLaneAt'
+
diff --git a/test/tint/builtins/gen/literal/subgroupBroadcast/f637f9.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupBroadcast/f637f9.wgsl.expected.ir.dxc.hlsl
index 528079b..3ac8c00 100644
--- a/test/tint/builtins/gen/literal/subgroupBroadcast/f637f9.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupBroadcast/f637f9.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupBroadcast_f637f9()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store4(0u, asuint(subgroupBroadcast_f637f9()));
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/01de08.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/01de08.wgsl.expected.fxc.hlsl
index 8ee3e90..b4450fc 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/01de08.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/01de08.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store<vector<float16_t, 2> >(0u, subgroupExclusiveAdd_01de08());
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001C39A2580B0(3,8-16): error X3000: syntax error: unexpected token 'float16_t'
+
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/01de08.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/01de08.wgsl.expected.ir.dxc.hlsl
index f8e3f12..7341b83 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/01de08.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/01de08.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<vector<float16_t, 2> >(0u, subgroupExclusiveAdd_01de08());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<vector<float16_t, 2> >(0u, subgroupExclusiveAdd_01de08());
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/01de08.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/01de08.wgsl.expected.ir.msl
index f595c4a..c727100 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/01de08.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/01de08.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device half2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_01de08();
+}
+
kernel void compute_main(device half2* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_01de08();
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/0ff95a.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/0ff95a.wgsl.expected.fxc.hlsl
index 3aa01d6..175313c 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/0ff95a.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/0ff95a.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store3(0u, asuint(subgroupExclusiveAdd_0ff95a()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000217AC3EC550(4,15-37): error X3004: undeclared identifier 'WavePrefixSum'
+
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/0ff95a.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/0ff95a.wgsl.expected.ir.dxc.hlsl
index dba3306..825de03 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/0ff95a.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/0ff95a.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store3(0u, subgroupExclusiveAdd_0ff95a());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store3(0u, subgroupExclusiveAdd_0ff95a());
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/0ff95a.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/0ff95a.wgsl.expected.ir.msl
index a2c95f9..42ae314 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/0ff95a.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/0ff95a.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device uint3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_0ff95a();
+}
+
kernel void compute_main(device uint3* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_0ff95a();
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/406ab4.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/406ab4.wgsl.expected.fxc.hlsl
index 7281ba0..50fcf02 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/406ab4.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/406ab4.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store4(0u, asuint(subgroupExclusiveAdd_406ab4()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000002ABAC96F970(4,14-36): error X3004: undeclared identifier 'WavePrefixSum'
+
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/406ab4.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/406ab4.wgsl.expected.ir.dxc.hlsl
index c4c2e98..28d6f69 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/406ab4.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/406ab4.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupExclusiveAdd_406ab4()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store4(0u, asuint(subgroupExclusiveAdd_406ab4()));
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/406ab4.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/406ab4.wgsl.expected.ir.msl
index e2adb10..b4559e8 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/406ab4.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/406ab4.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device int4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_406ab4();
+}
+
kernel void compute_main(device int4* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_406ab4();
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/41cfde.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/41cfde.wgsl.expected.fxc.hlsl
index 8ba31d5..9a7bb13 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/41cfde.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/41cfde.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store3(0u, asuint(subgroupExclusiveAdd_41cfde()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000002044F4DC550(4,16-40): error X3004: undeclared identifier 'WavePrefixSum'
+
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/41cfde.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/41cfde.wgsl.expected.ir.dxc.hlsl
index c5a42fd..57bb3ba 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/41cfde.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/41cfde.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupExclusiveAdd_41cfde()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store3(0u, asuint(subgroupExclusiveAdd_41cfde()));
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/41cfde.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/41cfde.wgsl.expected.ir.msl
index d400884..0ea6ee6 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/41cfde.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/41cfde.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device float3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_41cfde();
+}
+
kernel void compute_main(device float3* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_41cfde();
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/42684c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/42684c.wgsl.expected.fxc.hlsl
index 955a0d7..e6074a5 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/42684c.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/42684c.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store(0u, asuint(subgroupExclusiveAdd_42684c()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001F78FBAF3F0(4,14-30): error X3004: undeclared identifier 'WavePrefixSum'
+
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/42684c.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/42684c.wgsl.expected.ir.dxc.hlsl
index 5de8777..832d7ef 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/42684c.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/42684c.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store(0u, subgroupExclusiveAdd_42684c());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store(0u, subgroupExclusiveAdd_42684c());
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/42684c.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/42684c.wgsl.expected.ir.msl
index d192852..d0d96cc 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/42684c.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/42684c.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device uint* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_42684c();
+}
+
kernel void compute_main(device uint* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_42684c();
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/48acea.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/48acea.wgsl.expected.fxc.hlsl
index a6ff3d9..ede5c21 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/48acea.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/48acea.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store2(0u, asuint(subgroupExclusiveAdd_48acea()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000002434C54CE20(4,15-36): error X3004: undeclared identifier 'WavePrefixSum'
+
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/48acea.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/48acea.wgsl.expected.ir.dxc.hlsl
index 926a30d..a50e53c 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/48acea.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/48acea.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store2(0u, subgroupExclusiveAdd_48acea());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store2(0u, subgroupExclusiveAdd_48acea());
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/48acea.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/48acea.wgsl.expected.ir.msl
index 349ff97..ebbb1dc 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/48acea.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/48acea.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device uint2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_48acea();
+}
+
kernel void compute_main(device uint2* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_48acea();
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4a1568.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4a1568.wgsl.expected.fxc.hlsl
index 45a569a..dc2c87b 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4a1568.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4a1568.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store<float16_t>(0u, subgroupExclusiveAdd_4a1568());
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000015CCCF51AB0(3,1-9): error X3000: unrecognized identifier 'float16_t'
+
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4a1568.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4a1568.wgsl.expected.ir.dxc.hlsl
index d589d20..7520bf6 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4a1568.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4a1568.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<float16_t>(0u, subgroupExclusiveAdd_4a1568());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<float16_t>(0u, subgroupExclusiveAdd_4a1568());
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4a1568.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4a1568.wgsl.expected.ir.msl
index ea83663..7dd1edc 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4a1568.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4a1568.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device half* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_4a1568();
+}
+
kernel void compute_main(device half* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_4a1568();
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4c8024.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4c8024.wgsl.expected.fxc.hlsl
index ee30a7c..f9087e0 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4c8024.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4c8024.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store2(0u, asuint(subgroupExclusiveAdd_4c8024()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001FCA2BDF3F0(4,16-39): error X3004: undeclared identifier 'WavePrefixSum'
+
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4c8024.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4c8024.wgsl.expected.ir.dxc.hlsl
index c7188f9..b58dae7 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4c8024.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4c8024.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupExclusiveAdd_4c8024()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store2(0u, asuint(subgroupExclusiveAdd_4c8024()));
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4c8024.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4c8024.wgsl.expected.ir.msl
index c9e215c..8ad8c28 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4c8024.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/4c8024.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device float2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_4c8024();
+}
+
kernel void compute_main(device float2* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_4c8024();
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/71ad0f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/71ad0f.wgsl.expected.fxc.hlsl
index c837f15..3111933 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/71ad0f.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/71ad0f.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store4(0u, asuint(subgroupExclusiveAdd_71ad0f()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000160F97AC550(4,16-41): error X3004: undeclared identifier 'WavePrefixSum'
+
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/71ad0f.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/71ad0f.wgsl.expected.ir.dxc.hlsl
index 731888d..0230df0 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/71ad0f.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/71ad0f.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupExclusiveAdd_71ad0f()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store4(0u, asuint(subgroupExclusiveAdd_71ad0f()));
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/71ad0f.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/71ad0f.wgsl.expected.ir.msl
index b4bd39d..c2949fd 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/71ad0f.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/71ad0f.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device float4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_71ad0f();
+}
+
kernel void compute_main(device float4* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_71ad0f();
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/95e984.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/95e984.wgsl.expected.fxc.hlsl
index 6664dea..cf95992 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/95e984.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/95e984.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store<vector<float16_t, 4> >(0u, subgroupExclusiveAdd_95e984());
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000019C4A627D30(3,8-16): error X3000: syntax error: unexpected token 'float16_t'
+
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/95e984.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/95e984.wgsl.expected.ir.dxc.hlsl
index 142b7c3..e01283a 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/95e984.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/95e984.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<vector<float16_t, 4> >(0u, subgroupExclusiveAdd_95e984());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<vector<float16_t, 4> >(0u, subgroupExclusiveAdd_95e984());
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/95e984.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/95e984.wgsl.expected.ir.msl
index 75ba999..5a587db 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/95e984.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/95e984.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device half4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_95e984();
+}
+
kernel void compute_main(device half4* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_95e984();
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/967e38.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/967e38.wgsl.expected.fxc.hlsl
index 97048be..65b03ee 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/967e38.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/967e38.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store(0u, asuint(subgroupExclusiveAdd_967e38()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000192073E8300(4,15-33): error X3004: undeclared identifier 'WavePrefixSum'
+
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/967e38.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/967e38.wgsl.expected.ir.dxc.hlsl
index f65fa36..e3bc466 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/967e38.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/967e38.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupExclusiveAdd_967e38()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store(0u, asuint(subgroupExclusiveAdd_967e38()));
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/967e38.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/967e38.wgsl.expected.ir.msl
index 9d358dd..efa4e7f 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/967e38.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/967e38.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device float* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_967e38();
+}
+
kernel void compute_main(device float* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_967e38();
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/b0c261.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/b0c261.wgsl.expected.fxc.hlsl
index 8fba167..d32bfa5 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/b0c261.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/b0c261.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store(0u, asuint(subgroupExclusiveAdd_b0c261()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000027EADF51C30(4,13-28): error X3004: undeclared identifier 'WavePrefixSum'
+
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/b0c261.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/b0c261.wgsl.expected.ir.dxc.hlsl
index 8664606..a49ac3c 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/b0c261.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/b0c261.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupExclusiveAdd_b0c261()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store(0u, asuint(subgroupExclusiveAdd_b0c261()));
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/b0c261.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/b0c261.wgsl.expected.ir.msl
index 8d49f49..48b9211 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/b0c261.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/b0c261.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device int* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_b0c261();
+}
+
kernel void compute_main(device int* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_b0c261();
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/c08160.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/c08160.wgsl.expected.fxc.hlsl
index 2750d7a..353aaf1 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/c08160.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/c08160.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store3(0u, asuint(subgroupExclusiveAdd_c08160()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000278EC974970(4,14-35): error X3004: undeclared identifier 'WavePrefixSum'
+
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/c08160.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/c08160.wgsl.expected.ir.dxc.hlsl
index c6fb770..18cd9ed 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/c08160.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/c08160.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupExclusiveAdd_c08160()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store3(0u, asuint(subgroupExclusiveAdd_c08160()));
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/c08160.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/c08160.wgsl.expected.ir.msl
index b6d018f..33b41db 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/c08160.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/c08160.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device int3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_c08160();
+}
+
kernel void compute_main(device int3* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_c08160();
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/e58e23.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/e58e23.wgsl.expected.fxc.hlsl
index ab9ac06..bb71690 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/e58e23.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/e58e23.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store<vector<float16_t, 3> >(0u, subgroupExclusiveAdd_e58e23());
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000002903A364710(3,8-16): error X3000: syntax error: unexpected token 'float16_t'
+
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/e58e23.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/e58e23.wgsl.expected.ir.dxc.hlsl
index 39e048f..84df7f3 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/e58e23.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/e58e23.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<vector<float16_t, 3> >(0u, subgroupExclusiveAdd_e58e23());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<vector<float16_t, 3> >(0u, subgroupExclusiveAdd_e58e23());
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/e58e23.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/e58e23.wgsl.expected.ir.msl
index bdf1bd4..eef17ee 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/e58e23.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/e58e23.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device half3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_e58e23();
+}
+
kernel void compute_main(device half3* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_e58e23();
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/ec300f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/ec300f.wgsl.expected.fxc.hlsl
index b7a6e60..111ba58 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/ec300f.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/ec300f.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store4(0u, asuint(subgroupExclusiveAdd_ec300f()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000018FC519F3F0(4,15-38): error X3004: undeclared identifier 'WavePrefixSum'
+
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/ec300f.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/ec300f.wgsl.expected.ir.dxc.hlsl
index 38bbd727..ac8c7cb 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/ec300f.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/ec300f.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store4(0u, subgroupExclusiveAdd_ec300f());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store4(0u, subgroupExclusiveAdd_ec300f());
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/ec300f.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/ec300f.wgsl.expected.ir.msl
index 9bfac87..934cc29 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/ec300f.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/ec300f.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device uint4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_ec300f();
+}
+
kernel void compute_main(device uint4* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_ec300f();
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/f0f712.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/f0f712.wgsl.expected.fxc.hlsl
index e4e83a5..d5b6f16 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/f0f712.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/f0f712.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store2(0u, asuint(subgroupExclusiveAdd_f0f712()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000025AAAA51BF0(4,14-34): error X3004: undeclared identifier 'WavePrefixSum'
+
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/f0f712.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/f0f712.wgsl.expected.ir.dxc.hlsl
index 4092d77..1a3d12b 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/f0f712.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/f0f712.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupExclusiveAdd_f0f712()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store2(0u, asuint(subgroupExclusiveAdd_f0f712()));
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/f0f712.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/f0f712.wgsl.expected.ir.msl
index d7a6be8..bc76b90 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveAdd/f0f712.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveAdd/f0f712.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device int2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_f0f712();
+}
+
kernel void compute_main(device int2* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_f0f712();
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/000b92.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/000b92.wgsl.expected.fxc.hlsl
index 8e83854..cdf4d29 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/000b92.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/000b92.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store4(0u, asuint(subgroupExclusiveMul_000b92()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000002078E8DF3F0(4,15-42): error X3004: undeclared identifier 'WavePrefixProduct'
+
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/000b92.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/000b92.wgsl.expected.ir.dxc.hlsl
index b109c09..c7966c5 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/000b92.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/000b92.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store4(0u, subgroupExclusiveMul_000b92());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store4(0u, subgroupExclusiveMul_000b92());
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/000b92.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/000b92.wgsl.expected.ir.msl
index 8a3de1c..aeb044b 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/000b92.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/000b92.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device uint4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveMul_000b92();
+}
+
kernel void compute_main(device uint4* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveMul_000b92();
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/019660.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/019660.wgsl.expected.fxc.hlsl
index f02f975..09d6dcc 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/019660.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/019660.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store4(0u, asuint(subgroupExclusiveMul_019660()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000021F33F0C7D0(4,14-40): error X3004: undeclared identifier 'WavePrefixProduct'
+
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/019660.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/019660.wgsl.expected.ir.dxc.hlsl
index bdadf6a..b7df744 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/019660.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/019660.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupExclusiveMul_019660()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store4(0u, asuint(subgroupExclusiveMul_019660()));
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/019660.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/019660.wgsl.expected.ir.msl
index e0f69a9..b8e07fc 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/019660.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/019660.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device int4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveMul_019660();
+}
+
kernel void compute_main(device int4* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveMul_019660();
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/0a04d5.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/0a04d5.wgsl.expected.fxc.hlsl
index 4ad2a9a..0194b1f 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/0a04d5.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/0a04d5.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store3(0u, asuint(subgroupExclusiveMul_0a04d5()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001566884C550(4,16-44): error X3004: undeclared identifier 'WavePrefixProduct'
+
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/0a04d5.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/0a04d5.wgsl.expected.ir.dxc.hlsl
index 0e7a797..5032146 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/0a04d5.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/0a04d5.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupExclusiveMul_0a04d5()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store3(0u, asuint(subgroupExclusiveMul_0a04d5()));
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/0a04d5.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/0a04d5.wgsl.expected.ir.msl
index a141b09..ff0006a 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/0a04d5.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/0a04d5.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device float3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveMul_0a04d5();
+}
+
kernel void compute_main(device float3* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveMul_0a04d5();
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/13ba26.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/13ba26.wgsl.expected.fxc.hlsl
index ca0464b..2f55529 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/13ba26.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/13ba26.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store<vector<float16_t, 3> >(0u, subgroupExclusiveMul_13ba26());
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000224AE26CC50(3,8-16): error X3000: syntax error: unexpected token 'float16_t'
+
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/13ba26.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/13ba26.wgsl.expected.ir.dxc.hlsl
index 68366fb..b00d9f9 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/13ba26.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/13ba26.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<vector<float16_t, 3> >(0u, subgroupExclusiveMul_13ba26());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<vector<float16_t, 3> >(0u, subgroupExclusiveMul_13ba26());
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/13ba26.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/13ba26.wgsl.expected.ir.msl
index d9ac306..cb5f01a 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/13ba26.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/13ba26.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device half3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveMul_13ba26();
+}
+
kernel void compute_main(device half3* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveMul_13ba26();
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/25d1b9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/25d1b9.wgsl.expected.fxc.hlsl
index dbbecb0..566e2c8 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/25d1b9.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/25d1b9.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store2(0u, asuint(subgroupExclusiveMul_25d1b9()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001B2E00620C0(4,16-43): error X3004: undeclared identifier 'WavePrefixProduct'
+
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/25d1b9.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/25d1b9.wgsl.expected.ir.dxc.hlsl
index 34b0c35..ea2f0eb 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/25d1b9.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/25d1b9.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupExclusiveMul_25d1b9()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store2(0u, asuint(subgroupExclusiveMul_25d1b9()));
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/25d1b9.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/25d1b9.wgsl.expected.ir.msl
index e09651a..c204737 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/25d1b9.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/25d1b9.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device float2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveMul_25d1b9();
+}
+
kernel void compute_main(device float2* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveMul_25d1b9();
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/4525a3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/4525a3.wgsl.expected.fxc.hlsl
index 6911d3a..ddbd0b4 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/4525a3.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/4525a3.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store2(0u, asuint(subgroupExclusiveMul_4525a3()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000017113907EF0(4,14-38): error X3004: undeclared identifier 'WavePrefixProduct'
+
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/4525a3.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/4525a3.wgsl.expected.ir.dxc.hlsl
index 06a6b79..8d12d2b 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/4525a3.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/4525a3.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupExclusiveMul_4525a3()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store2(0u, asuint(subgroupExclusiveMul_4525a3()));
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/4525a3.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/4525a3.wgsl.expected.ir.msl
index 50c126f..4f69ecb 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/4525a3.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/4525a3.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device int2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveMul_4525a3();
+}
+
kernel void compute_main(device int2* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveMul_4525a3();
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/6f431e.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/6f431e.wgsl.expected.fxc.hlsl
index 3256bd5..de93f3b 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/6f431e.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/6f431e.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store<float16_t>(0u, subgroupExclusiveMul_6f431e());
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000021D20F50BB0(3,1-9): error X3000: unrecognized identifier 'float16_t'
+
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/6f431e.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/6f431e.wgsl.expected.ir.dxc.hlsl
index c02c9dd..f0765f7 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/6f431e.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/6f431e.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<float16_t>(0u, subgroupExclusiveMul_6f431e());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<float16_t>(0u, subgroupExclusiveMul_6f431e());
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/6f431e.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/6f431e.wgsl.expected.ir.msl
index 10b6369..7827b3d 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/6f431e.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/6f431e.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device half* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveMul_6f431e();
+}
+
kernel void compute_main(device half* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveMul_6f431e();
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/7b5f57.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/7b5f57.wgsl.expected.fxc.hlsl
index a1305d2..cf1075d 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/7b5f57.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/7b5f57.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store4(0u, asuint(subgroupExclusiveMul_7b5f57()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001F6384E3DD0(4,16-45): error X3004: undeclared identifier 'WavePrefixProduct'
+
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/7b5f57.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/7b5f57.wgsl.expected.ir.dxc.hlsl
index 934e2e4..7b5f69d 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/7b5f57.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/7b5f57.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupExclusiveMul_7b5f57()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store4(0u, asuint(subgroupExclusiveMul_7b5f57()));
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/7b5f57.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/7b5f57.wgsl.expected.ir.msl
index e584e4d..ec87b90 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/7b5f57.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/7b5f57.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device float4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveMul_7b5f57();
+}
+
kernel void compute_main(device float4* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveMul_7b5f57();
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/87f23e.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/87f23e.wgsl.expected.fxc.hlsl
index d278545..ee837c7 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/87f23e.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/87f23e.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store3(0u, asuint(subgroupExclusiveMul_87f23e()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000019B8B1D3DD0(4,14-39): error X3004: undeclared identifier 'WavePrefixProduct'
+
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/87f23e.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/87f23e.wgsl.expected.ir.dxc.hlsl
index 8b882bd..31b06af 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/87f23e.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/87f23e.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupExclusiveMul_87f23e()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store3(0u, asuint(subgroupExclusiveMul_87f23e()));
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/87f23e.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/87f23e.wgsl.expected.ir.msl
index 7dd3584..41a5042 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/87f23e.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/87f23e.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device int3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveMul_87f23e();
+}
+
kernel void compute_main(device int3* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveMul_87f23e();
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/98b2e4.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/98b2e4.wgsl.expected.fxc.hlsl
index b5d05d1..37d6d70 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/98b2e4.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/98b2e4.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store(0u, asuint(subgroupExclusiveMul_98b2e4()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000002017E9F5BB0(4,15-37): error X3004: undeclared identifier 'WavePrefixProduct'
+
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/98b2e4.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/98b2e4.wgsl.expected.ir.dxc.hlsl
index 9d6c0db..f8946de 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/98b2e4.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/98b2e4.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupExclusiveMul_98b2e4()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store(0u, asuint(subgroupExclusiveMul_98b2e4()));
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/98b2e4.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/98b2e4.wgsl.expected.ir.msl
index dbcebe3..59e2848 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/98b2e4.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/98b2e4.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device float* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveMul_98b2e4();
+}
+
kernel void compute_main(device float* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveMul_98b2e4();
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/a07956.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/a07956.wgsl.expected.fxc.hlsl
index c66f298..a2223db 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/a07956.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/a07956.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store<vector<float16_t, 4> >(0u, subgroupExclusiveMul_a07956());
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000002299ABC1D50(3,8-16): error X3000: syntax error: unexpected token 'float16_t'
+
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/a07956.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/a07956.wgsl.expected.ir.dxc.hlsl
index 827baa6..0d51e26 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/a07956.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/a07956.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<vector<float16_t, 4> >(0u, subgroupExclusiveMul_a07956());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<vector<float16_t, 4> >(0u, subgroupExclusiveMul_a07956());
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/a07956.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/a07956.wgsl.expected.ir.msl
index e9d947c..351dfc7 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/a07956.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/a07956.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device half4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveMul_a07956();
+}
+
kernel void compute_main(device half4* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveMul_a07956();
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/a23002.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/a23002.wgsl.expected.fxc.hlsl
index be17c1c..2467bb0 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/a23002.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/a23002.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store(0u, asuint(subgroupExclusiveMul_a23002()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001CDCCD4F3F0(4,13-32): error X3004: undeclared identifier 'WavePrefixProduct'
+
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/a23002.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/a23002.wgsl.expected.ir.dxc.hlsl
index b7a28a7..0a3ee4e 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/a23002.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/a23002.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupExclusiveMul_a23002()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store(0u, asuint(subgroupExclusiveMul_a23002()));
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/a23002.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/a23002.wgsl.expected.ir.msl
index ece7a0a..3ee4ee4 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/a23002.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/a23002.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device int* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveMul_a23002();
+}
+
kernel void compute_main(device int* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveMul_a23002();
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/d1d490.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/d1d490.wgsl.expected.fxc.hlsl
index de32a46..b4ca9e8 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/d1d490.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/d1d490.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store2(0u, asuint(subgroupExclusiveMul_d1d490()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000025E395C5FA0(4,15-40): error X3004: undeclared identifier 'WavePrefixProduct'
+
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/d1d490.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/d1d490.wgsl.expected.ir.dxc.hlsl
index 12600d1a..fce011b 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/d1d490.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/d1d490.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store2(0u, subgroupExclusiveMul_d1d490());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store2(0u, subgroupExclusiveMul_d1d490());
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/d1d490.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/d1d490.wgsl.expected.ir.msl
index 170b39f..ded7aab 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/d1d490.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/d1d490.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device uint2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveMul_d1d490();
+}
+
kernel void compute_main(device uint2* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveMul_d1d490();
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/dc51f8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/dc51f8.wgsl.expected.fxc.hlsl
index 742dc55..3770796 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/dc51f8.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/dc51f8.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store(0u, asuint(subgroupExclusiveMul_dc51f8()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000012EF89EF3F0(4,14-34): error X3004: undeclared identifier 'WavePrefixProduct'
+
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/dc51f8.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/dc51f8.wgsl.expected.ir.dxc.hlsl
index 9e5321c..e0be118 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/dc51f8.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/dc51f8.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store(0u, subgroupExclusiveMul_dc51f8());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store(0u, subgroupExclusiveMul_dc51f8());
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/dc51f8.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/dc51f8.wgsl.expected.ir.msl
index dbd8707..3b0d5f1 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/dc51f8.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/dc51f8.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device uint* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveMul_dc51f8();
+}
+
kernel void compute_main(device uint* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveMul_dc51f8();
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/e88d1c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/e88d1c.wgsl.expected.fxc.hlsl
index f11c60c..ec29b44 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/e88d1c.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/e88d1c.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store<vector<float16_t, 2> >(0u, subgroupExclusiveMul_e88d1c());
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000022F6AC68B40(3,8-16): error X3000: syntax error: unexpected token 'float16_t'
+
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/e88d1c.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/e88d1c.wgsl.expected.ir.dxc.hlsl
index 55a2f70..17f3e9e 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/e88d1c.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/e88d1c.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<vector<float16_t, 2> >(0u, subgroupExclusiveMul_e88d1c());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<vector<float16_t, 2> >(0u, subgroupExclusiveMul_e88d1c());
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/e88d1c.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/e88d1c.wgsl.expected.ir.msl
index 6833a93..09b9718 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/e88d1c.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/e88d1c.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device half2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveMul_e88d1c();
+}
+
kernel void compute_main(device half2* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveMul_e88d1c();
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/f039f4.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/f039f4.wgsl.expected.fxc.hlsl
index 62c1133..1aee984 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/f039f4.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/f039f4.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store3(0u, asuint(subgroupExclusiveMul_f039f4()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001EB5103F970(4,15-41): error X3004: undeclared identifier 'WavePrefixProduct'
+
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/f039f4.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/f039f4.wgsl.expected.ir.dxc.hlsl
index c48baf3..53ef888 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/f039f4.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/f039f4.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store3(0u, subgroupExclusiveMul_f039f4());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store3(0u, subgroupExclusiveMul_f039f4());
diff --git a/test/tint/builtins/gen/literal/subgroupExclusiveMul/f039f4.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupExclusiveMul/f039f4.wgsl.expected.ir.msl
index 590f77b..d9fa8b8 100644
--- a/test/tint/builtins/gen/literal/subgroupExclusiveMul/f039f4.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupExclusiveMul/f039f4.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device uint3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveMul_f039f4();
+}
+
kernel void compute_main(device uint3* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveMul_f039f4();
diff --git a/test/tint/builtins/gen/literal/subgroupMul/0de9d3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/0de9d3.wgsl.expected.fxc.hlsl
index d305c41..8620d0d 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/0de9d3.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupMul/0de9d3.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store(0u, asuint(subgroupMul_0de9d3()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001BA1BC386C0(4,15-37): error X3004: undeclared identifier 'WaveActiveProduct'
+
diff --git a/test/tint/builtins/gen/literal/subgroupMul/0de9d3.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/0de9d3.wgsl.expected.ir.dxc.hlsl
index d00247f..f3935b9 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/0de9d3.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupMul/0de9d3.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupMul_0de9d3()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store(0u, asuint(subgroupMul_0de9d3()));
diff --git a/test/tint/builtins/gen/literal/subgroupMul/0de9d3.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupMul/0de9d3.wgsl.expected.ir.msl
index e19decc..68870e6 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/0de9d3.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupMul/0de9d3.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device float* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupMul_0de9d3();
+}
+
kernel void compute_main(device float* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupMul_0de9d3();
diff --git a/test/tint/builtins/gen/literal/subgroupMul/2941a2.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/2941a2.wgsl.expected.fxc.hlsl
index 28dbf5b..b4441e6 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/2941a2.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupMul/2941a2.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store<float16_t>(0u, subgroupMul_2941a2());
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000228B15FF430(3,1-9): error X3000: unrecognized identifier 'float16_t'
+
diff --git a/test/tint/builtins/gen/literal/subgroupMul/2941a2.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/2941a2.wgsl.expected.ir.dxc.hlsl
index 64a17d3..d378576 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/2941a2.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupMul/2941a2.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<float16_t>(0u, subgroupMul_2941a2());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<float16_t>(0u, subgroupMul_2941a2());
diff --git a/test/tint/builtins/gen/literal/subgroupMul/2941a2.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupMul/2941a2.wgsl.expected.ir.msl
index 74cf643..1f1a738 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/2941a2.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupMul/2941a2.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device half* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupMul_2941a2();
+}
+
kernel void compute_main(device half* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupMul_2941a2();
diff --git a/test/tint/builtins/gen/literal/subgroupMul/3fe886.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/3fe886.wgsl.expected.fxc.hlsl
index 18a1faf..ff9b10a 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/3fe886.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupMul/3fe886.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store(0u, asuint(subgroupMul_3fe886()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001A526C92170(4,13-32): error X3004: undeclared identifier 'WaveActiveProduct'
+
diff --git a/test/tint/builtins/gen/literal/subgroupMul/3fe886.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/3fe886.wgsl.expected.ir.dxc.hlsl
index 7ebf7e2..ed1a0af 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/3fe886.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupMul/3fe886.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupMul_3fe886()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store(0u, asuint(subgroupMul_3fe886()));
diff --git a/test/tint/builtins/gen/literal/subgroupMul/3fe886.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupMul/3fe886.wgsl.expected.ir.msl
index da663c4..54fd66d 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/3fe886.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupMul/3fe886.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device int* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupMul_3fe886();
+}
+
kernel void compute_main(device int* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupMul_3fe886();
diff --git a/test/tint/builtins/gen/literal/subgroupMul/4f8ee6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/4f8ee6.wgsl.expected.fxc.hlsl
index 5635568..a324328 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/4f8ee6.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupMul/4f8ee6.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store(0u, asuint(subgroupMul_4f8ee6()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000268847D86C0(4,14-34): error X3004: undeclared identifier 'WaveActiveProduct'
+
diff --git a/test/tint/builtins/gen/literal/subgroupMul/4f8ee6.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/4f8ee6.wgsl.expected.ir.dxc.hlsl
index a787395..49ae517 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/4f8ee6.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupMul/4f8ee6.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store(0u, subgroupMul_4f8ee6());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store(0u, subgroupMul_4f8ee6());
diff --git a/test/tint/builtins/gen/literal/subgroupMul/4f8ee6.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupMul/4f8ee6.wgsl.expected.ir.msl
index 984264d..149c0e4 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/4f8ee6.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupMul/4f8ee6.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device uint* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupMul_4f8ee6();
+}
+
kernel void compute_main(device uint* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupMul_4f8ee6();
diff --git a/test/tint/builtins/gen/literal/subgroupMul/53aee2.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/53aee2.wgsl.expected.fxc.hlsl
index 8b90347..c5e1bea 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/53aee2.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupMul/53aee2.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store<vector<float16_t, 3> >(0u, subgroupMul_53aee2());
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000025DDFFBF430(3,8-16): error X3000: syntax error: unexpected token 'float16_t'
+
diff --git a/test/tint/builtins/gen/literal/subgroupMul/53aee2.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/53aee2.wgsl.expected.ir.dxc.hlsl
index 25f6a7c..392327a 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/53aee2.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupMul/53aee2.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<vector<float16_t, 3> >(0u, subgroupMul_53aee2());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<vector<float16_t, 3> >(0u, subgroupMul_53aee2());
diff --git a/test/tint/builtins/gen/literal/subgroupMul/53aee2.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupMul/53aee2.wgsl.expected.ir.msl
index 6fbfb14..de18ffa 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/53aee2.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupMul/53aee2.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device half3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupMul_53aee2();
+}
+
kernel void compute_main(device half3* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupMul_53aee2();
diff --git a/test/tint/builtins/gen/literal/subgroupMul/5a8c86.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/5a8c86.wgsl.expected.fxc.hlsl
index f9c6c9d..6ba247e 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/5a8c86.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupMul/5a8c86.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store3(0u, asuint(subgroupMul_5a8c86()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001AAF2D7BAC0(4,14-39): error X3004: undeclared identifier 'WaveActiveProduct'
+
diff --git a/test/tint/builtins/gen/literal/subgroupMul/5a8c86.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/5a8c86.wgsl.expected.ir.dxc.hlsl
index bf88683..55c4a3b 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/5a8c86.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupMul/5a8c86.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupMul_5a8c86()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store3(0u, asuint(subgroupMul_5a8c86()));
diff --git a/test/tint/builtins/gen/literal/subgroupMul/5a8c86.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupMul/5a8c86.wgsl.expected.ir.msl
index 88a528c..ad7ffdb 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/5a8c86.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupMul/5a8c86.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device int3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupMul_5a8c86();
+}
+
kernel void compute_main(device int3* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupMul_5a8c86();
diff --git a/test/tint/builtins/gen/literal/subgroupMul/66c813.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/66c813.wgsl.expected.fxc.hlsl
index 88c49b3..d926941 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/66c813.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupMul/66c813.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store4(0u, asuint(subgroupMul_66c813()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001E48CF7C360(4,16-45): error X3004: undeclared identifier 'WaveActiveProduct'
+
diff --git a/test/tint/builtins/gen/literal/subgroupMul/66c813.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/66c813.wgsl.expected.ir.dxc.hlsl
index a1d52d4..29c2104 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/66c813.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupMul/66c813.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupMul_66c813()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store4(0u, asuint(subgroupMul_66c813()));
diff --git a/test/tint/builtins/gen/literal/subgroupMul/66c813.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupMul/66c813.wgsl.expected.ir.msl
index df341d2..3044b55 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/66c813.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupMul/66c813.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device float4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupMul_66c813();
+}
+
kernel void compute_main(device float4* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupMul_66c813();
diff --git a/test/tint/builtins/gen/literal/subgroupMul/6aaaf3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/6aaaf3.wgsl.expected.fxc.hlsl
index 5610811..567d8f7 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/6aaaf3.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupMul/6aaaf3.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store<vector<float16_t, 2> >(0u, subgroupMul_6aaaf3());
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000002112182F430(3,8-16): error X3000: syntax error: unexpected token 'float16_t'
+
diff --git a/test/tint/builtins/gen/literal/subgroupMul/6aaaf3.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/6aaaf3.wgsl.expected.ir.dxc.hlsl
index 8c260ff..c72e54c 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/6aaaf3.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupMul/6aaaf3.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<vector<float16_t, 2> >(0u, subgroupMul_6aaaf3());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<vector<float16_t, 2> >(0u, subgroupMul_6aaaf3());
diff --git a/test/tint/builtins/gen/literal/subgroupMul/6aaaf3.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupMul/6aaaf3.wgsl.expected.ir.msl
index f64b1c4..96d2c9c 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/6aaaf3.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupMul/6aaaf3.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device half2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupMul_6aaaf3();
+}
+
kernel void compute_main(device half2* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupMul_6aaaf3();
diff --git a/test/tint/builtins/gen/literal/subgroupMul/93eccd.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/93eccd.wgsl.expected.fxc.hlsl
index 1613fac..f8a7db9ca 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/93eccd.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupMul/93eccd.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store3(0u, asuint(subgroupMul_93eccd()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001952347BF90(4,16-44): error X3004: undeclared identifier 'WaveActiveProduct'
+
diff --git a/test/tint/builtins/gen/literal/subgroupMul/93eccd.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/93eccd.wgsl.expected.ir.dxc.hlsl
index 7ab3126..4fdf7bf 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/93eccd.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupMul/93eccd.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupMul_93eccd()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store3(0u, asuint(subgroupMul_93eccd()));
diff --git a/test/tint/builtins/gen/literal/subgroupMul/93eccd.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupMul/93eccd.wgsl.expected.ir.msl
index c928ea7..904779f 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/93eccd.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupMul/93eccd.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device float3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupMul_93eccd();
+}
+
kernel void compute_main(device float3* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupMul_93eccd();
diff --git a/test/tint/builtins/gen/literal/subgroupMul/d584a2.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/d584a2.wgsl.expected.fxc.hlsl
index 9992021..2d730c9 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/d584a2.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupMul/d584a2.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store2(0u, asuint(subgroupMul_d584a2()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000020E62ABFFC0(4,14-38): error X3004: undeclared identifier 'WaveActiveProduct'
+
diff --git a/test/tint/builtins/gen/literal/subgroupMul/d584a2.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/d584a2.wgsl.expected.ir.dxc.hlsl
index 25febd2..bd301c2 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/d584a2.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupMul/d584a2.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupMul_d584a2()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store2(0u, asuint(subgroupMul_d584a2()));
diff --git a/test/tint/builtins/gen/literal/subgroupMul/d584a2.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupMul/d584a2.wgsl.expected.ir.msl
index 2be49de..a142629 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/d584a2.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupMul/d584a2.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device int2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupMul_d584a2();
+}
+
kernel void compute_main(device int2* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupMul_d584a2();
diff --git a/test/tint/builtins/gen/literal/subgroupMul/dc672a.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/dc672a.wgsl.expected.fxc.hlsl
index c7b03ab..c31db94 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/dc672a.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupMul/dc672a.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store2(0u, asuint(subgroupMul_dc672a()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000174E653F3E0(4,15-40): error X3004: undeclared identifier 'WaveActiveProduct'
+
diff --git a/test/tint/builtins/gen/literal/subgroupMul/dc672a.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/dc672a.wgsl.expected.ir.dxc.hlsl
index 40613fa..628b43a 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/dc672a.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupMul/dc672a.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store2(0u, subgroupMul_dc672a());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store2(0u, subgroupMul_dc672a());
diff --git a/test/tint/builtins/gen/literal/subgroupMul/dc672a.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupMul/dc672a.wgsl.expected.ir.msl
index 0814398..b31ad53 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/dc672a.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupMul/dc672a.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device uint2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupMul_dc672a();
+}
+
kernel void compute_main(device uint2* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupMul_dc672a();
diff --git a/test/tint/builtins/gen/literal/subgroupMul/dd1333.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/dd1333.wgsl.expected.fxc.hlsl
index 8f5d2c9..1b41db8 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/dd1333.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupMul/dd1333.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store4(0u, asuint(subgroupMul_dd1333()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001D87F7EC440(4,15-42): error X3004: undeclared identifier 'WaveActiveProduct'
+
diff --git a/test/tint/builtins/gen/literal/subgroupMul/dd1333.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/dd1333.wgsl.expected.ir.dxc.hlsl
index 04dca66..3f86c5d 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/dd1333.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupMul/dd1333.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store4(0u, subgroupMul_dd1333());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store4(0u, subgroupMul_dd1333());
diff --git a/test/tint/builtins/gen/literal/subgroupMul/dd1333.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupMul/dd1333.wgsl.expected.ir.msl
index 70d9503..a2b99f1 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/dd1333.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupMul/dd1333.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device uint4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupMul_dd1333();
+}
+
kernel void compute_main(device uint4* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupMul_dd1333();
diff --git a/test/tint/builtins/gen/literal/subgroupMul/f2ac5b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/f2ac5b.wgsl.expected.fxc.hlsl
index 5d8f15b..6c4d7db 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/f2ac5b.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupMul/f2ac5b.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store<vector<float16_t, 4> >(0u, subgroupMul_f2ac5b());
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000020F6A5BF430(3,8-16): error X3000: syntax error: unexpected token 'float16_t'
+
diff --git a/test/tint/builtins/gen/literal/subgroupMul/f2ac5b.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/f2ac5b.wgsl.expected.ir.dxc.hlsl
index 05f98bf..493da7e 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/f2ac5b.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupMul/f2ac5b.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<vector<float16_t, 4> >(0u, subgroupMul_f2ac5b());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<vector<float16_t, 4> >(0u, subgroupMul_f2ac5b());
diff --git a/test/tint/builtins/gen/literal/subgroupMul/f2ac5b.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupMul/f2ac5b.wgsl.expected.ir.msl
index 334c605..8a33e26 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/f2ac5b.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupMul/f2ac5b.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device half4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupMul_f2ac5b();
+}
+
kernel void compute_main(device half4* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupMul_f2ac5b();
diff --git a/test/tint/builtins/gen/literal/subgroupMul/f78398.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/f78398.wgsl.expected.fxc.hlsl
index 4587245..bd389ef 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/f78398.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupMul/f78398.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store2(0u, asuint(subgroupMul_f78398()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000188FB59CE00(4,16-43): error X3004: undeclared identifier 'WaveActiveProduct'
+
diff --git a/test/tint/builtins/gen/literal/subgroupMul/f78398.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/f78398.wgsl.expected.ir.dxc.hlsl
index 569a6d4..a9ee1a4 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/f78398.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupMul/f78398.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupMul_f78398()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store2(0u, asuint(subgroupMul_f78398()));
diff --git a/test/tint/builtins/gen/literal/subgroupMul/f78398.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupMul/f78398.wgsl.expected.ir.msl
index bca0a0c..4105914 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/f78398.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupMul/f78398.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device float2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupMul_f78398();
+}
+
kernel void compute_main(device float2* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupMul_f78398();
diff --git a/test/tint/builtins/gen/literal/subgroupMul/fa781b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/fa781b.wgsl.expected.fxc.hlsl
index f411959..3b8f759 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/fa781b.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupMul/fa781b.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store3(0u, asuint(subgroupMul_fa781b()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000022E0402D850(4,15-41): error X3004: undeclared identifier 'WaveActiveProduct'
+
diff --git a/test/tint/builtins/gen/literal/subgroupMul/fa781b.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/fa781b.wgsl.expected.ir.dxc.hlsl
index eff9364..6a5b269 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/fa781b.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupMul/fa781b.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store3(0u, subgroupMul_fa781b());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store3(0u, subgroupMul_fa781b());
diff --git a/test/tint/builtins/gen/literal/subgroupMul/fa781b.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupMul/fa781b.wgsl.expected.ir.msl
index 91cf98d..f0bcd73 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/fa781b.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupMul/fa781b.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device uint3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupMul_fa781b();
+}
+
kernel void compute_main(device uint3* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupMul_fa781b();
diff --git a/test/tint/builtins/gen/literal/subgroupMul/fab258.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/fab258.wgsl.expected.fxc.hlsl
index 7cc27c1..674a761 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/fab258.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupMul/fab258.wgsl.expected.fxc.hlsl
@@ -12,3 +12,6 @@
prevent_dce.Store4(0u, asuint(subgroupMul_fab258()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000002584C071870(4,14-40): error X3004: undeclared identifier 'WaveActiveProduct'
+
diff --git a/test/tint/builtins/gen/literal/subgroupMul/fab258.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupMul/fab258.wgsl.expected.ir.dxc.hlsl
index 194b6e8..fa170d4 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/fab258.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/literal/subgroupMul/fab258.wgsl.expected.ir.dxc.hlsl
@@ -5,6 +5,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupMul_fab258()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store4(0u, asuint(subgroupMul_fab258()));
diff --git a/test/tint/builtins/gen/literal/subgroupMul/fab258.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupMul/fab258.wgsl.expected.ir.msl
index 97d7888..ae5f197 100644
--- a/test/tint/builtins/gen/literal/subgroupMul/fab258.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/literal/subgroupMul/fab258.wgsl.expected.ir.msl
@@ -10,6 +10,11 @@
return res;
}
+fragment void fragment_main(device int4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupMul_fab258();
+}
+
kernel void compute_main(device int4* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupMul_fab258();
diff --git a/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl b/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl
new file mode 100644
index 0000000..2e0f411
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl
@@ -0,0 +1,58 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<i32>;
+
+
+// fn subgroupOr(value: vec<3, i32>) -> vec<3, i32>
+fn subgroupOr_03343f() -> vec3<i32>{
+ var res: vec3<i32> = subgroupOr(vec3<i32>(1i));
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupOr_03343f();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_03343f();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..edd7771
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl.expected.dxc.hlsl
@@ -0,0 +1,18 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int3 subgroupOr_03343f() {
+ int3 tint_tmp = (1).xxx;
+ int3 res = asint(WaveActiveBitOr(asuint(tint_tmp)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupOr_03343f()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupOr_03343f()));
+ return;
+}
diff --git a/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..8ae1bc1
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl.expected.fxc.hlsl
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int3 subgroupOr_03343f() {
+ int3 tint_tmp = (1).xxx;
+ int3 res = asint(WaveActiveBitOr(asuint(tint_tmp)));
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupOr_03343f()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000016D913D2270(5,20-52): error X3004: undeclared identifier 'WaveActiveBitOr'
+
diff --git a/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl.expected.glsl b/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl.expected.glsl
new file mode 100644
index 0000000..22a02dd
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl.expected.glsl
@@ -0,0 +1,21 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<i32>;
+
+fn subgroupOr_03343f() -> vec3<i32> {
+ var res : vec3<i32> = subgroupOr(vec3<i32>(1i));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_03343f();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..5e028bb
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,17 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+int3 subgroupOr_03343f() {
+ int3 arg = (1).xxx;
+ int3 res = asint(WaveActiveBitOr(asuint(arg)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupOr_03343f()));
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupOr_03343f()));
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl.expected.ir.msl
new file mode 100644
index 0000000..f1fbdc6
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl.expected.ir.msl
@@ -0,0 +1,21 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device int3* prevent_dce;
+};
+
+int3 subgroupOr_03343f() {
+ int3 res = simd_or(int3(1));
+ return res;
+}
+
+fragment void fragment_main(device int3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupOr_03343f();
+}
+
+kernel void compute_main(device int3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupOr_03343f();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..cc9028f
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl.expected.ir.spvasm
@@ -0,0 +1,59 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 29
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupOr_03343f "subgroupOr_03343f"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %int = OpTypeInt 32 1
+ %v3int = OpTypeVector %int 3
+%tint_symbol_1 = OpTypeStruct %v3int
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v3int
+ %uint = OpTypeInt 32 0
+ %uint_3 = OpConstant %uint 3
+ %int_1 = OpConstant %int 1
+ %12 = OpConstantComposite %v3int %int_1 %int_1 %int_1
+%_ptr_Function_v3int = OpTypePointer Function %v3int
+ %void = OpTypeVoid
+ %19 = OpTypeFunction %void
+%_ptr_StorageBuffer_v3int = OpTypePointer StorageBuffer %v3int
+ %uint_0 = OpConstant %uint 0
+%subgroupOr_03343f = OpFunction %v3int None %7
+ %8 = OpLabel
+ %res = OpVariable %_ptr_Function_v3int Function
+ %9 = OpGroupNonUniformBitwiseOr %v3int %uint_3 Reduce %12
+ OpStore %res %9
+ %16 = OpLoad %v3int %res
+ OpReturnValue %16
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %19
+ %20 = OpLabel
+ %21 = OpFunctionCall %v3int %subgroupOr_03343f
+ %22 = OpAccessChain %_ptr_StorageBuffer_v3int %1 %uint_0
+ OpStore %22 %21
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %19
+ %26 = OpLabel
+ %27 = OpFunctionCall %v3int %subgroupOr_03343f
+ %28 = OpAccessChain %_ptr_StorageBuffer_v3int %1 %uint_0
+ OpStore %28 %27
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl.expected.msl b/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl.expected.msl
new file mode 100644
index 0000000..3c61bbb
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl.expected.msl
@@ -0,0 +1,18 @@
+#include <metal_stdlib>
+
+using namespace metal;
+int3 subgroupOr_03343f() {
+ int3 res = simd_or(int3(1));
+ return res;
+}
+
+fragment void fragment_main(device packed_int3* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = packed_int3(subgroupOr_03343f());
+ return;
+}
+
+kernel void compute_main(device packed_int3* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = packed_int3(subgroupOr_03343f());
+ return;
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl.expected.spvasm b/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl.expected.spvasm
new file mode 100644
index 0000000..97b5179
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl.expected.spvasm
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<i32>;
+
+fn subgroupOr_03343f() -> vec3<i32> {
+ var res : vec3<i32> = subgroupOr(vec3<i32>(1i));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_03343f();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl.expected.wgsl b/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl.expected.wgsl
new file mode 100644
index 0000000..b1f472a
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/03343f.wgsl.expected.wgsl
@@ -0,0 +1,18 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<i32>;
+
+fn subgroupOr_03343f() -> vec3<i32> {
+ var res : vec3<i32> = subgroupOr(vec3<i32>(1i));
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupOr_03343f();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_03343f();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl b/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl
new file mode 100644
index 0000000..50c7eda
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl
@@ -0,0 +1,58 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : u32;
+
+
+// fn subgroupOr(value: u32) -> u32
+fn subgroupOr_0bc264() -> u32{
+ var res: u32 = subgroupOr(1u);
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupOr_0bc264();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_0bc264();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..14e1621
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl.expected.dxc.hlsl
@@ -0,0 +1,17 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint subgroupOr_0bc264() {
+ uint res = WaveActiveBitOr(1u);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupOr_0bc264()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupOr_0bc264()));
+ return;
+}
diff --git a/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..96c80f8
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl.expected.fxc.hlsl
@@ -0,0 +1,17 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint subgroupOr_0bc264() {
+ uint res = WaveActiveBitOr(1u);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupOr_0bc264()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000247F8842930(4,14-32): error X3004: undeclared identifier 'WaveActiveBitOr'
+
diff --git a/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl.expected.glsl b/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl.expected.glsl
new file mode 100644
index 0000000..8004d7c
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl.expected.glsl
@@ -0,0 +1,21 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : u32;
+
+fn subgroupOr_0bc264() -> u32 {
+ var res : u32 = subgroupOr(1u);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_0bc264();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..c78676f
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,16 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+uint subgroupOr_0bc264() {
+ uint res = WaveActiveBitOr(1u);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store(0u, subgroupOr_0bc264());
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, subgroupOr_0bc264());
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl.expected.ir.msl
new file mode 100644
index 0000000..551d5a6
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl.expected.ir.msl
@@ -0,0 +1,21 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device uint* prevent_dce;
+};
+
+uint subgroupOr_0bc264() {
+ uint res = simd_or(1u);
+ return res;
+}
+
+fragment void fragment_main(device uint* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupOr_0bc264();
+}
+
+kernel void compute_main(device uint* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupOr_0bc264();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..e89680c
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl.expected.ir.spvasm
@@ -0,0 +1,56 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 26
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupOr_0bc264 "subgroupOr_0bc264"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %uint = OpTypeInt 32 0
+%tint_symbol_1 = OpTypeStruct %uint
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %6 = OpTypeFunction %uint
+ %uint_3 = OpConstant %uint 3
+ %uint_1 = OpConstant %uint 1
+%_ptr_Function_uint = OpTypePointer Function %uint
+ %void = OpTypeVoid
+ %16 = OpTypeFunction %void
+%_ptr_StorageBuffer_uint = OpTypePointer StorageBuffer %uint
+ %uint_0 = OpConstant %uint 0
+%subgroupOr_0bc264 = OpFunction %uint None %6
+ %7 = OpLabel
+ %res = OpVariable %_ptr_Function_uint Function
+ %8 = OpGroupNonUniformBitwiseOr %uint %uint_3 Reduce %uint_1
+ OpStore %res %8
+ %13 = OpLoad %uint %res
+ OpReturnValue %13
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %16
+ %17 = OpLabel
+ %18 = OpFunctionCall %uint %subgroupOr_0bc264
+ %19 = OpAccessChain %_ptr_StorageBuffer_uint %1 %uint_0
+ OpStore %19 %18
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %16
+ %23 = OpLabel
+ %24 = OpFunctionCall %uint %subgroupOr_0bc264
+ %25 = OpAccessChain %_ptr_StorageBuffer_uint %1 %uint_0
+ OpStore %25 %24
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl.expected.msl b/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl.expected.msl
new file mode 100644
index 0000000..fb1affc02
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl.expected.msl
@@ -0,0 +1,18 @@
+#include <metal_stdlib>
+
+using namespace metal;
+uint subgroupOr_0bc264() {
+ uint res = simd_or(1u);
+ return res;
+}
+
+fragment void fragment_main(device uint* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupOr_0bc264();
+ return;
+}
+
+kernel void compute_main(device uint* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupOr_0bc264();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl.expected.spvasm b/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl.expected.spvasm
new file mode 100644
index 0000000..0427b59
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl.expected.spvasm
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : u32;
+
+fn subgroupOr_0bc264() -> u32 {
+ var res : u32 = subgroupOr(1u);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_0bc264();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl.expected.wgsl b/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl.expected.wgsl
new file mode 100644
index 0000000..322d8ab
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/0bc264.wgsl.expected.wgsl
@@ -0,0 +1,18 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : u32;
+
+fn subgroupOr_0bc264() -> u32 {
+ var res : u32 = subgroupOr(1u);
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupOr_0bc264();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_0bc264();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl b/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl
new file mode 100644
index 0000000..a23cbf1
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl
@@ -0,0 +1,58 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<i32>;
+
+
+// fn subgroupOr(value: vec<2, i32>) -> vec<2, i32>
+fn subgroupOr_3f60e0() -> vec2<i32>{
+ var res: vec2<i32> = subgroupOr(vec2<i32>(1i));
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupOr_3f60e0();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_3f60e0();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..417dd73
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl.expected.dxc.hlsl
@@ -0,0 +1,18 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int2 subgroupOr_3f60e0() {
+ int2 tint_tmp = (1).xx;
+ int2 res = asint(WaveActiveBitOr(asuint(tint_tmp)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupOr_3f60e0()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupOr_3f60e0()));
+ return;
+}
diff --git a/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..41af36f
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl.expected.fxc.hlsl
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int2 subgroupOr_3f60e0() {
+ int2 tint_tmp = (1).xx;
+ int2 res = asint(WaveActiveBitOr(asuint(tint_tmp)));
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupOr_3f60e0()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000283D71F1990(5,20-52): error X3004: undeclared identifier 'WaveActiveBitOr'
+
diff --git a/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl.expected.glsl b/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl.expected.glsl
new file mode 100644
index 0000000..3417a29
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl.expected.glsl
@@ -0,0 +1,21 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<i32>;
+
+fn subgroupOr_3f60e0() -> vec2<i32> {
+ var res : vec2<i32> = subgroupOr(vec2<i32>(1i));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_3f60e0();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..7de3e16
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,17 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+int2 subgroupOr_3f60e0() {
+ int2 arg = (1).xx;
+ int2 res = asint(WaveActiveBitOr(asuint(arg)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupOr_3f60e0()));
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupOr_3f60e0()));
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl.expected.ir.msl
new file mode 100644
index 0000000..81d2b35
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl.expected.ir.msl
@@ -0,0 +1,21 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device int2* prevent_dce;
+};
+
+int2 subgroupOr_3f60e0() {
+ int2 res = simd_or(int2(1));
+ return res;
+}
+
+fragment void fragment_main(device int2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupOr_3f60e0();
+}
+
+kernel void compute_main(device int2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupOr_3f60e0();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..e49ec53
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl.expected.ir.spvasm
@@ -0,0 +1,59 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 29
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupOr_3f60e0 "subgroupOr_3f60e0"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %int = OpTypeInt 32 1
+ %v2int = OpTypeVector %int 2
+%tint_symbol_1 = OpTypeStruct %v2int
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v2int
+ %uint = OpTypeInt 32 0
+ %uint_3 = OpConstant %uint 3
+ %int_1 = OpConstant %int 1
+ %12 = OpConstantComposite %v2int %int_1 %int_1
+%_ptr_Function_v2int = OpTypePointer Function %v2int
+ %void = OpTypeVoid
+ %19 = OpTypeFunction %void
+%_ptr_StorageBuffer_v2int = OpTypePointer StorageBuffer %v2int
+ %uint_0 = OpConstant %uint 0
+%subgroupOr_3f60e0 = OpFunction %v2int None %7
+ %8 = OpLabel
+ %res = OpVariable %_ptr_Function_v2int Function
+ %9 = OpGroupNonUniformBitwiseOr %v2int %uint_3 Reduce %12
+ OpStore %res %9
+ %16 = OpLoad %v2int %res
+ OpReturnValue %16
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %19
+ %20 = OpLabel
+ %21 = OpFunctionCall %v2int %subgroupOr_3f60e0
+ %22 = OpAccessChain %_ptr_StorageBuffer_v2int %1 %uint_0
+ OpStore %22 %21
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %19
+ %26 = OpLabel
+ %27 = OpFunctionCall %v2int %subgroupOr_3f60e0
+ %28 = OpAccessChain %_ptr_StorageBuffer_v2int %1 %uint_0
+ OpStore %28 %27
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl.expected.msl b/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl.expected.msl
new file mode 100644
index 0000000..e3c533e
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl.expected.msl
@@ -0,0 +1,18 @@
+#include <metal_stdlib>
+
+using namespace metal;
+int2 subgroupOr_3f60e0() {
+ int2 res = simd_or(int2(1));
+ return res;
+}
+
+fragment void fragment_main(device int2* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupOr_3f60e0();
+ return;
+}
+
+kernel void compute_main(device int2* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupOr_3f60e0();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl.expected.spvasm b/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl.expected.spvasm
new file mode 100644
index 0000000..5e2d8ea
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl.expected.spvasm
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<i32>;
+
+fn subgroupOr_3f60e0() -> vec2<i32> {
+ var res : vec2<i32> = subgroupOr(vec2<i32>(1i));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_3f60e0();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl.expected.wgsl b/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl.expected.wgsl
new file mode 100644
index 0000000..0368ecb
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/3f60e0.wgsl.expected.wgsl
@@ -0,0 +1,18 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<i32>;
+
+fn subgroupOr_3f60e0() -> vec2<i32> {
+ var res : vec2<i32> = subgroupOr(vec2<i32>(1i));
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupOr_3f60e0();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_3f60e0();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl b/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl
new file mode 100644
index 0000000..2a19866
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl
@@ -0,0 +1,58 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<i32>;
+
+
+// fn subgroupOr(value: vec<4, i32>) -> vec<4, i32>
+fn subgroupOr_4d4eb0() -> vec4<i32>{
+ var res: vec4<i32> = subgroupOr(vec4<i32>(1i));
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupOr_4d4eb0();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_4d4eb0();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..b7c8d5c
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl.expected.dxc.hlsl
@@ -0,0 +1,18 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int4 subgroupOr_4d4eb0() {
+ int4 tint_tmp = (1).xxxx;
+ int4 res = asint(WaveActiveBitOr(asuint(tint_tmp)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupOr_4d4eb0()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupOr_4d4eb0()));
+ return;
+}
diff --git a/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..6f33107
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl.expected.fxc.hlsl
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int4 subgroupOr_4d4eb0() {
+ int4 tint_tmp = (1).xxxx;
+ int4 res = asint(WaveActiveBitOr(asuint(tint_tmp)));
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupOr_4d4eb0()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001F1F762F3E0(5,20-52): error X3004: undeclared identifier 'WaveActiveBitOr'
+
diff --git a/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl.expected.glsl b/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl.expected.glsl
new file mode 100644
index 0000000..16431dd
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl.expected.glsl
@@ -0,0 +1,21 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<i32>;
+
+fn subgroupOr_4d4eb0() -> vec4<i32> {
+ var res : vec4<i32> = subgroupOr(vec4<i32>(1i));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_4d4eb0();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..a694c38
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,17 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+int4 subgroupOr_4d4eb0() {
+ int4 arg = (1).xxxx;
+ int4 res = asint(WaveActiveBitOr(asuint(arg)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupOr_4d4eb0()));
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupOr_4d4eb0()));
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl.expected.ir.msl
new file mode 100644
index 0000000..48b1f93
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl.expected.ir.msl
@@ -0,0 +1,21 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device int4* prevent_dce;
+};
+
+int4 subgroupOr_4d4eb0() {
+ int4 res = simd_or(int4(1));
+ return res;
+}
+
+fragment void fragment_main(device int4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupOr_4d4eb0();
+}
+
+kernel void compute_main(device int4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupOr_4d4eb0();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..4fbf275
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl.expected.ir.spvasm
@@ -0,0 +1,59 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 29
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupOr_4d4eb0 "subgroupOr_4d4eb0"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %int = OpTypeInt 32 1
+ %v4int = OpTypeVector %int 4
+%tint_symbol_1 = OpTypeStruct %v4int
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v4int
+ %uint = OpTypeInt 32 0
+ %uint_3 = OpConstant %uint 3
+ %int_1 = OpConstant %int 1
+ %12 = OpConstantComposite %v4int %int_1 %int_1 %int_1 %int_1
+%_ptr_Function_v4int = OpTypePointer Function %v4int
+ %void = OpTypeVoid
+ %19 = OpTypeFunction %void
+%_ptr_StorageBuffer_v4int = OpTypePointer StorageBuffer %v4int
+ %uint_0 = OpConstant %uint 0
+%subgroupOr_4d4eb0 = OpFunction %v4int None %7
+ %8 = OpLabel
+ %res = OpVariable %_ptr_Function_v4int Function
+ %9 = OpGroupNonUniformBitwiseOr %v4int %uint_3 Reduce %12
+ OpStore %res %9
+ %16 = OpLoad %v4int %res
+ OpReturnValue %16
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %19
+ %20 = OpLabel
+ %21 = OpFunctionCall %v4int %subgroupOr_4d4eb0
+ %22 = OpAccessChain %_ptr_StorageBuffer_v4int %1 %uint_0
+ OpStore %22 %21
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %19
+ %26 = OpLabel
+ %27 = OpFunctionCall %v4int %subgroupOr_4d4eb0
+ %28 = OpAccessChain %_ptr_StorageBuffer_v4int %1 %uint_0
+ OpStore %28 %27
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl.expected.msl b/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl.expected.msl
new file mode 100644
index 0000000..88786a8
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl.expected.msl
@@ -0,0 +1,18 @@
+#include <metal_stdlib>
+
+using namespace metal;
+int4 subgroupOr_4d4eb0() {
+ int4 res = simd_or(int4(1));
+ return res;
+}
+
+fragment void fragment_main(device int4* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupOr_4d4eb0();
+ return;
+}
+
+kernel void compute_main(device int4* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupOr_4d4eb0();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl.expected.spvasm b/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl.expected.spvasm
new file mode 100644
index 0000000..36453d0
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl.expected.spvasm
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<i32>;
+
+fn subgroupOr_4d4eb0() -> vec4<i32> {
+ var res : vec4<i32> = subgroupOr(vec4<i32>(1i));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_4d4eb0();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl.expected.wgsl b/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl.expected.wgsl
new file mode 100644
index 0000000..aa36ddc
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/4d4eb0.wgsl.expected.wgsl
@@ -0,0 +1,18 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<i32>;
+
+fn subgroupOr_4d4eb0() -> vec4<i32> {
+ var res : vec4<i32> = subgroupOr(vec4<i32>(1i));
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupOr_4d4eb0();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_4d4eb0();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl b/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl
new file mode 100644
index 0000000..527b609
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl
@@ -0,0 +1,58 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<u32>;
+
+
+// fn subgroupOr(value: vec<3, u32>) -> vec<3, u32>
+fn subgroupOr_663a21() -> vec3<u32>{
+ var res: vec3<u32> = subgroupOr(vec3<u32>(1u));
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupOr_663a21();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_663a21();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..1669bd9
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl.expected.dxc.hlsl
@@ -0,0 +1,17 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint3 subgroupOr_663a21() {
+ uint3 res = WaveActiveBitOr((1u).xxx);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupOr_663a21()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupOr_663a21()));
+ return;
+}
diff --git a/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..9f013ea
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl.expected.fxc.hlsl
@@ -0,0 +1,17 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint3 subgroupOr_663a21() {
+ uint3 res = WaveActiveBitOr((1u).xxx);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupOr_663a21()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000244C44786C0(4,15-39): error X3004: undeclared identifier 'WaveActiveBitOr'
+
diff --git a/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl.expected.glsl b/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl.expected.glsl
new file mode 100644
index 0000000..d5c45b4
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl.expected.glsl
@@ -0,0 +1,21 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<u32>;
+
+fn subgroupOr_663a21() -> vec3<u32> {
+ var res : vec3<u32> = subgroupOr(vec3<u32>(1u));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_663a21();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..b5e20e1
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,16 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+uint3 subgroupOr_663a21() {
+ uint3 res = WaveActiveBitOr((1u).xxx);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store3(0u, subgroupOr_663a21());
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, subgroupOr_663a21());
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl.expected.ir.msl
new file mode 100644
index 0000000..1525688
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl.expected.ir.msl
@@ -0,0 +1,21 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device uint3* prevent_dce;
+};
+
+uint3 subgroupOr_663a21() {
+ uint3 res = simd_or(uint3(1u));
+ return res;
+}
+
+fragment void fragment_main(device uint3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupOr_663a21();
+}
+
+kernel void compute_main(device uint3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupOr_663a21();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..c5db461
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl.expected.ir.spvasm
@@ -0,0 +1,58 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 28
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupOr_663a21 "subgroupOr_663a21"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %uint = OpTypeInt 32 0
+ %v3uint = OpTypeVector %uint 3
+%tint_symbol_1 = OpTypeStruct %v3uint
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v3uint
+ %uint_3 = OpConstant %uint 3
+ %uint_1 = OpConstant %uint 1
+ %11 = OpConstantComposite %v3uint %uint_1 %uint_1 %uint_1
+%_ptr_Function_v3uint = OpTypePointer Function %v3uint
+ %void = OpTypeVoid
+ %18 = OpTypeFunction %void
+%_ptr_StorageBuffer_v3uint = OpTypePointer StorageBuffer %v3uint
+ %uint_0 = OpConstant %uint 0
+%subgroupOr_663a21 = OpFunction %v3uint None %7
+ %8 = OpLabel
+ %res = OpVariable %_ptr_Function_v3uint Function
+ %9 = OpGroupNonUniformBitwiseOr %v3uint %uint_3 Reduce %11
+ OpStore %res %9
+ %15 = OpLoad %v3uint %res
+ OpReturnValue %15
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %18
+ %19 = OpLabel
+ %20 = OpFunctionCall %v3uint %subgroupOr_663a21
+ %21 = OpAccessChain %_ptr_StorageBuffer_v3uint %1 %uint_0
+ OpStore %21 %20
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %18
+ %25 = OpLabel
+ %26 = OpFunctionCall %v3uint %subgroupOr_663a21
+ %27 = OpAccessChain %_ptr_StorageBuffer_v3uint %1 %uint_0
+ OpStore %27 %26
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl.expected.msl b/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl.expected.msl
new file mode 100644
index 0000000..d4d6fcf
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl.expected.msl
@@ -0,0 +1,18 @@
+#include <metal_stdlib>
+
+using namespace metal;
+uint3 subgroupOr_663a21() {
+ uint3 res = simd_or(uint3(1u));
+ return res;
+}
+
+fragment void fragment_main(device packed_uint3* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = packed_uint3(subgroupOr_663a21());
+ return;
+}
+
+kernel void compute_main(device packed_uint3* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = packed_uint3(subgroupOr_663a21());
+ return;
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl.expected.spvasm b/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl.expected.spvasm
new file mode 100644
index 0000000..8a12ea3
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl.expected.spvasm
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<u32>;
+
+fn subgroupOr_663a21() -> vec3<u32> {
+ var res : vec3<u32> = subgroupOr(vec3<u32>(1u));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_663a21();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl.expected.wgsl b/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl.expected.wgsl
new file mode 100644
index 0000000..b48ff1e
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/663a21.wgsl.expected.wgsl
@@ -0,0 +1,18 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<u32>;
+
+fn subgroupOr_663a21() -> vec3<u32> {
+ var res : vec3<u32> = subgroupOr(vec3<u32>(1u));
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupOr_663a21();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_663a21();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl b/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl
new file mode 100644
index 0000000..44b1d25
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl
@@ -0,0 +1,58 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<u32>;
+
+
+// fn subgroupOr(value: vec<2, u32>) -> vec<2, u32>
+fn subgroupOr_aa74f7() -> vec2<u32>{
+ var res: vec2<u32> = subgroupOr(vec2<u32>(1u));
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupOr_aa74f7();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_aa74f7();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..763c85d
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl.expected.dxc.hlsl
@@ -0,0 +1,17 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint2 subgroupOr_aa74f7() {
+ uint2 res = WaveActiveBitOr((1u).xx);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupOr_aa74f7()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupOr_aa74f7()));
+ return;
+}
diff --git a/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..df1e945
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl.expected.fxc.hlsl
@@ -0,0 +1,17 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint2 subgroupOr_aa74f7() {
+ uint2 res = WaveActiveBitOr((1u).xx);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupOr_aa74f7()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001DAEF2F3690(4,15-38): error X3004: undeclared identifier 'WaveActiveBitOr'
+
diff --git a/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl.expected.glsl b/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl.expected.glsl
new file mode 100644
index 0000000..d3340b6
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl.expected.glsl
@@ -0,0 +1,21 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<u32>;
+
+fn subgroupOr_aa74f7() -> vec2<u32> {
+ var res : vec2<u32> = subgroupOr(vec2<u32>(1u));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_aa74f7();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..669f4ad
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,16 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+uint2 subgroupOr_aa74f7() {
+ uint2 res = WaveActiveBitOr((1u).xx);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store2(0u, subgroupOr_aa74f7());
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, subgroupOr_aa74f7());
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl.expected.ir.msl
new file mode 100644
index 0000000..3f2c33e
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl.expected.ir.msl
@@ -0,0 +1,21 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device uint2* prevent_dce;
+};
+
+uint2 subgroupOr_aa74f7() {
+ uint2 res = simd_or(uint2(1u));
+ return res;
+}
+
+fragment void fragment_main(device uint2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupOr_aa74f7();
+}
+
+kernel void compute_main(device uint2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupOr_aa74f7();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..77776cb
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl.expected.ir.spvasm
@@ -0,0 +1,58 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 28
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupOr_aa74f7 "subgroupOr_aa74f7"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %uint = OpTypeInt 32 0
+ %v2uint = OpTypeVector %uint 2
+%tint_symbol_1 = OpTypeStruct %v2uint
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v2uint
+ %uint_3 = OpConstant %uint 3
+ %uint_1 = OpConstant %uint 1
+ %11 = OpConstantComposite %v2uint %uint_1 %uint_1
+%_ptr_Function_v2uint = OpTypePointer Function %v2uint
+ %void = OpTypeVoid
+ %18 = OpTypeFunction %void
+%_ptr_StorageBuffer_v2uint = OpTypePointer StorageBuffer %v2uint
+ %uint_0 = OpConstant %uint 0
+%subgroupOr_aa74f7 = OpFunction %v2uint None %7
+ %8 = OpLabel
+ %res = OpVariable %_ptr_Function_v2uint Function
+ %9 = OpGroupNonUniformBitwiseOr %v2uint %uint_3 Reduce %11
+ OpStore %res %9
+ %15 = OpLoad %v2uint %res
+ OpReturnValue %15
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %18
+ %19 = OpLabel
+ %20 = OpFunctionCall %v2uint %subgroupOr_aa74f7
+ %21 = OpAccessChain %_ptr_StorageBuffer_v2uint %1 %uint_0
+ OpStore %21 %20
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %18
+ %25 = OpLabel
+ %26 = OpFunctionCall %v2uint %subgroupOr_aa74f7
+ %27 = OpAccessChain %_ptr_StorageBuffer_v2uint %1 %uint_0
+ OpStore %27 %26
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl.expected.msl b/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl.expected.msl
new file mode 100644
index 0000000..3452b83
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl.expected.msl
@@ -0,0 +1,18 @@
+#include <metal_stdlib>
+
+using namespace metal;
+uint2 subgroupOr_aa74f7() {
+ uint2 res = simd_or(uint2(1u));
+ return res;
+}
+
+fragment void fragment_main(device uint2* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupOr_aa74f7();
+ return;
+}
+
+kernel void compute_main(device uint2* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupOr_aa74f7();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl.expected.spvasm b/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl.expected.spvasm
new file mode 100644
index 0000000..d79175a
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl.expected.spvasm
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<u32>;
+
+fn subgroupOr_aa74f7() -> vec2<u32> {
+ var res : vec2<u32> = subgroupOr(vec2<u32>(1u));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_aa74f7();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl.expected.wgsl b/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl.expected.wgsl
new file mode 100644
index 0000000..aff1f8a
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/aa74f7.wgsl.expected.wgsl
@@ -0,0 +1,18 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<u32>;
+
+fn subgroupOr_aa74f7() -> vec2<u32> {
+ var res : vec2<u32> = subgroupOr(vec2<u32>(1u));
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupOr_aa74f7();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_aa74f7();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl b/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl
new file mode 100644
index 0000000..41f1fdb
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl
@@ -0,0 +1,58 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : i32;
+
+
+// fn subgroupOr(value: i32) -> i32
+fn subgroupOr_ae58b6() -> i32{
+ var res: i32 = subgroupOr(1i);
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupOr_ae58b6();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_ae58b6();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..5425d3b
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl.expected.dxc.hlsl
@@ -0,0 +1,17 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int subgroupOr_ae58b6() {
+ int res = asint(WaveActiveBitOr(asuint(1)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupOr_ae58b6()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupOr_ae58b6()));
+ return;
+}
diff --git a/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..2ec1e40
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl.expected.fxc.hlsl
@@ -0,0 +1,17 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int subgroupOr_ae58b6() {
+ int res = asint(WaveActiveBitOr(asuint(1)));
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupOr_ae58b6()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001FF6F0986C0(4,19-44): error X3004: undeclared identifier 'WaveActiveBitOr'
+
diff --git a/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl.expected.glsl b/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl.expected.glsl
new file mode 100644
index 0000000..33718af
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl.expected.glsl
@@ -0,0 +1,21 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : i32;
+
+fn subgroupOr_ae58b6() -> i32 {
+ var res : i32 = subgroupOr(1i);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_ae58b6();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..b303460
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,16 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+int subgroupOr_ae58b6() {
+ int res = asint(WaveActiveBitOr(asuint(1)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupOr_ae58b6()));
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupOr_ae58b6()));
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl.expected.ir.msl
new file mode 100644
index 0000000..3629a5e
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl.expected.ir.msl
@@ -0,0 +1,21 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device int* prevent_dce;
+};
+
+int subgroupOr_ae58b6() {
+ int res = simd_or(1);
+ return res;
+}
+
+fragment void fragment_main(device int* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupOr_ae58b6();
+}
+
+kernel void compute_main(device int* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupOr_ae58b6();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..bf9b09e
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl.expected.ir.spvasm
@@ -0,0 +1,57 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 27
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupOr_ae58b6 "subgroupOr_ae58b6"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %int = OpTypeInt 32 1
+%tint_symbol_1 = OpTypeStruct %int
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %6 = OpTypeFunction %int
+ %uint = OpTypeInt 32 0
+ %uint_3 = OpConstant %uint 3
+ %int_1 = OpConstant %int 1
+%_ptr_Function_int = OpTypePointer Function %int
+ %void = OpTypeVoid
+ %17 = OpTypeFunction %void
+%_ptr_StorageBuffer_int = OpTypePointer StorageBuffer %int
+ %uint_0 = OpConstant %uint 0
+%subgroupOr_ae58b6 = OpFunction %int None %6
+ %7 = OpLabel
+ %res = OpVariable %_ptr_Function_int Function
+ %8 = OpGroupNonUniformBitwiseOr %int %uint_3 Reduce %int_1
+ OpStore %res %8
+ %14 = OpLoad %int %res
+ OpReturnValue %14
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %17
+ %18 = OpLabel
+ %19 = OpFunctionCall %int %subgroupOr_ae58b6
+ %20 = OpAccessChain %_ptr_StorageBuffer_int %1 %uint_0
+ OpStore %20 %19
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %17
+ %24 = OpLabel
+ %25 = OpFunctionCall %int %subgroupOr_ae58b6
+ %26 = OpAccessChain %_ptr_StorageBuffer_int %1 %uint_0
+ OpStore %26 %25
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl.expected.msl b/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl.expected.msl
new file mode 100644
index 0000000..8d03798
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl.expected.msl
@@ -0,0 +1,18 @@
+#include <metal_stdlib>
+
+using namespace metal;
+int subgroupOr_ae58b6() {
+ int res = simd_or(1);
+ return res;
+}
+
+fragment void fragment_main(device int* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupOr_ae58b6();
+ return;
+}
+
+kernel void compute_main(device int* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupOr_ae58b6();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl.expected.spvasm b/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl.expected.spvasm
new file mode 100644
index 0000000..ea5034a
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl.expected.spvasm
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : i32;
+
+fn subgroupOr_ae58b6() -> i32 {
+ var res : i32 = subgroupOr(1i);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_ae58b6();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl.expected.wgsl b/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl.expected.wgsl
new file mode 100644
index 0000000..73f89b3
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/ae58b6.wgsl.expected.wgsl
@@ -0,0 +1,18 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : i32;
+
+fn subgroupOr_ae58b6() -> i32 {
+ var res : i32 = subgroupOr(1i);
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupOr_ae58b6();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_ae58b6();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl b/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl
new file mode 100644
index 0000000..5e88d6f
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl
@@ -0,0 +1,58 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<u32>;
+
+
+// fn subgroupOr(value: vec<4, u32>) -> vec<4, u32>
+fn subgroupOr_f915e3() -> vec4<u32>{
+ var res: vec4<u32> = subgroupOr(vec4<u32>(1u));
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupOr_f915e3();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_f915e3();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..6fa839e
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl.expected.dxc.hlsl
@@ -0,0 +1,17 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint4 subgroupOr_f915e3() {
+ uint4 res = WaveActiveBitOr((1u).xxxx);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupOr_f915e3()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupOr_f915e3()));
+ return;
+}
diff --git a/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..eb289f5
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl.expected.fxc.hlsl
@@ -0,0 +1,17 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint4 subgroupOr_f915e3() {
+ uint4 res = WaveActiveBitOr((1u).xxxx);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupOr_f915e3()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000214A6D31D70(4,15-40): error X3004: undeclared identifier 'WaveActiveBitOr'
+
diff --git a/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl.expected.glsl b/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl.expected.glsl
new file mode 100644
index 0000000..f4c29f4
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl.expected.glsl
@@ -0,0 +1,21 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<u32>;
+
+fn subgroupOr_f915e3() -> vec4<u32> {
+ var res : vec4<u32> = subgroupOr(vec4<u32>(1u));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_f915e3();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..baf222f
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,16 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+uint4 subgroupOr_f915e3() {
+ uint4 res = WaveActiveBitOr((1u).xxxx);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store4(0u, subgroupOr_f915e3());
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, subgroupOr_f915e3());
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl.expected.ir.msl
new file mode 100644
index 0000000..708e5c2
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl.expected.ir.msl
@@ -0,0 +1,21 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device uint4* prevent_dce;
+};
+
+uint4 subgroupOr_f915e3() {
+ uint4 res = simd_or(uint4(1u));
+ return res;
+}
+
+fragment void fragment_main(device uint4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupOr_f915e3();
+}
+
+kernel void compute_main(device uint4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupOr_f915e3();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..afdf3a7
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl.expected.ir.spvasm
@@ -0,0 +1,58 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 28
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupOr_f915e3 "subgroupOr_f915e3"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %uint = OpTypeInt 32 0
+ %v4uint = OpTypeVector %uint 4
+%tint_symbol_1 = OpTypeStruct %v4uint
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v4uint
+ %uint_3 = OpConstant %uint 3
+ %uint_1 = OpConstant %uint 1
+ %11 = OpConstantComposite %v4uint %uint_1 %uint_1 %uint_1 %uint_1
+%_ptr_Function_v4uint = OpTypePointer Function %v4uint
+ %void = OpTypeVoid
+ %18 = OpTypeFunction %void
+%_ptr_StorageBuffer_v4uint = OpTypePointer StorageBuffer %v4uint
+ %uint_0 = OpConstant %uint 0
+%subgroupOr_f915e3 = OpFunction %v4uint None %7
+ %8 = OpLabel
+ %res = OpVariable %_ptr_Function_v4uint Function
+ %9 = OpGroupNonUniformBitwiseOr %v4uint %uint_3 Reduce %11
+ OpStore %res %9
+ %15 = OpLoad %v4uint %res
+ OpReturnValue %15
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %18
+ %19 = OpLabel
+ %20 = OpFunctionCall %v4uint %subgroupOr_f915e3
+ %21 = OpAccessChain %_ptr_StorageBuffer_v4uint %1 %uint_0
+ OpStore %21 %20
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %18
+ %25 = OpLabel
+ %26 = OpFunctionCall %v4uint %subgroupOr_f915e3
+ %27 = OpAccessChain %_ptr_StorageBuffer_v4uint %1 %uint_0
+ OpStore %27 %26
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl.expected.msl b/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl.expected.msl
new file mode 100644
index 0000000..66956e9
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl.expected.msl
@@ -0,0 +1,18 @@
+#include <metal_stdlib>
+
+using namespace metal;
+uint4 subgroupOr_f915e3() {
+ uint4 res = simd_or(uint4(1u));
+ return res;
+}
+
+fragment void fragment_main(device uint4* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupOr_f915e3();
+ return;
+}
+
+kernel void compute_main(device uint4* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupOr_f915e3();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl.expected.spvasm b/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl.expected.spvasm
new file mode 100644
index 0000000..98c490b
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl.expected.spvasm
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<u32>;
+
+fn subgroupOr_f915e3() -> vec4<u32> {
+ var res : vec4<u32> = subgroupOr(vec4<u32>(1u));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_f915e3();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl.expected.wgsl b/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl.expected.wgsl
new file mode 100644
index 0000000..cb3ab36
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupOr/f915e3.wgsl.expected.wgsl
@@ -0,0 +1,18 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<u32>;
+
+fn subgroupOr_f915e3() -> vec4<u32> {
+ var res : vec4<u32> = subgroupOr(vec4<u32>(1u));
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupOr_f915e3();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_f915e3();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl b/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl
new file mode 100644
index 0000000..a3eb2bb
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl
@@ -0,0 +1,58 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<u32>;
+
+
+// fn subgroupXor(value: vec<3, u32>) -> vec<3, u32>
+fn subgroupXor_468721() -> vec3<u32>{
+ var res: vec3<u32> = subgroupXor(vec3<u32>(1u));
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupXor_468721();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_468721();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..23c44a5
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl.expected.dxc.hlsl
@@ -0,0 +1,17 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint3 subgroupXor_468721() {
+ uint3 res = WaveActiveBitXor((1u).xxx);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupXor_468721()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupXor_468721()));
+ return;
+}
diff --git a/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..637f404
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl.expected.fxc.hlsl
@@ -0,0 +1,17 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint3 subgroupXor_468721() {
+ uint3 res = WaveActiveBitXor((1u).xxx);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupXor_468721()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001CEE4B02460(4,15-40): error X3004: undeclared identifier 'WaveActiveBitXor'
+
diff --git a/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl.expected.glsl b/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl.expected.glsl
new file mode 100644
index 0000000..9ad9a4c
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl.expected.glsl
@@ -0,0 +1,21 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<u32>;
+
+fn subgroupXor_468721() -> vec3<u32> {
+ var res : vec3<u32> = subgroupXor(vec3<u32>(1u));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_468721();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..adb7970
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,16 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+uint3 subgroupXor_468721() {
+ uint3 res = WaveActiveBitXor((1u).xxx);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store3(0u, subgroupXor_468721());
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, subgroupXor_468721());
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl.expected.ir.msl
new file mode 100644
index 0000000..9d604b9
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl.expected.ir.msl
@@ -0,0 +1,21 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device uint3* prevent_dce;
+};
+
+uint3 subgroupXor_468721() {
+ uint3 res = simd_xor(uint3(1u));
+ return res;
+}
+
+fragment void fragment_main(device uint3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupXor_468721();
+}
+
+kernel void compute_main(device uint3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupXor_468721();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..88262a7
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl.expected.ir.spvasm
@@ -0,0 +1,58 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 28
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupXor_468721 "subgroupXor_468721"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %uint = OpTypeInt 32 0
+ %v3uint = OpTypeVector %uint 3
+%tint_symbol_1 = OpTypeStruct %v3uint
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v3uint
+ %uint_3 = OpConstant %uint 3
+ %uint_1 = OpConstant %uint 1
+ %11 = OpConstantComposite %v3uint %uint_1 %uint_1 %uint_1
+%_ptr_Function_v3uint = OpTypePointer Function %v3uint
+ %void = OpTypeVoid
+ %18 = OpTypeFunction %void
+%_ptr_StorageBuffer_v3uint = OpTypePointer StorageBuffer %v3uint
+ %uint_0 = OpConstant %uint 0
+%subgroupXor_468721 = OpFunction %v3uint None %7
+ %8 = OpLabel
+ %res = OpVariable %_ptr_Function_v3uint Function
+ %9 = OpGroupNonUniformBitwiseXor %v3uint %uint_3 Reduce %11
+ OpStore %res %9
+ %15 = OpLoad %v3uint %res
+ OpReturnValue %15
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %18
+ %19 = OpLabel
+ %20 = OpFunctionCall %v3uint %subgroupXor_468721
+ %21 = OpAccessChain %_ptr_StorageBuffer_v3uint %1 %uint_0
+ OpStore %21 %20
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %18
+ %25 = OpLabel
+ %26 = OpFunctionCall %v3uint %subgroupXor_468721
+ %27 = OpAccessChain %_ptr_StorageBuffer_v3uint %1 %uint_0
+ OpStore %27 %26
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl.expected.msl b/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl.expected.msl
new file mode 100644
index 0000000..f5f8b05
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl.expected.msl
@@ -0,0 +1,18 @@
+#include <metal_stdlib>
+
+using namespace metal;
+uint3 subgroupXor_468721() {
+ uint3 res = simd_xor(uint3(1u));
+ return res;
+}
+
+fragment void fragment_main(device packed_uint3* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = packed_uint3(subgroupXor_468721());
+ return;
+}
+
+kernel void compute_main(device packed_uint3* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = packed_uint3(subgroupXor_468721());
+ return;
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl.expected.spvasm b/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl.expected.spvasm
new file mode 100644
index 0000000..4d3081c
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl.expected.spvasm
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<u32>;
+
+fn subgroupXor_468721() -> vec3<u32> {
+ var res : vec3<u32> = subgroupXor(vec3<u32>(1u));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_468721();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl.expected.wgsl b/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl.expected.wgsl
new file mode 100644
index 0000000..d242689
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/468721.wgsl.expected.wgsl
@@ -0,0 +1,18 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<u32>;
+
+fn subgroupXor_468721() -> vec3<u32> {
+ var res : vec3<u32> = subgroupXor(vec3<u32>(1u));
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupXor_468721();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_468721();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl b/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl
new file mode 100644
index 0000000..96cb3bc
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl
@@ -0,0 +1,58 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<i32>;
+
+
+// fn subgroupXor(value: vec<2, i32>) -> vec<2, i32>
+fn subgroupXor_473de8() -> vec2<i32>{
+ var res: vec2<i32> = subgroupXor(vec2<i32>(1i));
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupXor_473de8();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_473de8();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..b108199
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl.expected.dxc.hlsl
@@ -0,0 +1,18 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int2 subgroupXor_473de8() {
+ int2 tint_tmp = (1).xx;
+ int2 res = asint(WaveActiveBitXor(asuint(tint_tmp)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupXor_473de8()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupXor_473de8()));
+ return;
+}
diff --git a/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..938a026
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl.expected.fxc.hlsl
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int2 subgroupXor_473de8() {
+ int2 tint_tmp = (1).xx;
+ int2 res = asint(WaveActiveBitXor(asuint(tint_tmp)));
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupXor_473de8()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001EB105DF2E0(5,20-53): error X3004: undeclared identifier 'WaveActiveBitXor'
+
diff --git a/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl.expected.glsl b/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl.expected.glsl
new file mode 100644
index 0000000..cbb2f4f
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl.expected.glsl
@@ -0,0 +1,21 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<i32>;
+
+fn subgroupXor_473de8() -> vec2<i32> {
+ var res : vec2<i32> = subgroupXor(vec2<i32>(1i));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_473de8();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..69b8d09
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,17 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+int2 subgroupXor_473de8() {
+ int2 arg = (1).xx;
+ int2 res = asint(WaveActiveBitXor(asuint(arg)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupXor_473de8()));
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupXor_473de8()));
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl.expected.ir.msl
new file mode 100644
index 0000000..58eccca
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl.expected.ir.msl
@@ -0,0 +1,21 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device int2* prevent_dce;
+};
+
+int2 subgroupXor_473de8() {
+ int2 res = simd_xor(int2(1));
+ return res;
+}
+
+fragment void fragment_main(device int2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupXor_473de8();
+}
+
+kernel void compute_main(device int2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupXor_473de8();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..96584f7
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl.expected.ir.spvasm
@@ -0,0 +1,59 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 29
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupXor_473de8 "subgroupXor_473de8"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %int = OpTypeInt 32 1
+ %v2int = OpTypeVector %int 2
+%tint_symbol_1 = OpTypeStruct %v2int
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v2int
+ %uint = OpTypeInt 32 0
+ %uint_3 = OpConstant %uint 3
+ %int_1 = OpConstant %int 1
+ %12 = OpConstantComposite %v2int %int_1 %int_1
+%_ptr_Function_v2int = OpTypePointer Function %v2int
+ %void = OpTypeVoid
+ %19 = OpTypeFunction %void
+%_ptr_StorageBuffer_v2int = OpTypePointer StorageBuffer %v2int
+ %uint_0 = OpConstant %uint 0
+%subgroupXor_473de8 = OpFunction %v2int None %7
+ %8 = OpLabel
+ %res = OpVariable %_ptr_Function_v2int Function
+ %9 = OpGroupNonUniformBitwiseXor %v2int %uint_3 Reduce %12
+ OpStore %res %9
+ %16 = OpLoad %v2int %res
+ OpReturnValue %16
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %19
+ %20 = OpLabel
+ %21 = OpFunctionCall %v2int %subgroupXor_473de8
+ %22 = OpAccessChain %_ptr_StorageBuffer_v2int %1 %uint_0
+ OpStore %22 %21
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %19
+ %26 = OpLabel
+ %27 = OpFunctionCall %v2int %subgroupXor_473de8
+ %28 = OpAccessChain %_ptr_StorageBuffer_v2int %1 %uint_0
+ OpStore %28 %27
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl.expected.msl b/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl.expected.msl
new file mode 100644
index 0000000..2f76226
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl.expected.msl
@@ -0,0 +1,18 @@
+#include <metal_stdlib>
+
+using namespace metal;
+int2 subgroupXor_473de8() {
+ int2 res = simd_xor(int2(1));
+ return res;
+}
+
+fragment void fragment_main(device int2* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupXor_473de8();
+ return;
+}
+
+kernel void compute_main(device int2* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupXor_473de8();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl.expected.spvasm b/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl.expected.spvasm
new file mode 100644
index 0000000..5565553
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl.expected.spvasm
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<i32>;
+
+fn subgroupXor_473de8() -> vec2<i32> {
+ var res : vec2<i32> = subgroupXor(vec2<i32>(1i));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_473de8();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl.expected.wgsl b/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl.expected.wgsl
new file mode 100644
index 0000000..9c938db
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/473de8.wgsl.expected.wgsl
@@ -0,0 +1,18 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<i32>;
+
+fn subgroupXor_473de8() -> vec2<i32> {
+ var res : vec2<i32> = subgroupXor(vec2<i32>(1i));
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupXor_473de8();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_473de8();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl b/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl
new file mode 100644
index 0000000..29d3bcf
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl
@@ -0,0 +1,58 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : i32;
+
+
+// fn subgroupXor(value: i32) -> i32
+fn subgroupXor_694b17() -> i32{
+ var res: i32 = subgroupXor(1i);
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupXor_694b17();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_694b17();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..a30a5ca
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl.expected.dxc.hlsl
@@ -0,0 +1,17 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int subgroupXor_694b17() {
+ int res = asint(WaveActiveBitXor(asuint(1)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupXor_694b17()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupXor_694b17()));
+ return;
+}
diff --git a/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..9d90935
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl.expected.fxc.hlsl
@@ -0,0 +1,17 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int subgroupXor_694b17() {
+ int res = asint(WaveActiveBitXor(asuint(1)));
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupXor_694b17()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000270803DB1B0(4,19-45): error X3004: undeclared identifier 'WaveActiveBitXor'
+
diff --git a/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl.expected.glsl b/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl.expected.glsl
new file mode 100644
index 0000000..c04c501
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl.expected.glsl
@@ -0,0 +1,21 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : i32;
+
+fn subgroupXor_694b17() -> i32 {
+ var res : i32 = subgroupXor(1i);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_694b17();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..a847ee9
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,16 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+int subgroupXor_694b17() {
+ int res = asint(WaveActiveBitXor(asuint(1)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupXor_694b17()));
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupXor_694b17()));
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl.expected.ir.msl
new file mode 100644
index 0000000..3e80e77
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl.expected.ir.msl
@@ -0,0 +1,21 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device int* prevent_dce;
+};
+
+int subgroupXor_694b17() {
+ int res = simd_xor(1);
+ return res;
+}
+
+fragment void fragment_main(device int* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupXor_694b17();
+}
+
+kernel void compute_main(device int* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupXor_694b17();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..2fb7650
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl.expected.ir.spvasm
@@ -0,0 +1,57 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 27
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupXor_694b17 "subgroupXor_694b17"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %int = OpTypeInt 32 1
+%tint_symbol_1 = OpTypeStruct %int
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %6 = OpTypeFunction %int
+ %uint = OpTypeInt 32 0
+ %uint_3 = OpConstant %uint 3
+ %int_1 = OpConstant %int 1
+%_ptr_Function_int = OpTypePointer Function %int
+ %void = OpTypeVoid
+ %17 = OpTypeFunction %void
+%_ptr_StorageBuffer_int = OpTypePointer StorageBuffer %int
+ %uint_0 = OpConstant %uint 0
+%subgroupXor_694b17 = OpFunction %int None %6
+ %7 = OpLabel
+ %res = OpVariable %_ptr_Function_int Function
+ %8 = OpGroupNonUniformBitwiseXor %int %uint_3 Reduce %int_1
+ OpStore %res %8
+ %14 = OpLoad %int %res
+ OpReturnValue %14
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %17
+ %18 = OpLabel
+ %19 = OpFunctionCall %int %subgroupXor_694b17
+ %20 = OpAccessChain %_ptr_StorageBuffer_int %1 %uint_0
+ OpStore %20 %19
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %17
+ %24 = OpLabel
+ %25 = OpFunctionCall %int %subgroupXor_694b17
+ %26 = OpAccessChain %_ptr_StorageBuffer_int %1 %uint_0
+ OpStore %26 %25
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl.expected.msl b/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl.expected.msl
new file mode 100644
index 0000000..7731b77
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl.expected.msl
@@ -0,0 +1,18 @@
+#include <metal_stdlib>
+
+using namespace metal;
+int subgroupXor_694b17() {
+ int res = simd_xor(1);
+ return res;
+}
+
+fragment void fragment_main(device int* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupXor_694b17();
+ return;
+}
+
+kernel void compute_main(device int* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupXor_694b17();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl.expected.spvasm b/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl.expected.spvasm
new file mode 100644
index 0000000..da2b194
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl.expected.spvasm
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : i32;
+
+fn subgroupXor_694b17() -> i32 {
+ var res : i32 = subgroupXor(1i);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_694b17();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl.expected.wgsl b/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl.expected.wgsl
new file mode 100644
index 0000000..cfb58a2
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/694b17.wgsl.expected.wgsl
@@ -0,0 +1,18 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : i32;
+
+fn subgroupXor_694b17() -> i32 {
+ var res : i32 = subgroupXor(1i);
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupXor_694b17();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_694b17();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl b/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl
new file mode 100644
index 0000000..558bdcf
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl
@@ -0,0 +1,58 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : u32;
+
+
+// fn subgroupXor(value: u32) -> u32
+fn subgroupXor_7750d6() -> u32{
+ var res: u32 = subgroupXor(1u);
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupXor_7750d6();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_7750d6();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..8f4d990
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl.expected.dxc.hlsl
@@ -0,0 +1,17 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint subgroupXor_7750d6() {
+ uint res = WaveActiveBitXor(1u);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupXor_7750d6()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupXor_7750d6()));
+ return;
+}
diff --git a/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..42110f2
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl.expected.fxc.hlsl
@@ -0,0 +1,17 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint subgroupXor_7750d6() {
+ uint res = WaveActiveBitXor(1u);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupXor_7750d6()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000017025E7FFC0(4,14-33): error X3004: undeclared identifier 'WaveActiveBitXor'
+
diff --git a/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl.expected.glsl b/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl.expected.glsl
new file mode 100644
index 0000000..b320043
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl.expected.glsl
@@ -0,0 +1,21 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : u32;
+
+fn subgroupXor_7750d6() -> u32 {
+ var res : u32 = subgroupXor(1u);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_7750d6();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..f4950fc
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,16 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+uint subgroupXor_7750d6() {
+ uint res = WaveActiveBitXor(1u);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store(0u, subgroupXor_7750d6());
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, subgroupXor_7750d6());
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl.expected.ir.msl
new file mode 100644
index 0000000..38aa27c
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl.expected.ir.msl
@@ -0,0 +1,21 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device uint* prevent_dce;
+};
+
+uint subgroupXor_7750d6() {
+ uint res = simd_xor(1u);
+ return res;
+}
+
+fragment void fragment_main(device uint* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupXor_7750d6();
+}
+
+kernel void compute_main(device uint* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupXor_7750d6();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..b8bf9bb
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl.expected.ir.spvasm
@@ -0,0 +1,56 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 26
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupXor_7750d6 "subgroupXor_7750d6"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %uint = OpTypeInt 32 0
+%tint_symbol_1 = OpTypeStruct %uint
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %6 = OpTypeFunction %uint
+ %uint_3 = OpConstant %uint 3
+ %uint_1 = OpConstant %uint 1
+%_ptr_Function_uint = OpTypePointer Function %uint
+ %void = OpTypeVoid
+ %16 = OpTypeFunction %void
+%_ptr_StorageBuffer_uint = OpTypePointer StorageBuffer %uint
+ %uint_0 = OpConstant %uint 0
+%subgroupXor_7750d6 = OpFunction %uint None %6
+ %7 = OpLabel
+ %res = OpVariable %_ptr_Function_uint Function
+ %8 = OpGroupNonUniformBitwiseXor %uint %uint_3 Reduce %uint_1
+ OpStore %res %8
+ %13 = OpLoad %uint %res
+ OpReturnValue %13
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %16
+ %17 = OpLabel
+ %18 = OpFunctionCall %uint %subgroupXor_7750d6
+ %19 = OpAccessChain %_ptr_StorageBuffer_uint %1 %uint_0
+ OpStore %19 %18
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %16
+ %23 = OpLabel
+ %24 = OpFunctionCall %uint %subgroupXor_7750d6
+ %25 = OpAccessChain %_ptr_StorageBuffer_uint %1 %uint_0
+ OpStore %25 %24
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl.expected.msl b/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl.expected.msl
new file mode 100644
index 0000000..e291fdb
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl.expected.msl
@@ -0,0 +1,18 @@
+#include <metal_stdlib>
+
+using namespace metal;
+uint subgroupXor_7750d6() {
+ uint res = simd_xor(1u);
+ return res;
+}
+
+fragment void fragment_main(device uint* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupXor_7750d6();
+ return;
+}
+
+kernel void compute_main(device uint* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupXor_7750d6();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl.expected.spvasm b/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl.expected.spvasm
new file mode 100644
index 0000000..da22104
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl.expected.spvasm
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : u32;
+
+fn subgroupXor_7750d6() -> u32 {
+ var res : u32 = subgroupXor(1u);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_7750d6();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl.expected.wgsl b/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl.expected.wgsl
new file mode 100644
index 0000000..3b1c907a
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/7750d6.wgsl.expected.wgsl
@@ -0,0 +1,18 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : u32;
+
+fn subgroupXor_7750d6() -> u32 {
+ var res : u32 = subgroupXor(1u);
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupXor_7750d6();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_7750d6();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl b/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl
new file mode 100644
index 0000000..fa1ef2f
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl
@@ -0,0 +1,58 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<u32>;
+
+
+// fn subgroupXor(value: vec<2, u32>) -> vec<2, u32>
+fn subgroupXor_7f6672() -> vec2<u32>{
+ var res: vec2<u32> = subgroupXor(vec2<u32>(1u));
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupXor_7f6672();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_7f6672();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..9be1273
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl.expected.dxc.hlsl
@@ -0,0 +1,17 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint2 subgroupXor_7f6672() {
+ uint2 res = WaveActiveBitXor((1u).xx);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupXor_7f6672()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupXor_7f6672()));
+ return;
+}
diff --git a/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..209a110
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl.expected.fxc.hlsl
@@ -0,0 +1,17 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint2 subgroupXor_7f6672() {
+ uint2 res = WaveActiveBitXor((1u).xx);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupXor_7f6672()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001D2005F1400(4,15-39): error X3004: undeclared identifier 'WaveActiveBitXor'
+
diff --git a/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl.expected.glsl b/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl.expected.glsl
new file mode 100644
index 0000000..769a159
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl.expected.glsl
@@ -0,0 +1,21 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<u32>;
+
+fn subgroupXor_7f6672() -> vec2<u32> {
+ var res : vec2<u32> = subgroupXor(vec2<u32>(1u));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_7f6672();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..ec96b01
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,16 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+uint2 subgroupXor_7f6672() {
+ uint2 res = WaveActiveBitXor((1u).xx);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store2(0u, subgroupXor_7f6672());
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, subgroupXor_7f6672());
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl.expected.ir.msl
new file mode 100644
index 0000000..4d00573
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl.expected.ir.msl
@@ -0,0 +1,21 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device uint2* prevent_dce;
+};
+
+uint2 subgroupXor_7f6672() {
+ uint2 res = simd_xor(uint2(1u));
+ return res;
+}
+
+fragment void fragment_main(device uint2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupXor_7f6672();
+}
+
+kernel void compute_main(device uint2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupXor_7f6672();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..6a5ebc7
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl.expected.ir.spvasm
@@ -0,0 +1,58 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 28
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupXor_7f6672 "subgroupXor_7f6672"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %uint = OpTypeInt 32 0
+ %v2uint = OpTypeVector %uint 2
+%tint_symbol_1 = OpTypeStruct %v2uint
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v2uint
+ %uint_3 = OpConstant %uint 3
+ %uint_1 = OpConstant %uint 1
+ %11 = OpConstantComposite %v2uint %uint_1 %uint_1
+%_ptr_Function_v2uint = OpTypePointer Function %v2uint
+ %void = OpTypeVoid
+ %18 = OpTypeFunction %void
+%_ptr_StorageBuffer_v2uint = OpTypePointer StorageBuffer %v2uint
+ %uint_0 = OpConstant %uint 0
+%subgroupXor_7f6672 = OpFunction %v2uint None %7
+ %8 = OpLabel
+ %res = OpVariable %_ptr_Function_v2uint Function
+ %9 = OpGroupNonUniformBitwiseXor %v2uint %uint_3 Reduce %11
+ OpStore %res %9
+ %15 = OpLoad %v2uint %res
+ OpReturnValue %15
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %18
+ %19 = OpLabel
+ %20 = OpFunctionCall %v2uint %subgroupXor_7f6672
+ %21 = OpAccessChain %_ptr_StorageBuffer_v2uint %1 %uint_0
+ OpStore %21 %20
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %18
+ %25 = OpLabel
+ %26 = OpFunctionCall %v2uint %subgroupXor_7f6672
+ %27 = OpAccessChain %_ptr_StorageBuffer_v2uint %1 %uint_0
+ OpStore %27 %26
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl.expected.msl b/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl.expected.msl
new file mode 100644
index 0000000..bfe82aa
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl.expected.msl
@@ -0,0 +1,18 @@
+#include <metal_stdlib>
+
+using namespace metal;
+uint2 subgroupXor_7f6672() {
+ uint2 res = simd_xor(uint2(1u));
+ return res;
+}
+
+fragment void fragment_main(device uint2* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupXor_7f6672();
+ return;
+}
+
+kernel void compute_main(device uint2* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupXor_7f6672();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl.expected.spvasm b/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl.expected.spvasm
new file mode 100644
index 0000000..148907c
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl.expected.spvasm
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<u32>;
+
+fn subgroupXor_7f6672() -> vec2<u32> {
+ var res : vec2<u32> = subgroupXor(vec2<u32>(1u));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_7f6672();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl.expected.wgsl b/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl.expected.wgsl
new file mode 100644
index 0000000..7f5787d
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/7f6672.wgsl.expected.wgsl
@@ -0,0 +1,18 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<u32>;
+
+fn subgroupXor_7f6672() -> vec2<u32> {
+ var res : vec2<u32> = subgroupXor(vec2<u32>(1u));
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupXor_7f6672();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_7f6672();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl b/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl
new file mode 100644
index 0000000..23da774
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl
@@ -0,0 +1,58 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<i32>;
+
+
+// fn subgroupXor(value: vec<4, i32>) -> vec<4, i32>
+fn subgroupXor_83b1f3() -> vec4<i32>{
+ var res: vec4<i32> = subgroupXor(vec4<i32>(1i));
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupXor_83b1f3();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_83b1f3();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..4c7fc47
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl.expected.dxc.hlsl
@@ -0,0 +1,18 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int4 subgroupXor_83b1f3() {
+ int4 tint_tmp = (1).xxxx;
+ int4 res = asint(WaveActiveBitXor(asuint(tint_tmp)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupXor_83b1f3()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupXor_83b1f3()));
+ return;
+}
diff --git a/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..30c49f9
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl.expected.fxc.hlsl
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int4 subgroupXor_83b1f3() {
+ int4 tint_tmp = (1).xxxx;
+ int4 res = asint(WaveActiveBitXor(asuint(tint_tmp)));
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupXor_83b1f3()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001562F474130(5,20-53): error X3004: undeclared identifier 'WaveActiveBitXor'
+
diff --git a/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl.expected.glsl b/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl.expected.glsl
new file mode 100644
index 0000000..95734ab
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl.expected.glsl
@@ -0,0 +1,21 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<i32>;
+
+fn subgroupXor_83b1f3() -> vec4<i32> {
+ var res : vec4<i32> = subgroupXor(vec4<i32>(1i));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_83b1f3();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..778f7b0
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,17 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+int4 subgroupXor_83b1f3() {
+ int4 arg = (1).xxxx;
+ int4 res = asint(WaveActiveBitXor(asuint(arg)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupXor_83b1f3()));
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupXor_83b1f3()));
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl.expected.ir.msl
new file mode 100644
index 0000000..9ed3cd6
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl.expected.ir.msl
@@ -0,0 +1,21 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device int4* prevent_dce;
+};
+
+int4 subgroupXor_83b1f3() {
+ int4 res = simd_xor(int4(1));
+ return res;
+}
+
+fragment void fragment_main(device int4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupXor_83b1f3();
+}
+
+kernel void compute_main(device int4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupXor_83b1f3();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..dae5ee8
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl.expected.ir.spvasm
@@ -0,0 +1,59 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 29
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupXor_83b1f3 "subgroupXor_83b1f3"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %int = OpTypeInt 32 1
+ %v4int = OpTypeVector %int 4
+%tint_symbol_1 = OpTypeStruct %v4int
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v4int
+ %uint = OpTypeInt 32 0
+ %uint_3 = OpConstant %uint 3
+ %int_1 = OpConstant %int 1
+ %12 = OpConstantComposite %v4int %int_1 %int_1 %int_1 %int_1
+%_ptr_Function_v4int = OpTypePointer Function %v4int
+ %void = OpTypeVoid
+ %19 = OpTypeFunction %void
+%_ptr_StorageBuffer_v4int = OpTypePointer StorageBuffer %v4int
+ %uint_0 = OpConstant %uint 0
+%subgroupXor_83b1f3 = OpFunction %v4int None %7
+ %8 = OpLabel
+ %res = OpVariable %_ptr_Function_v4int Function
+ %9 = OpGroupNonUniformBitwiseXor %v4int %uint_3 Reduce %12
+ OpStore %res %9
+ %16 = OpLoad %v4int %res
+ OpReturnValue %16
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %19
+ %20 = OpLabel
+ %21 = OpFunctionCall %v4int %subgroupXor_83b1f3
+ %22 = OpAccessChain %_ptr_StorageBuffer_v4int %1 %uint_0
+ OpStore %22 %21
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %19
+ %26 = OpLabel
+ %27 = OpFunctionCall %v4int %subgroupXor_83b1f3
+ %28 = OpAccessChain %_ptr_StorageBuffer_v4int %1 %uint_0
+ OpStore %28 %27
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl.expected.msl b/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl.expected.msl
new file mode 100644
index 0000000..8c463c7
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl.expected.msl
@@ -0,0 +1,18 @@
+#include <metal_stdlib>
+
+using namespace metal;
+int4 subgroupXor_83b1f3() {
+ int4 res = simd_xor(int4(1));
+ return res;
+}
+
+fragment void fragment_main(device int4* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupXor_83b1f3();
+ return;
+}
+
+kernel void compute_main(device int4* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupXor_83b1f3();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl.expected.spvasm b/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl.expected.spvasm
new file mode 100644
index 0000000..7fef857
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl.expected.spvasm
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<i32>;
+
+fn subgroupXor_83b1f3() -> vec4<i32> {
+ var res : vec4<i32> = subgroupXor(vec4<i32>(1i));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_83b1f3();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl.expected.wgsl b/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl.expected.wgsl
new file mode 100644
index 0000000..1918966
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/83b1f3.wgsl.expected.wgsl
@@ -0,0 +1,18 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<i32>;
+
+fn subgroupXor_83b1f3() -> vec4<i32> {
+ var res : vec4<i32> = subgroupXor(vec4<i32>(1i));
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupXor_83b1f3();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_83b1f3();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl b/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl
new file mode 100644
index 0000000..a5dc431
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl
@@ -0,0 +1,58 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<i32>;
+
+
+// fn subgroupXor(value: vec<3, i32>) -> vec<3, i32>
+fn subgroupXor_9c6e73() -> vec3<i32>{
+ var res: vec3<i32> = subgroupXor(vec3<i32>(1i));
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupXor_9c6e73();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_9c6e73();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..e3104d3
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl.expected.dxc.hlsl
@@ -0,0 +1,18 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int3 subgroupXor_9c6e73() {
+ int3 tint_tmp = (1).xxx;
+ int3 res = asint(WaveActiveBitXor(asuint(tint_tmp)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupXor_9c6e73()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupXor_9c6e73()));
+ return;
+}
diff --git a/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..0d9f24d
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl.expected.fxc.hlsl
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int3 subgroupXor_9c6e73() {
+ int3 tint_tmp = (1).xxx;
+ int3 res = asint(WaveActiveBitXor(asuint(tint_tmp)));
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupXor_9c6e73()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001B02A250E00(5,20-53): error X3004: undeclared identifier 'WaveActiveBitXor'
+
diff --git a/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl.expected.glsl b/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl.expected.glsl
new file mode 100644
index 0000000..e153160
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl.expected.glsl
@@ -0,0 +1,21 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<i32>;
+
+fn subgroupXor_9c6e73() -> vec3<i32> {
+ var res : vec3<i32> = subgroupXor(vec3<i32>(1i));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_9c6e73();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..d421ffa
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,17 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+int3 subgroupXor_9c6e73() {
+ int3 arg = (1).xxx;
+ int3 res = asint(WaveActiveBitXor(asuint(arg)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupXor_9c6e73()));
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupXor_9c6e73()));
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl.expected.ir.msl
new file mode 100644
index 0000000..183287c
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl.expected.ir.msl
@@ -0,0 +1,21 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device int3* prevent_dce;
+};
+
+int3 subgroupXor_9c6e73() {
+ int3 res = simd_xor(int3(1));
+ return res;
+}
+
+fragment void fragment_main(device int3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupXor_9c6e73();
+}
+
+kernel void compute_main(device int3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupXor_9c6e73();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..62cff51
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl.expected.ir.spvasm
@@ -0,0 +1,59 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 29
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupXor_9c6e73 "subgroupXor_9c6e73"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %int = OpTypeInt 32 1
+ %v3int = OpTypeVector %int 3
+%tint_symbol_1 = OpTypeStruct %v3int
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v3int
+ %uint = OpTypeInt 32 0
+ %uint_3 = OpConstant %uint 3
+ %int_1 = OpConstant %int 1
+ %12 = OpConstantComposite %v3int %int_1 %int_1 %int_1
+%_ptr_Function_v3int = OpTypePointer Function %v3int
+ %void = OpTypeVoid
+ %19 = OpTypeFunction %void
+%_ptr_StorageBuffer_v3int = OpTypePointer StorageBuffer %v3int
+ %uint_0 = OpConstant %uint 0
+%subgroupXor_9c6e73 = OpFunction %v3int None %7
+ %8 = OpLabel
+ %res = OpVariable %_ptr_Function_v3int Function
+ %9 = OpGroupNonUniformBitwiseXor %v3int %uint_3 Reduce %12
+ OpStore %res %9
+ %16 = OpLoad %v3int %res
+ OpReturnValue %16
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %19
+ %20 = OpLabel
+ %21 = OpFunctionCall %v3int %subgroupXor_9c6e73
+ %22 = OpAccessChain %_ptr_StorageBuffer_v3int %1 %uint_0
+ OpStore %22 %21
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %19
+ %26 = OpLabel
+ %27 = OpFunctionCall %v3int %subgroupXor_9c6e73
+ %28 = OpAccessChain %_ptr_StorageBuffer_v3int %1 %uint_0
+ OpStore %28 %27
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl.expected.msl b/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl.expected.msl
new file mode 100644
index 0000000..65c7f33
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl.expected.msl
@@ -0,0 +1,18 @@
+#include <metal_stdlib>
+
+using namespace metal;
+int3 subgroupXor_9c6e73() {
+ int3 res = simd_xor(int3(1));
+ return res;
+}
+
+fragment void fragment_main(device packed_int3* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = packed_int3(subgroupXor_9c6e73());
+ return;
+}
+
+kernel void compute_main(device packed_int3* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = packed_int3(subgroupXor_9c6e73());
+ return;
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl.expected.spvasm b/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl.expected.spvasm
new file mode 100644
index 0000000..ca8699d
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl.expected.spvasm
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<i32>;
+
+fn subgroupXor_9c6e73() -> vec3<i32> {
+ var res : vec3<i32> = subgroupXor(vec3<i32>(1i));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_9c6e73();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl.expected.wgsl b/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl.expected.wgsl
new file mode 100644
index 0000000..4a91638
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/9c6e73.wgsl.expected.wgsl
@@ -0,0 +1,18 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<i32>;
+
+fn subgroupXor_9c6e73() -> vec3<i32> {
+ var res : vec3<i32> = subgroupXor(vec3<i32>(1i));
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupXor_9c6e73();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_9c6e73();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl b/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl
new file mode 100644
index 0000000..6e3bfda
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl
@@ -0,0 +1,58 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<u32>;
+
+
+// fn subgroupXor(value: vec<4, u32>) -> vec<4, u32>
+fn subgroupXor_9d77e4() -> vec4<u32>{
+ var res: vec4<u32> = subgroupXor(vec4<u32>(1u));
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupXor_9d77e4();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_9d77e4();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..b7e23dc
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl.expected.dxc.hlsl
@@ -0,0 +1,17 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint4 subgroupXor_9d77e4() {
+ uint4 res = WaveActiveBitXor((1u).xxxx);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupXor_9d77e4()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupXor_9d77e4()));
+ return;
+}
diff --git a/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..6cc915a
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl.expected.fxc.hlsl
@@ -0,0 +1,17 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint4 subgroupXor_9d77e4() {
+ uint4 res = WaveActiveBitXor((1u).xxxx);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupXor_9d77e4()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001B889021E80(4,15-41): error X3004: undeclared identifier 'WaveActiveBitXor'
+
diff --git a/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl.expected.glsl b/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl.expected.glsl
new file mode 100644
index 0000000..107edee
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl.expected.glsl
@@ -0,0 +1,21 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<u32>;
+
+fn subgroupXor_9d77e4() -> vec4<u32> {
+ var res : vec4<u32> = subgroupXor(vec4<u32>(1u));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_9d77e4();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..c98629f
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,16 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+uint4 subgroupXor_9d77e4() {
+ uint4 res = WaveActiveBitXor((1u).xxxx);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store4(0u, subgroupXor_9d77e4());
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, subgroupXor_9d77e4());
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl.expected.ir.msl b/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl.expected.ir.msl
new file mode 100644
index 0000000..d34c3c4
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl.expected.ir.msl
@@ -0,0 +1,21 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device uint4* prevent_dce;
+};
+
+uint4 subgroupXor_9d77e4() {
+ uint4 res = simd_xor(uint4(1u));
+ return res;
+}
+
+fragment void fragment_main(device uint4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupXor_9d77e4();
+}
+
+kernel void compute_main(device uint4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupXor_9d77e4();
+}
diff --git a/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..06bf6c0
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl.expected.ir.spvasm
@@ -0,0 +1,58 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 28
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupXor_9d77e4 "subgroupXor_9d77e4"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %uint = OpTypeInt 32 0
+ %v4uint = OpTypeVector %uint 4
+%tint_symbol_1 = OpTypeStruct %v4uint
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v4uint
+ %uint_3 = OpConstant %uint 3
+ %uint_1 = OpConstant %uint 1
+ %11 = OpConstantComposite %v4uint %uint_1 %uint_1 %uint_1 %uint_1
+%_ptr_Function_v4uint = OpTypePointer Function %v4uint
+ %void = OpTypeVoid
+ %18 = OpTypeFunction %void
+%_ptr_StorageBuffer_v4uint = OpTypePointer StorageBuffer %v4uint
+ %uint_0 = OpConstant %uint 0
+%subgroupXor_9d77e4 = OpFunction %v4uint None %7
+ %8 = OpLabel
+ %res = OpVariable %_ptr_Function_v4uint Function
+ %9 = OpGroupNonUniformBitwiseXor %v4uint %uint_3 Reduce %11
+ OpStore %res %9
+ %15 = OpLoad %v4uint %res
+ OpReturnValue %15
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %18
+ %19 = OpLabel
+ %20 = OpFunctionCall %v4uint %subgroupXor_9d77e4
+ %21 = OpAccessChain %_ptr_StorageBuffer_v4uint %1 %uint_0
+ OpStore %21 %20
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %18
+ %25 = OpLabel
+ %26 = OpFunctionCall %v4uint %subgroupXor_9d77e4
+ %27 = OpAccessChain %_ptr_StorageBuffer_v4uint %1 %uint_0
+ OpStore %27 %26
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl.expected.msl b/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl.expected.msl
new file mode 100644
index 0000000..456b971
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl.expected.msl
@@ -0,0 +1,18 @@
+#include <metal_stdlib>
+
+using namespace metal;
+uint4 subgroupXor_9d77e4() {
+ uint4 res = simd_xor(uint4(1u));
+ return res;
+}
+
+fragment void fragment_main(device uint4* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupXor_9d77e4();
+ return;
+}
+
+kernel void compute_main(device uint4* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupXor_9d77e4();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl.expected.spvasm b/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl.expected.spvasm
new file mode 100644
index 0000000..3ea792d
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl.expected.spvasm
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<u32>;
+
+fn subgroupXor_9d77e4() -> vec4<u32> {
+ var res : vec4<u32> = subgroupXor(vec4<u32>(1u));
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_9d77e4();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl.expected.wgsl b/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl.expected.wgsl
new file mode 100644
index 0000000..d000de2
--- /dev/null
+++ b/test/tint/builtins/gen/literal/subgroupXor/9d77e4.wgsl.expected.wgsl
@@ -0,0 +1,18 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<u32>;
+
+fn subgroupXor_9d77e4() -> vec4<u32> {
+ var res : vec4<u32> = subgroupXor(vec4<u32>(1u));
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupXor_9d77e4();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_9d77e4();
+}
diff --git a/test/tint/builtins/gen/var/subgroupAdd/0dd12a.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/0dd12a.wgsl.expected.fxc.hlsl
index b77eca1..6526b51 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/0dd12a.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupAdd/0dd12a.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store<vector<float16_t, 3> >(0u, subgroupAdd_0dd12a());
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000016724106660(3,8-16): error X3000: syntax error: unexpected token 'float16_t'
+
diff --git a/test/tint/builtins/gen/var/subgroupAdd/0dd12a.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/0dd12a.wgsl.expected.ir.dxc.hlsl
index 13b6848..985b39c 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/0dd12a.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupAdd/0dd12a.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<vector<float16_t, 3> >(0u, subgroupAdd_0dd12a());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<vector<float16_t, 3> >(0u, subgroupAdd_0dd12a());
diff --git a/test/tint/builtins/gen/var/subgroupAdd/0dd12a.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupAdd/0dd12a.wgsl.expected.ir.msl
index 4271282..c9e7940 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/0dd12a.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupAdd/0dd12a.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device half3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAdd_0dd12a();
+}
+
kernel void compute_main(device half3* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupAdd_0dd12a();
diff --git a/test/tint/builtins/gen/var/subgroupAdd/1280c8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/1280c8.wgsl.expected.fxc.hlsl
index 2fa582a..04c19e1 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/1280c8.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupAdd/1280c8.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store2(0u, asuint(subgroupAdd_1280c8()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000002CC18BBFCC0(5,15-34): error X3004: undeclared identifier 'WaveActiveSum'
+
diff --git a/test/tint/builtins/gen/var/subgroupAdd/1280c8.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/1280c8.wgsl.expected.ir.dxc.hlsl
index 817f839..e3424e7 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/1280c8.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupAdd/1280c8.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store2(0u, subgroupAdd_1280c8());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store2(0u, subgroupAdd_1280c8());
diff --git a/test/tint/builtins/gen/var/subgroupAdd/1280c8.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupAdd/1280c8.wgsl.expected.ir.msl
index 11e0e47..c8db9c4 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/1280c8.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupAdd/1280c8.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device uint2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAdd_1280c8();
+}
+
kernel void compute_main(device uint2* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupAdd_1280c8();
diff --git a/test/tint/builtins/gen/var/subgroupAdd/1eb429.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/1eb429.wgsl.expected.fxc.hlsl
index a71e443..2f3bfca 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/1eb429.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupAdd/1eb429.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store2(0u, asuint(subgroupAdd_1eb429()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000228FD2163D0(5,14-33): error X3004: undeclared identifier 'WaveActiveSum'
+
diff --git a/test/tint/builtins/gen/var/subgroupAdd/1eb429.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/1eb429.wgsl.expected.ir.dxc.hlsl
index ea01da3..d86da54 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/1eb429.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupAdd/1eb429.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupAdd_1eb429()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store2(0u, asuint(subgroupAdd_1eb429()));
diff --git a/test/tint/builtins/gen/var/subgroupAdd/1eb429.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupAdd/1eb429.wgsl.expected.ir.msl
index 98f4590..a0cd6c4 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/1eb429.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupAdd/1eb429.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device int2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAdd_1eb429();
+}
+
kernel void compute_main(device int2* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupAdd_1eb429();
diff --git a/test/tint/builtins/gen/var/subgroupAdd/225207.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/225207.wgsl.expected.fxc.hlsl
index 1d5cf1d..ab34301 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/225207.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupAdd/225207.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store<float16_t>(0u, subgroupAdd_225207());
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000026C96842240(3,1-9): error X3000: unrecognized identifier 'float16_t'
+
diff --git a/test/tint/builtins/gen/var/subgroupAdd/225207.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/225207.wgsl.expected.ir.dxc.hlsl
index f385ebd..715dfe5 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/225207.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupAdd/225207.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<float16_t>(0u, subgroupAdd_225207());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<float16_t>(0u, subgroupAdd_225207());
diff --git a/test/tint/builtins/gen/var/subgroupAdd/225207.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupAdd/225207.wgsl.expected.ir.msl
index d99ff30..02a6b19 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/225207.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupAdd/225207.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device half* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAdd_225207();
+}
+
kernel void compute_main(device half* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupAdd_225207();
diff --git a/test/tint/builtins/gen/var/subgroupAdd/22d041.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/22d041.wgsl.expected.fxc.hlsl
index d9abb91..d60d8d3 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/22d041.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupAdd/22d041.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store3(0u, asuint(subgroupAdd_22d041()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000281DEC92CF0(5,14-33): error X3004: undeclared identifier 'WaveActiveSum'
+
diff --git a/test/tint/builtins/gen/var/subgroupAdd/22d041.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/22d041.wgsl.expected.ir.dxc.hlsl
index 50a0929..d70eec3 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/22d041.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupAdd/22d041.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupAdd_22d041()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store3(0u, asuint(subgroupAdd_22d041()));
diff --git a/test/tint/builtins/gen/var/subgroupAdd/22d041.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupAdd/22d041.wgsl.expected.ir.msl
index d5374c0..1d78e1f 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/22d041.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupAdd/22d041.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device int3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAdd_22d041();
+}
+
kernel void compute_main(device int3* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupAdd_22d041();
diff --git a/test/tint/builtins/gen/var/subgroupAdd/28db2c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/28db2c.wgsl.expected.fxc.hlsl
index 45e3972..af14f6c 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/28db2c.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupAdd/28db2c.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store4(0u, asuint(subgroupAdd_28db2c()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000019DD2C63750(5,14-33): error X3004: undeclared identifier 'WaveActiveSum'
+
diff --git a/test/tint/builtins/gen/var/subgroupAdd/28db2c.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/28db2c.wgsl.expected.ir.dxc.hlsl
index 08e9a70..d13d3d9 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/28db2c.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupAdd/28db2c.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupAdd_28db2c()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store4(0u, asuint(subgroupAdd_28db2c()));
diff --git a/test/tint/builtins/gen/var/subgroupAdd/28db2c.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupAdd/28db2c.wgsl.expected.ir.msl
index 948e5a0..398da3e 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/28db2c.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupAdd/28db2c.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device int4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAdd_28db2c();
+}
+
kernel void compute_main(device int4* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupAdd_28db2c();
diff --git a/test/tint/builtins/gen/var/subgroupAdd/2ab40a.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/2ab40a.wgsl.expected.fxc.hlsl
index 1294512..d12f885 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/2ab40a.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupAdd/2ab40a.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store<vector<float16_t, 4> >(0u, subgroupAdd_2ab40a());
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001AF7F43CA40(3,8-16): error X3000: syntax error: unexpected token 'float16_t'
+
diff --git a/test/tint/builtins/gen/var/subgroupAdd/2ab40a.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/2ab40a.wgsl.expected.ir.dxc.hlsl
index 5cb4b59..8aeca61 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/2ab40a.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupAdd/2ab40a.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<vector<float16_t, 4> >(0u, subgroupAdd_2ab40a());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<vector<float16_t, 4> >(0u, subgroupAdd_2ab40a());
diff --git a/test/tint/builtins/gen/var/subgroupAdd/2ab40a.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupAdd/2ab40a.wgsl.expected.ir.msl
index fa53f0d..5293acc 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/2ab40a.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupAdd/2ab40a.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device half4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAdd_2ab40a();
+}
+
kernel void compute_main(device half4* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupAdd_2ab40a();
diff --git a/test/tint/builtins/gen/var/subgroupAdd/3854ae.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/3854ae.wgsl.expected.fxc.hlsl
index b7ab92f..5d3f336 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/3854ae.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupAdd/3854ae.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store(0u, asuint(subgroupAdd_3854ae()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000023728F093C0(5,15-34): error X3004: undeclared identifier 'WaveActiveSum'
+
diff --git a/test/tint/builtins/gen/var/subgroupAdd/3854ae.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/3854ae.wgsl.expected.ir.dxc.hlsl
index 90a7117..65dc7bf 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/3854ae.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupAdd/3854ae.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupAdd_3854ae()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store(0u, asuint(subgroupAdd_3854ae()));
diff --git a/test/tint/builtins/gen/var/subgroupAdd/3854ae.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupAdd/3854ae.wgsl.expected.ir.msl
index ff5d336..c7e6977 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/3854ae.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupAdd/3854ae.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device float* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAdd_3854ae();
+}
+
kernel void compute_main(device float* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupAdd_3854ae();
diff --git a/test/tint/builtins/gen/var/subgroupAdd/6587ff.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/6587ff.wgsl.expected.fxc.hlsl
index 501c1f2..c74ace4 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/6587ff.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupAdd/6587ff.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store3(0u, asuint(subgroupAdd_6587ff()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001AB9FDFEBE0(5,15-34): error X3004: undeclared identifier 'WaveActiveSum'
+
diff --git a/test/tint/builtins/gen/var/subgroupAdd/6587ff.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/6587ff.wgsl.expected.ir.dxc.hlsl
index 83f0652..7b0fc31 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/6587ff.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupAdd/6587ff.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store3(0u, subgroupAdd_6587ff());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store3(0u, subgroupAdd_6587ff());
diff --git a/test/tint/builtins/gen/var/subgroupAdd/6587ff.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupAdd/6587ff.wgsl.expected.ir.msl
index dfbb76d..008e6fc 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/6587ff.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupAdd/6587ff.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device uint3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAdd_6587ff();
+}
+
kernel void compute_main(device uint3* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupAdd_6587ff();
diff --git a/test/tint/builtins/gen/var/subgroupAdd/7d1215.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/7d1215.wgsl.expected.fxc.hlsl
index 90ae534..2efd9d1 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/7d1215.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupAdd/7d1215.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store3(0u, asuint(subgroupAdd_7d1215()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000022CB470F2E0(5,16-35): error X3004: undeclared identifier 'WaveActiveSum'
+
diff --git a/test/tint/builtins/gen/var/subgroupAdd/7d1215.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/7d1215.wgsl.expected.ir.dxc.hlsl
index dad80ff..fd04891 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/7d1215.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupAdd/7d1215.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupAdd_7d1215()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store3(0u, asuint(subgroupAdd_7d1215()));
diff --git a/test/tint/builtins/gen/var/subgroupAdd/7d1215.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupAdd/7d1215.wgsl.expected.ir.msl
index 7355d22..08506b1 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/7d1215.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupAdd/7d1215.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device float3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAdd_7d1215();
+}
+
kernel void compute_main(device float3* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupAdd_7d1215();
diff --git a/test/tint/builtins/gen/var/subgroupAdd/8f4c15.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/8f4c15.wgsl.expected.fxc.hlsl
index 988e73c..cb24be4 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/8f4c15.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupAdd/8f4c15.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store4(0u, asuint(subgroupAdd_8f4c15()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000024228742450(5,16-35): error X3004: undeclared identifier 'WaveActiveSum'
+
diff --git a/test/tint/builtins/gen/var/subgroupAdd/8f4c15.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/8f4c15.wgsl.expected.ir.dxc.hlsl
index 19e2c2e..a05d794 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/8f4c15.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupAdd/8f4c15.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupAdd_8f4c15()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store4(0u, asuint(subgroupAdd_8f4c15()));
diff --git a/test/tint/builtins/gen/var/subgroupAdd/8f4c15.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupAdd/8f4c15.wgsl.expected.ir.msl
index ce4100f..ea69b03 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/8f4c15.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupAdd/8f4c15.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device float4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAdd_8f4c15();
+}
+
kernel void compute_main(device float4* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupAdd_8f4c15();
diff --git a/test/tint/builtins/gen/var/subgroupAdd/b61df7.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/b61df7.wgsl.expected.fxc.hlsl
index 511a7274b..4882e88 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/b61df7.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupAdd/b61df7.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store(0u, asuint(subgroupAdd_b61df7()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001AD75DCE340(5,14-33): error X3004: undeclared identifier 'WaveActiveSum'
+
diff --git a/test/tint/builtins/gen/var/subgroupAdd/b61df7.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/b61df7.wgsl.expected.ir.dxc.hlsl
index 573cd23..4d71eed 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/b61df7.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupAdd/b61df7.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store(0u, subgroupAdd_b61df7());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store(0u, subgroupAdd_b61df7());
diff --git a/test/tint/builtins/gen/var/subgroupAdd/b61df7.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupAdd/b61df7.wgsl.expected.ir.msl
index 53e7014..f9c8488 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/b61df7.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupAdd/b61df7.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device uint* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAdd_b61df7();
+}
+
kernel void compute_main(device uint* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupAdd_b61df7();
diff --git a/test/tint/builtins/gen/var/subgroupAdd/ba53f9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/ba53f9.wgsl.expected.fxc.hlsl
index 236b886..44bb6f4 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/ba53f9.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupAdd/ba53f9.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store(0u, asuint(subgroupAdd_ba53f9()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001DAD6877D80(5,13-32): error X3004: undeclared identifier 'WaveActiveSum'
+
diff --git a/test/tint/builtins/gen/var/subgroupAdd/ba53f9.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/ba53f9.wgsl.expected.ir.dxc.hlsl
index ed359ab..14c9944 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/ba53f9.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupAdd/ba53f9.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupAdd_ba53f9()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store(0u, asuint(subgroupAdd_ba53f9()));
diff --git a/test/tint/builtins/gen/var/subgroupAdd/ba53f9.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupAdd/ba53f9.wgsl.expected.ir.msl
index fe287af..cf32f18 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/ba53f9.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupAdd/ba53f9.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device int* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAdd_ba53f9();
+}
+
kernel void compute_main(device int* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupAdd_ba53f9();
diff --git a/test/tint/builtins/gen/var/subgroupAdd/cae1ed.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/cae1ed.wgsl.expected.fxc.hlsl
index 9fc516d..cd6ebb7 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/cae1ed.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupAdd/cae1ed.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store<vector<float16_t, 2> >(0u, subgroupAdd_cae1ed());
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000029DB8637E60(3,8-16): error X3000: syntax error: unexpected token 'float16_t'
+
diff --git a/test/tint/builtins/gen/var/subgroupAdd/cae1ed.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/cae1ed.wgsl.expected.ir.dxc.hlsl
index 00010f4..c20f467 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/cae1ed.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupAdd/cae1ed.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<vector<float16_t, 2> >(0u, subgroupAdd_cae1ed());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<vector<float16_t, 2> >(0u, subgroupAdd_cae1ed());
diff --git a/test/tint/builtins/gen/var/subgroupAdd/cae1ed.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupAdd/cae1ed.wgsl.expected.ir.msl
index 499801a..86be56c 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/cae1ed.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupAdd/cae1ed.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device half2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAdd_cae1ed();
+}
+
kernel void compute_main(device half2* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupAdd_cae1ed();
diff --git a/test/tint/builtins/gen/var/subgroupAdd/dcf73f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/dcf73f.wgsl.expected.fxc.hlsl
index 66d1964..54e780b 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/dcf73f.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupAdd/dcf73f.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store2(0u, asuint(subgroupAdd_dcf73f()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000018791DB7DD0(5,16-35): error X3004: undeclared identifier 'WaveActiveSum'
+
diff --git a/test/tint/builtins/gen/var/subgroupAdd/dcf73f.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/dcf73f.wgsl.expected.ir.dxc.hlsl
index 20cd198..cb59d4a 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/dcf73f.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupAdd/dcf73f.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupAdd_dcf73f()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store2(0u, asuint(subgroupAdd_dcf73f()));
diff --git a/test/tint/builtins/gen/var/subgroupAdd/dcf73f.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupAdd/dcf73f.wgsl.expected.ir.msl
index 93e7f0f..b68c8a7 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/dcf73f.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupAdd/dcf73f.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device float2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAdd_dcf73f();
+}
+
kernel void compute_main(device float2* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupAdd_dcf73f();
diff --git a/test/tint/builtins/gen/var/subgroupAdd/fbc357.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/fbc357.wgsl.expected.fxc.hlsl
index a662594..4835cbe 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/fbc357.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupAdd/fbc357.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store4(0u, asuint(subgroupAdd_fbc357()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000028641012BE0(5,15-34): error X3004: undeclared identifier 'WaveActiveSum'
+
diff --git a/test/tint/builtins/gen/var/subgroupAdd/fbc357.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupAdd/fbc357.wgsl.expected.ir.dxc.hlsl
index 2dd32b6..20a127b 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/fbc357.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupAdd/fbc357.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store4(0u, subgroupAdd_fbc357());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store4(0u, subgroupAdd_fbc357());
diff --git a/test/tint/builtins/gen/var/subgroupAdd/fbc357.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupAdd/fbc357.wgsl.expected.ir.msl
index 38f63a3..a791748 100644
--- a/test/tint/builtins/gen/var/subgroupAdd/fbc357.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupAdd/fbc357.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device uint4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAdd_fbc357();
+}
+
kernel void compute_main(device uint4* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupAdd_fbc357();
diff --git a/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl b/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl
new file mode 100644
index 0000000..dfdd927
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl
@@ -0,0 +1,59 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<i32>;
+
+
+// fn subgroupAnd(value: vec<3, i32>) -> vec<3, i32>
+fn subgroupAnd_1877b3() -> vec3<i32>{
+ var arg_0 = vec3<i32>(1i);
+ var res: vec3<i32> = subgroupAnd(arg_0);
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupAnd_1877b3();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_1877b3();
+}
diff --git a/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..e366cc9
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl.expected.dxc.hlsl
@@ -0,0 +1,18 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int3 subgroupAnd_1877b3() {
+ int3 arg_0 = (1).xxx;
+ int3 res = asint(WaveActiveBitAnd(asuint(arg_0)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupAnd_1877b3()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupAnd_1877b3()));
+ return;
+}
diff --git a/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..38424dc
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl.expected.fxc.hlsl
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int3 subgroupAnd_1877b3() {
+ int3 arg_0 = (1).xxx;
+ int3 res = asint(WaveActiveBitAnd(asuint(arg_0)));
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupAnd_1877b3()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000002D167C11700(5,20-50): error X3004: undeclared identifier 'WaveActiveBitAnd'
+
diff --git a/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl.expected.glsl b/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl.expected.glsl
new file mode 100644
index 0000000..ffa9999
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl.expected.glsl
@@ -0,0 +1,22 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<i32>;
+
+fn subgroupAnd_1877b3() -> vec3<i32> {
+ var arg_0 = vec3<i32>(1i);
+ var res : vec3<i32> = subgroupAnd(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_1877b3();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..6f2eb87
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,17 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+int3 subgroupAnd_1877b3() {
+ int3 arg_0 = (1).xxx;
+ int3 res = asint(WaveActiveBitAnd(asuint(arg_0)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupAnd_1877b3()));
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupAnd_1877b3()));
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl.expected.ir.msl
new file mode 100644
index 0000000..e22f9b5
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl.expected.ir.msl
@@ -0,0 +1,22 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device int3* prevent_dce;
+};
+
+int3 subgroupAnd_1877b3() {
+ int3 arg_0 = int3(1);
+ int3 res = simd_and(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device int3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAnd_1877b3();
+}
+
+kernel void compute_main(device int3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAnd_1877b3();
+}
diff --git a/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..188e310
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl.expected.ir.spvasm
@@ -0,0 +1,63 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 31
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupAnd_1877b3 "subgroupAnd_1877b3"
+ OpName %arg_0 "arg_0"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %int = OpTypeInt 32 1
+ %v3int = OpTypeVector %int 3
+%tint_symbol_1 = OpTypeStruct %v3int
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v3int
+%_ptr_Function_v3int = OpTypePointer Function %v3int
+ %int_1 = OpConstant %int 1
+ %11 = OpConstantComposite %v3int %int_1 %int_1 %int_1
+ %uint = OpTypeInt 32 0
+ %uint_3 = OpConstant %uint 3
+ %void = OpTypeVoid
+ %21 = OpTypeFunction %void
+%_ptr_StorageBuffer_v3int = OpTypePointer StorageBuffer %v3int
+ %uint_0 = OpConstant %uint 0
+%subgroupAnd_1877b3 = OpFunction %v3int None %7
+ %8 = OpLabel
+ %arg_0 = OpVariable %_ptr_Function_v3int Function
+ %res = OpVariable %_ptr_Function_v3int Function
+ OpStore %arg_0 %11
+ %13 = OpLoad %v3int %arg_0
+ %14 = OpGroupNonUniformBitwiseAnd %v3int %uint_3 Reduce %13
+ OpStore %res %14
+ %18 = OpLoad %v3int %res
+ OpReturnValue %18
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %21
+ %22 = OpLabel
+ %23 = OpFunctionCall %v3int %subgroupAnd_1877b3
+ %24 = OpAccessChain %_ptr_StorageBuffer_v3int %1 %uint_0
+ OpStore %24 %23
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %21
+ %28 = OpLabel
+ %29 = OpFunctionCall %v3int %subgroupAnd_1877b3
+ %30 = OpAccessChain %_ptr_StorageBuffer_v3int %1 %uint_0
+ OpStore %30 %29
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl.expected.msl b/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl.expected.msl
new file mode 100644
index 0000000..4a23bc0
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl.expected.msl
@@ -0,0 +1,19 @@
+#include <metal_stdlib>
+
+using namespace metal;
+int3 subgroupAnd_1877b3() {
+ int3 arg_0 = int3(1);
+ int3 res = simd_and(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device packed_int3* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = packed_int3(subgroupAnd_1877b3());
+ return;
+}
+
+kernel void compute_main(device packed_int3* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = packed_int3(subgroupAnd_1877b3());
+ return;
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl.expected.spvasm b/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl.expected.spvasm
new file mode 100644
index 0000000..f8839b1
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl.expected.spvasm
@@ -0,0 +1,19 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<i32>;
+
+fn subgroupAnd_1877b3() -> vec3<i32> {
+ var arg_0 = vec3<i32>(1i);
+ var res : vec3<i32> = subgroupAnd(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_1877b3();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl.expected.wgsl b/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl.expected.wgsl
new file mode 100644
index 0000000..de30b73
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/1877b3.wgsl.expected.wgsl
@@ -0,0 +1,19 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<i32>;
+
+fn subgroupAnd_1877b3() -> vec3<i32> {
+ var arg_0 = vec3<i32>(1i);
+ var res : vec3<i32> = subgroupAnd(arg_0);
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupAnd_1877b3();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_1877b3();
+}
diff --git a/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl b/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl
new file mode 100644
index 0000000..e0e42ad
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl
@@ -0,0 +1,59 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<u32>;
+
+
+// fn subgroupAnd(value: vec<2, u32>) -> vec<2, u32>
+fn subgroupAnd_376802() -> vec2<u32>{
+ var arg_0 = vec2<u32>(1u);
+ var res: vec2<u32> = subgroupAnd(arg_0);
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupAnd_376802();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_376802();
+}
diff --git a/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..337b583
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl.expected.dxc.hlsl
@@ -0,0 +1,18 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint2 subgroupAnd_376802() {
+ uint2 arg_0 = (1u).xx;
+ uint2 res = WaveActiveBitAnd(arg_0);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupAnd_376802()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupAnd_376802()));
+ return;
+}
diff --git a/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..4614ed6
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl.expected.fxc.hlsl
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint2 subgroupAnd_376802() {
+ uint2 arg_0 = (1u).xx;
+ uint2 res = WaveActiveBitAnd(arg_0);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupAnd_376802()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000002C13E4828F0(5,15-37): error X3004: undeclared identifier 'WaveActiveBitAnd'
+
diff --git a/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl.expected.glsl b/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl.expected.glsl
new file mode 100644
index 0000000..dd05f02
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl.expected.glsl
@@ -0,0 +1,22 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<u32>;
+
+fn subgroupAnd_376802() -> vec2<u32> {
+ var arg_0 = vec2<u32>(1u);
+ var res : vec2<u32> = subgroupAnd(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_376802();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..deaa0cc
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,17 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+uint2 subgroupAnd_376802() {
+ uint2 arg_0 = (1u).xx;
+ uint2 res = WaveActiveBitAnd(arg_0);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store2(0u, subgroupAnd_376802());
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, subgroupAnd_376802());
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl.expected.ir.msl
new file mode 100644
index 0000000..e3bd1c4
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl.expected.ir.msl
@@ -0,0 +1,22 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device uint2* prevent_dce;
+};
+
+uint2 subgroupAnd_376802() {
+ uint2 arg_0 = uint2(1u);
+ uint2 res = simd_and(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device uint2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAnd_376802();
+}
+
+kernel void compute_main(device uint2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAnd_376802();
+}
diff --git a/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..6c45652
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl.expected.ir.spvasm
@@ -0,0 +1,62 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 30
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupAnd_376802 "subgroupAnd_376802"
+ OpName %arg_0 "arg_0"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %uint = OpTypeInt 32 0
+ %v2uint = OpTypeVector %uint 2
+%tint_symbol_1 = OpTypeStruct %v2uint
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v2uint
+%_ptr_Function_v2uint = OpTypePointer Function %v2uint
+ %uint_1 = OpConstant %uint 1
+ %11 = OpConstantComposite %v2uint %uint_1 %uint_1
+ %uint_3 = OpConstant %uint 3
+ %void = OpTypeVoid
+ %20 = OpTypeFunction %void
+%_ptr_StorageBuffer_v2uint = OpTypePointer StorageBuffer %v2uint
+ %uint_0 = OpConstant %uint 0
+%subgroupAnd_376802 = OpFunction %v2uint None %7
+ %8 = OpLabel
+ %arg_0 = OpVariable %_ptr_Function_v2uint Function
+ %res = OpVariable %_ptr_Function_v2uint Function
+ OpStore %arg_0 %11
+ %13 = OpLoad %v2uint %arg_0
+ %14 = OpGroupNonUniformBitwiseAnd %v2uint %uint_3 Reduce %13
+ OpStore %res %14
+ %17 = OpLoad %v2uint %res
+ OpReturnValue %17
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %20
+ %21 = OpLabel
+ %22 = OpFunctionCall %v2uint %subgroupAnd_376802
+ %23 = OpAccessChain %_ptr_StorageBuffer_v2uint %1 %uint_0
+ OpStore %23 %22
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %20
+ %27 = OpLabel
+ %28 = OpFunctionCall %v2uint %subgroupAnd_376802
+ %29 = OpAccessChain %_ptr_StorageBuffer_v2uint %1 %uint_0
+ OpStore %29 %28
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl.expected.msl b/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl.expected.msl
new file mode 100644
index 0000000..64195eb
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl.expected.msl
@@ -0,0 +1,19 @@
+#include <metal_stdlib>
+
+using namespace metal;
+uint2 subgroupAnd_376802() {
+ uint2 arg_0 = uint2(1u);
+ uint2 res = simd_and(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device uint2* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupAnd_376802();
+ return;
+}
+
+kernel void compute_main(device uint2* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupAnd_376802();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl.expected.spvasm b/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl.expected.spvasm
new file mode 100644
index 0000000..be05ae7
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl.expected.spvasm
@@ -0,0 +1,19 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<u32>;
+
+fn subgroupAnd_376802() -> vec2<u32> {
+ var arg_0 = vec2<u32>(1u);
+ var res : vec2<u32> = subgroupAnd(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_376802();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl.expected.wgsl b/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl.expected.wgsl
new file mode 100644
index 0000000..5b24fa4
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/376802.wgsl.expected.wgsl
@@ -0,0 +1,19 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<u32>;
+
+fn subgroupAnd_376802() -> vec2<u32> {
+ var arg_0 = vec2<u32>(1u);
+ var res : vec2<u32> = subgroupAnd(arg_0);
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupAnd_376802();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_376802();
+}
diff --git a/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl b/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl
new file mode 100644
index 0000000..642acfc
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl
@@ -0,0 +1,59 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<i32>;
+
+
+// fn subgroupAnd(value: vec<2, i32>) -> vec<2, i32>
+fn subgroupAnd_4adc72() -> vec2<i32>{
+ var arg_0 = vec2<i32>(1i);
+ var res: vec2<i32> = subgroupAnd(arg_0);
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupAnd_4adc72();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_4adc72();
+}
diff --git a/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..6702510
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl.expected.dxc.hlsl
@@ -0,0 +1,18 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int2 subgroupAnd_4adc72() {
+ int2 arg_0 = (1).xx;
+ int2 res = asint(WaveActiveBitAnd(asuint(arg_0)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupAnd_4adc72()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupAnd_4adc72()));
+ return;
+}
diff --git a/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..ea0a82f
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl.expected.fxc.hlsl
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int2 subgroupAnd_4adc72() {
+ int2 arg_0 = (1).xx;
+ int2 res = asint(WaveActiveBitAnd(asuint(arg_0)));
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupAnd_4adc72()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001D7E87F1CA0(5,20-50): error X3004: undeclared identifier 'WaveActiveBitAnd'
+
diff --git a/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl.expected.glsl b/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl.expected.glsl
new file mode 100644
index 0000000..5ad037b
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl.expected.glsl
@@ -0,0 +1,22 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<i32>;
+
+fn subgroupAnd_4adc72() -> vec2<i32> {
+ var arg_0 = vec2<i32>(1i);
+ var res : vec2<i32> = subgroupAnd(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_4adc72();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..20ed017
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,17 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+int2 subgroupAnd_4adc72() {
+ int2 arg_0 = (1).xx;
+ int2 res = asint(WaveActiveBitAnd(asuint(arg_0)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupAnd_4adc72()));
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupAnd_4adc72()));
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl.expected.ir.msl
new file mode 100644
index 0000000..e466779
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl.expected.ir.msl
@@ -0,0 +1,22 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device int2* prevent_dce;
+};
+
+int2 subgroupAnd_4adc72() {
+ int2 arg_0 = int2(1);
+ int2 res = simd_and(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device int2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAnd_4adc72();
+}
+
+kernel void compute_main(device int2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAnd_4adc72();
+}
diff --git a/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..70c0085
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl.expected.ir.spvasm
@@ -0,0 +1,63 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 31
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupAnd_4adc72 "subgroupAnd_4adc72"
+ OpName %arg_0 "arg_0"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %int = OpTypeInt 32 1
+ %v2int = OpTypeVector %int 2
+%tint_symbol_1 = OpTypeStruct %v2int
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v2int
+%_ptr_Function_v2int = OpTypePointer Function %v2int
+ %int_1 = OpConstant %int 1
+ %11 = OpConstantComposite %v2int %int_1 %int_1
+ %uint = OpTypeInt 32 0
+ %uint_3 = OpConstant %uint 3
+ %void = OpTypeVoid
+ %21 = OpTypeFunction %void
+%_ptr_StorageBuffer_v2int = OpTypePointer StorageBuffer %v2int
+ %uint_0 = OpConstant %uint 0
+%subgroupAnd_4adc72 = OpFunction %v2int None %7
+ %8 = OpLabel
+ %arg_0 = OpVariable %_ptr_Function_v2int Function
+ %res = OpVariable %_ptr_Function_v2int Function
+ OpStore %arg_0 %11
+ %13 = OpLoad %v2int %arg_0
+ %14 = OpGroupNonUniformBitwiseAnd %v2int %uint_3 Reduce %13
+ OpStore %res %14
+ %18 = OpLoad %v2int %res
+ OpReturnValue %18
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %21
+ %22 = OpLabel
+ %23 = OpFunctionCall %v2int %subgroupAnd_4adc72
+ %24 = OpAccessChain %_ptr_StorageBuffer_v2int %1 %uint_0
+ OpStore %24 %23
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %21
+ %28 = OpLabel
+ %29 = OpFunctionCall %v2int %subgroupAnd_4adc72
+ %30 = OpAccessChain %_ptr_StorageBuffer_v2int %1 %uint_0
+ OpStore %30 %29
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl.expected.msl b/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl.expected.msl
new file mode 100644
index 0000000..623ed5c
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl.expected.msl
@@ -0,0 +1,19 @@
+#include <metal_stdlib>
+
+using namespace metal;
+int2 subgroupAnd_4adc72() {
+ int2 arg_0 = int2(1);
+ int2 res = simd_and(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device int2* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupAnd_4adc72();
+ return;
+}
+
+kernel void compute_main(device int2* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupAnd_4adc72();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl.expected.spvasm b/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl.expected.spvasm
new file mode 100644
index 0000000..9f5c58e
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl.expected.spvasm
@@ -0,0 +1,19 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<i32>;
+
+fn subgroupAnd_4adc72() -> vec2<i32> {
+ var arg_0 = vec2<i32>(1i);
+ var res : vec2<i32> = subgroupAnd(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_4adc72();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl.expected.wgsl b/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl.expected.wgsl
new file mode 100644
index 0000000..3d0ef1c
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/4adc72.wgsl.expected.wgsl
@@ -0,0 +1,19 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<i32>;
+
+fn subgroupAnd_4adc72() -> vec2<i32> {
+ var arg_0 = vec2<i32>(1i);
+ var res : vec2<i32> = subgroupAnd(arg_0);
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupAnd_4adc72();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_4adc72();
+}
diff --git a/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl b/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl
new file mode 100644
index 0000000..8f8ad25
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl
@@ -0,0 +1,59 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : u32;
+
+
+// fn subgroupAnd(value: u32) -> u32
+fn subgroupAnd_4df632() -> u32{
+ var arg_0 = 1u;
+ var res: u32 = subgroupAnd(arg_0);
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupAnd_4df632();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_4df632();
+}
diff --git a/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..5632dc5
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl.expected.dxc.hlsl
@@ -0,0 +1,18 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint subgroupAnd_4df632() {
+ uint arg_0 = 1u;
+ uint res = WaveActiveBitAnd(arg_0);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupAnd_4df632()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupAnd_4df632()));
+ return;
+}
diff --git a/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..810be0a
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl.expected.fxc.hlsl
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint subgroupAnd_4df632() {
+ uint arg_0 = 1u;
+ uint res = WaveActiveBitAnd(arg_0);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupAnd_4df632()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001DBF3300A70(5,14-36): error X3004: undeclared identifier 'WaveActiveBitAnd'
+
diff --git a/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl.expected.glsl b/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl.expected.glsl
new file mode 100644
index 0000000..bd4f976
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl.expected.glsl
@@ -0,0 +1,22 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : u32;
+
+fn subgroupAnd_4df632() -> u32 {
+ var arg_0 = 1u;
+ var res : u32 = subgroupAnd(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_4df632();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..f9a5a53
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,17 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+uint subgroupAnd_4df632() {
+ uint arg_0 = 1u;
+ uint res = WaveActiveBitAnd(arg_0);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store(0u, subgroupAnd_4df632());
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, subgroupAnd_4df632());
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl.expected.ir.msl
new file mode 100644
index 0000000..c05a0ae
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl.expected.ir.msl
@@ -0,0 +1,22 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device uint* prevent_dce;
+};
+
+uint subgroupAnd_4df632() {
+ uint arg_0 = 1u;
+ uint res = simd_and(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device uint* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAnd_4df632();
+}
+
+kernel void compute_main(device uint* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAnd_4df632();
+}
diff --git a/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..1cba37b
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl.expected.ir.spvasm
@@ -0,0 +1,60 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 28
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupAnd_4df632 "subgroupAnd_4df632"
+ OpName %arg_0 "arg_0"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %uint = OpTypeInt 32 0
+%tint_symbol_1 = OpTypeStruct %uint
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %6 = OpTypeFunction %uint
+%_ptr_Function_uint = OpTypePointer Function %uint
+ %uint_1 = OpConstant %uint 1
+ %uint_3 = OpConstant %uint 3
+ %void = OpTypeVoid
+ %18 = OpTypeFunction %void
+%_ptr_StorageBuffer_uint = OpTypePointer StorageBuffer %uint
+ %uint_0 = OpConstant %uint 0
+%subgroupAnd_4df632 = OpFunction %uint None %6
+ %7 = OpLabel
+ %arg_0 = OpVariable %_ptr_Function_uint Function
+ %res = OpVariable %_ptr_Function_uint Function
+ OpStore %arg_0 %uint_1
+ %11 = OpLoad %uint %arg_0
+ %12 = OpGroupNonUniformBitwiseAnd %uint %uint_3 Reduce %11
+ OpStore %res %12
+ %15 = OpLoad %uint %res
+ OpReturnValue %15
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %18
+ %19 = OpLabel
+ %20 = OpFunctionCall %uint %subgroupAnd_4df632
+ %21 = OpAccessChain %_ptr_StorageBuffer_uint %1 %uint_0
+ OpStore %21 %20
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %18
+ %25 = OpLabel
+ %26 = OpFunctionCall %uint %subgroupAnd_4df632
+ %27 = OpAccessChain %_ptr_StorageBuffer_uint %1 %uint_0
+ OpStore %27 %26
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl.expected.msl b/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl.expected.msl
new file mode 100644
index 0000000..8434859
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl.expected.msl
@@ -0,0 +1,19 @@
+#include <metal_stdlib>
+
+using namespace metal;
+uint subgroupAnd_4df632() {
+ uint arg_0 = 1u;
+ uint res = simd_and(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device uint* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupAnd_4df632();
+ return;
+}
+
+kernel void compute_main(device uint* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupAnd_4df632();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl.expected.spvasm b/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl.expected.spvasm
new file mode 100644
index 0000000..a199f01
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl.expected.spvasm
@@ -0,0 +1,19 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : u32;
+
+fn subgroupAnd_4df632() -> u32 {
+ var arg_0 = 1u;
+ var res : u32 = subgroupAnd(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_4df632();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl.expected.wgsl b/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl.expected.wgsl
new file mode 100644
index 0000000..dc30c85
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/4df632.wgsl.expected.wgsl
@@ -0,0 +1,19 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : u32;
+
+fn subgroupAnd_4df632() -> u32 {
+ var arg_0 = 1u;
+ var res : u32 = subgroupAnd(arg_0);
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupAnd_4df632();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_4df632();
+}
diff --git a/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl b/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl
new file mode 100644
index 0000000..0cfabe7
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl
@@ -0,0 +1,59 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<i32>;
+
+
+// fn subgroupAnd(value: vec<4, i32>) -> vec<4, i32>
+fn subgroupAnd_97655b() -> vec4<i32>{
+ var arg_0 = vec4<i32>(1i);
+ var res: vec4<i32> = subgroupAnd(arg_0);
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupAnd_97655b();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_97655b();
+}
diff --git a/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..5dd49cc
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl.expected.dxc.hlsl
@@ -0,0 +1,18 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int4 subgroupAnd_97655b() {
+ int4 arg_0 = (1).xxxx;
+ int4 res = asint(WaveActiveBitAnd(asuint(arg_0)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupAnd_97655b()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupAnd_97655b()));
+ return;
+}
diff --git a/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..e89825f
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl.expected.fxc.hlsl
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int4 subgroupAnd_97655b() {
+ int4 arg_0 = (1).xxxx;
+ int4 res = asint(WaveActiveBitAnd(asuint(arg_0)));
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupAnd_97655b()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000147CD86DCC0(5,20-50): error X3004: undeclared identifier 'WaveActiveBitAnd'
+
diff --git a/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl.expected.glsl b/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl.expected.glsl
new file mode 100644
index 0000000..4dee6bf
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl.expected.glsl
@@ -0,0 +1,22 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<i32>;
+
+fn subgroupAnd_97655b() -> vec4<i32> {
+ var arg_0 = vec4<i32>(1i);
+ var res : vec4<i32> = subgroupAnd(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_97655b();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..94e0856
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,17 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+int4 subgroupAnd_97655b() {
+ int4 arg_0 = (1).xxxx;
+ int4 res = asint(WaveActiveBitAnd(asuint(arg_0)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupAnd_97655b()));
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupAnd_97655b()));
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl.expected.ir.msl
new file mode 100644
index 0000000..570b329
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl.expected.ir.msl
@@ -0,0 +1,22 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device int4* prevent_dce;
+};
+
+int4 subgroupAnd_97655b() {
+ int4 arg_0 = int4(1);
+ int4 res = simd_and(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device int4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAnd_97655b();
+}
+
+kernel void compute_main(device int4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAnd_97655b();
+}
diff --git a/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..5e68065
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl.expected.ir.spvasm
@@ -0,0 +1,63 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 31
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupAnd_97655b "subgroupAnd_97655b"
+ OpName %arg_0 "arg_0"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %int = OpTypeInt 32 1
+ %v4int = OpTypeVector %int 4
+%tint_symbol_1 = OpTypeStruct %v4int
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v4int
+%_ptr_Function_v4int = OpTypePointer Function %v4int
+ %int_1 = OpConstant %int 1
+ %11 = OpConstantComposite %v4int %int_1 %int_1 %int_1 %int_1
+ %uint = OpTypeInt 32 0
+ %uint_3 = OpConstant %uint 3
+ %void = OpTypeVoid
+ %21 = OpTypeFunction %void
+%_ptr_StorageBuffer_v4int = OpTypePointer StorageBuffer %v4int
+ %uint_0 = OpConstant %uint 0
+%subgroupAnd_97655b = OpFunction %v4int None %7
+ %8 = OpLabel
+ %arg_0 = OpVariable %_ptr_Function_v4int Function
+ %res = OpVariable %_ptr_Function_v4int Function
+ OpStore %arg_0 %11
+ %13 = OpLoad %v4int %arg_0
+ %14 = OpGroupNonUniformBitwiseAnd %v4int %uint_3 Reduce %13
+ OpStore %res %14
+ %18 = OpLoad %v4int %res
+ OpReturnValue %18
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %21
+ %22 = OpLabel
+ %23 = OpFunctionCall %v4int %subgroupAnd_97655b
+ %24 = OpAccessChain %_ptr_StorageBuffer_v4int %1 %uint_0
+ OpStore %24 %23
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %21
+ %28 = OpLabel
+ %29 = OpFunctionCall %v4int %subgroupAnd_97655b
+ %30 = OpAccessChain %_ptr_StorageBuffer_v4int %1 %uint_0
+ OpStore %30 %29
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl.expected.msl b/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl.expected.msl
new file mode 100644
index 0000000..74d567b
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl.expected.msl
@@ -0,0 +1,19 @@
+#include <metal_stdlib>
+
+using namespace metal;
+int4 subgroupAnd_97655b() {
+ int4 arg_0 = int4(1);
+ int4 res = simd_and(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device int4* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupAnd_97655b();
+ return;
+}
+
+kernel void compute_main(device int4* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupAnd_97655b();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl.expected.spvasm b/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl.expected.spvasm
new file mode 100644
index 0000000..0ab2a77
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl.expected.spvasm
@@ -0,0 +1,19 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<i32>;
+
+fn subgroupAnd_97655b() -> vec4<i32> {
+ var arg_0 = vec4<i32>(1i);
+ var res : vec4<i32> = subgroupAnd(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_97655b();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl.expected.wgsl b/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl.expected.wgsl
new file mode 100644
index 0000000..3ee347d
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/97655b.wgsl.expected.wgsl
@@ -0,0 +1,19 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<i32>;
+
+fn subgroupAnd_97655b() -> vec4<i32> {
+ var arg_0 = vec4<i32>(1i);
+ var res : vec4<i32> = subgroupAnd(arg_0);
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupAnd_97655b();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_97655b();
+}
diff --git a/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl b/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl
new file mode 100644
index 0000000..e05cdcf
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl
@@ -0,0 +1,59 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<u32>;
+
+
+// fn subgroupAnd(value: vec<3, u32>) -> vec<3, u32>
+fn subgroupAnd_ad0cd3() -> vec3<u32>{
+ var arg_0 = vec3<u32>(1u);
+ var res: vec3<u32> = subgroupAnd(arg_0);
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupAnd_ad0cd3();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_ad0cd3();
+}
diff --git a/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..b218642
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl.expected.dxc.hlsl
@@ -0,0 +1,18 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint3 subgroupAnd_ad0cd3() {
+ uint3 arg_0 = (1u).xxx;
+ uint3 res = WaveActiveBitAnd(arg_0);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupAnd_ad0cd3()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupAnd_ad0cd3()));
+ return;
+}
diff --git a/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..8b0a69e
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl.expected.fxc.hlsl
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint3 subgroupAnd_ad0cd3() {
+ uint3 arg_0 = (1u).xxx;
+ uint3 res = WaveActiveBitAnd(arg_0);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupAnd_ad0cd3()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000208C8E8C5A0(5,15-37): error X3004: undeclared identifier 'WaveActiveBitAnd'
+
diff --git a/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl.expected.glsl b/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl.expected.glsl
new file mode 100644
index 0000000..9f7c3f2
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl.expected.glsl
@@ -0,0 +1,22 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<u32>;
+
+fn subgroupAnd_ad0cd3() -> vec3<u32> {
+ var arg_0 = vec3<u32>(1u);
+ var res : vec3<u32> = subgroupAnd(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_ad0cd3();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..7c1bc01
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,17 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+uint3 subgroupAnd_ad0cd3() {
+ uint3 arg_0 = (1u).xxx;
+ uint3 res = WaveActiveBitAnd(arg_0);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store3(0u, subgroupAnd_ad0cd3());
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, subgroupAnd_ad0cd3());
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl.expected.ir.msl
new file mode 100644
index 0000000..b21bc35
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl.expected.ir.msl
@@ -0,0 +1,22 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device uint3* prevent_dce;
+};
+
+uint3 subgroupAnd_ad0cd3() {
+ uint3 arg_0 = uint3(1u);
+ uint3 res = simd_and(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device uint3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAnd_ad0cd3();
+}
+
+kernel void compute_main(device uint3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAnd_ad0cd3();
+}
diff --git a/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..09110ed
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl.expected.ir.spvasm
@@ -0,0 +1,62 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 30
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupAnd_ad0cd3 "subgroupAnd_ad0cd3"
+ OpName %arg_0 "arg_0"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %uint = OpTypeInt 32 0
+ %v3uint = OpTypeVector %uint 3
+%tint_symbol_1 = OpTypeStruct %v3uint
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v3uint
+%_ptr_Function_v3uint = OpTypePointer Function %v3uint
+ %uint_1 = OpConstant %uint 1
+ %11 = OpConstantComposite %v3uint %uint_1 %uint_1 %uint_1
+ %uint_3 = OpConstant %uint 3
+ %void = OpTypeVoid
+ %20 = OpTypeFunction %void
+%_ptr_StorageBuffer_v3uint = OpTypePointer StorageBuffer %v3uint
+ %uint_0 = OpConstant %uint 0
+%subgroupAnd_ad0cd3 = OpFunction %v3uint None %7
+ %8 = OpLabel
+ %arg_0 = OpVariable %_ptr_Function_v3uint Function
+ %res = OpVariable %_ptr_Function_v3uint Function
+ OpStore %arg_0 %11
+ %13 = OpLoad %v3uint %arg_0
+ %14 = OpGroupNonUniformBitwiseAnd %v3uint %uint_3 Reduce %13
+ OpStore %res %14
+ %17 = OpLoad %v3uint %res
+ OpReturnValue %17
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %20
+ %21 = OpLabel
+ %22 = OpFunctionCall %v3uint %subgroupAnd_ad0cd3
+ %23 = OpAccessChain %_ptr_StorageBuffer_v3uint %1 %uint_0
+ OpStore %23 %22
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %20
+ %27 = OpLabel
+ %28 = OpFunctionCall %v3uint %subgroupAnd_ad0cd3
+ %29 = OpAccessChain %_ptr_StorageBuffer_v3uint %1 %uint_0
+ OpStore %29 %28
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl.expected.msl b/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl.expected.msl
new file mode 100644
index 0000000..2752ea7
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl.expected.msl
@@ -0,0 +1,19 @@
+#include <metal_stdlib>
+
+using namespace metal;
+uint3 subgroupAnd_ad0cd3() {
+ uint3 arg_0 = uint3(1u);
+ uint3 res = simd_and(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device packed_uint3* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = packed_uint3(subgroupAnd_ad0cd3());
+ return;
+}
+
+kernel void compute_main(device packed_uint3* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = packed_uint3(subgroupAnd_ad0cd3());
+ return;
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl.expected.spvasm b/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl.expected.spvasm
new file mode 100644
index 0000000..db74819
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl.expected.spvasm
@@ -0,0 +1,19 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<u32>;
+
+fn subgroupAnd_ad0cd3() -> vec3<u32> {
+ var arg_0 = vec3<u32>(1u);
+ var res : vec3<u32> = subgroupAnd(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_ad0cd3();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl.expected.wgsl b/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl.expected.wgsl
new file mode 100644
index 0000000..db13754
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/ad0cd3.wgsl.expected.wgsl
@@ -0,0 +1,19 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<u32>;
+
+fn subgroupAnd_ad0cd3() -> vec3<u32> {
+ var arg_0 = vec3<u32>(1u);
+ var res : vec3<u32> = subgroupAnd(arg_0);
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupAnd_ad0cd3();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_ad0cd3();
+}
diff --git a/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl b/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl
new file mode 100644
index 0000000..da7b71e
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl
@@ -0,0 +1,59 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : i32;
+
+
+// fn subgroupAnd(value: i32) -> i32
+fn subgroupAnd_c6fc92() -> i32{
+ var arg_0 = 1i;
+ var res: i32 = subgroupAnd(arg_0);
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupAnd_c6fc92();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_c6fc92();
+}
diff --git a/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..4bc62c6
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl.expected.dxc.hlsl
@@ -0,0 +1,18 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int subgroupAnd_c6fc92() {
+ int arg_0 = 1;
+ int res = asint(WaveActiveBitAnd(asuint(arg_0)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupAnd_c6fc92()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupAnd_c6fc92()));
+ return;
+}
diff --git a/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..6cff6fd
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl.expected.fxc.hlsl
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int subgroupAnd_c6fc92() {
+ int arg_0 = 1;
+ int res = asint(WaveActiveBitAnd(asuint(arg_0)));
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupAnd_c6fc92()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000136FE991080(5,19-49): error X3004: undeclared identifier 'WaveActiveBitAnd'
+
diff --git a/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl.expected.glsl b/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl.expected.glsl
new file mode 100644
index 0000000..11d9714
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl.expected.glsl
@@ -0,0 +1,22 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : i32;
+
+fn subgroupAnd_c6fc92() -> i32 {
+ var arg_0 = 1i;
+ var res : i32 = subgroupAnd(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_c6fc92();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..1914e32
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,17 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+int subgroupAnd_c6fc92() {
+ int arg_0 = 1;
+ int res = asint(WaveActiveBitAnd(asuint(arg_0)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupAnd_c6fc92()));
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupAnd_c6fc92()));
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl.expected.ir.msl
new file mode 100644
index 0000000..02a2e08
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl.expected.ir.msl
@@ -0,0 +1,22 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device int* prevent_dce;
+};
+
+int subgroupAnd_c6fc92() {
+ int arg_0 = 1;
+ int res = simd_and(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device int* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAnd_c6fc92();
+}
+
+kernel void compute_main(device int* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAnd_c6fc92();
+}
diff --git a/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..585dd484
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl.expected.ir.spvasm
@@ -0,0 +1,61 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 29
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupAnd_c6fc92 "subgroupAnd_c6fc92"
+ OpName %arg_0 "arg_0"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %int = OpTypeInt 32 1
+%tint_symbol_1 = OpTypeStruct %int
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %6 = OpTypeFunction %int
+%_ptr_Function_int = OpTypePointer Function %int
+ %int_1 = OpConstant %int 1
+ %uint = OpTypeInt 32 0
+ %uint_3 = OpConstant %uint 3
+ %void = OpTypeVoid
+ %19 = OpTypeFunction %void
+%_ptr_StorageBuffer_int = OpTypePointer StorageBuffer %int
+ %uint_0 = OpConstant %uint 0
+%subgroupAnd_c6fc92 = OpFunction %int None %6
+ %7 = OpLabel
+ %arg_0 = OpVariable %_ptr_Function_int Function
+ %res = OpVariable %_ptr_Function_int Function
+ OpStore %arg_0 %int_1
+ %11 = OpLoad %int %arg_0
+ %12 = OpGroupNonUniformBitwiseAnd %int %uint_3 Reduce %11
+ OpStore %res %12
+ %16 = OpLoad %int %res
+ OpReturnValue %16
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %19
+ %20 = OpLabel
+ %21 = OpFunctionCall %int %subgroupAnd_c6fc92
+ %22 = OpAccessChain %_ptr_StorageBuffer_int %1 %uint_0
+ OpStore %22 %21
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %19
+ %26 = OpLabel
+ %27 = OpFunctionCall %int %subgroupAnd_c6fc92
+ %28 = OpAccessChain %_ptr_StorageBuffer_int %1 %uint_0
+ OpStore %28 %27
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl.expected.msl b/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl.expected.msl
new file mode 100644
index 0000000..e5b2606
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl.expected.msl
@@ -0,0 +1,19 @@
+#include <metal_stdlib>
+
+using namespace metal;
+int subgroupAnd_c6fc92() {
+ int arg_0 = 1;
+ int res = simd_and(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device int* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupAnd_c6fc92();
+ return;
+}
+
+kernel void compute_main(device int* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupAnd_c6fc92();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl.expected.spvasm b/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl.expected.spvasm
new file mode 100644
index 0000000..396727e
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl.expected.spvasm
@@ -0,0 +1,19 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : i32;
+
+fn subgroupAnd_c6fc92() -> i32 {
+ var arg_0 = 1i;
+ var res : i32 = subgroupAnd(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_c6fc92();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl.expected.wgsl b/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl.expected.wgsl
new file mode 100644
index 0000000..f910b3b
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/c6fc92.wgsl.expected.wgsl
@@ -0,0 +1,19 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : i32;
+
+fn subgroupAnd_c6fc92() -> i32 {
+ var arg_0 = 1i;
+ var res : i32 = subgroupAnd(arg_0);
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupAnd_c6fc92();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_c6fc92();
+}
diff --git a/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl b/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl
new file mode 100644
index 0000000..1931d63
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl
@@ -0,0 +1,59 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<u32>;
+
+
+// fn subgroupAnd(value: vec<4, u32>) -> vec<4, u32>
+fn subgroupAnd_d2c9a6() -> vec4<u32>{
+ var arg_0 = vec4<u32>(1u);
+ var res: vec4<u32> = subgroupAnd(arg_0);
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupAnd_d2c9a6();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_d2c9a6();
+}
diff --git a/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..d0ea6a3
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl.expected.dxc.hlsl
@@ -0,0 +1,18 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint4 subgroupAnd_d2c9a6() {
+ uint4 arg_0 = (1u).xxxx;
+ uint4 res = WaveActiveBitAnd(arg_0);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupAnd_d2c9a6()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupAnd_d2c9a6()));
+ return;
+}
diff --git a/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..8f4fcbf
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl.expected.fxc.hlsl
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint4 subgroupAnd_d2c9a6() {
+ uint4 arg_0 = (1u).xxxx;
+ uint4 res = WaveActiveBitAnd(arg_0);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupAnd_d2c9a6()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000002CB4B9D1740(5,15-37): error X3004: undeclared identifier 'WaveActiveBitAnd'
+
diff --git a/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl.expected.glsl b/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl.expected.glsl
new file mode 100644
index 0000000..a51d0ee
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl.expected.glsl
@@ -0,0 +1,22 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<u32>;
+
+fn subgroupAnd_d2c9a6() -> vec4<u32> {
+ var arg_0 = vec4<u32>(1u);
+ var res : vec4<u32> = subgroupAnd(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_d2c9a6();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..b83d8f3
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,17 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+uint4 subgroupAnd_d2c9a6() {
+ uint4 arg_0 = (1u).xxxx;
+ uint4 res = WaveActiveBitAnd(arg_0);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store4(0u, subgroupAnd_d2c9a6());
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, subgroupAnd_d2c9a6());
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl.expected.ir.msl
new file mode 100644
index 0000000..bc1970c
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl.expected.ir.msl
@@ -0,0 +1,22 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device uint4* prevent_dce;
+};
+
+uint4 subgroupAnd_d2c9a6() {
+ uint4 arg_0 = uint4(1u);
+ uint4 res = simd_and(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device uint4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAnd_d2c9a6();
+}
+
+kernel void compute_main(device uint4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupAnd_d2c9a6();
+}
diff --git a/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..a759c9a
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl.expected.ir.spvasm
@@ -0,0 +1,62 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 30
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupAnd_d2c9a6 "subgroupAnd_d2c9a6"
+ OpName %arg_0 "arg_0"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %uint = OpTypeInt 32 0
+ %v4uint = OpTypeVector %uint 4
+%tint_symbol_1 = OpTypeStruct %v4uint
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v4uint
+%_ptr_Function_v4uint = OpTypePointer Function %v4uint
+ %uint_1 = OpConstant %uint 1
+ %11 = OpConstantComposite %v4uint %uint_1 %uint_1 %uint_1 %uint_1
+ %uint_3 = OpConstant %uint 3
+ %void = OpTypeVoid
+ %20 = OpTypeFunction %void
+%_ptr_StorageBuffer_v4uint = OpTypePointer StorageBuffer %v4uint
+ %uint_0 = OpConstant %uint 0
+%subgroupAnd_d2c9a6 = OpFunction %v4uint None %7
+ %8 = OpLabel
+ %arg_0 = OpVariable %_ptr_Function_v4uint Function
+ %res = OpVariable %_ptr_Function_v4uint Function
+ OpStore %arg_0 %11
+ %13 = OpLoad %v4uint %arg_0
+ %14 = OpGroupNonUniformBitwiseAnd %v4uint %uint_3 Reduce %13
+ OpStore %res %14
+ %17 = OpLoad %v4uint %res
+ OpReturnValue %17
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %20
+ %21 = OpLabel
+ %22 = OpFunctionCall %v4uint %subgroupAnd_d2c9a6
+ %23 = OpAccessChain %_ptr_StorageBuffer_v4uint %1 %uint_0
+ OpStore %23 %22
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %20
+ %27 = OpLabel
+ %28 = OpFunctionCall %v4uint %subgroupAnd_d2c9a6
+ %29 = OpAccessChain %_ptr_StorageBuffer_v4uint %1 %uint_0
+ OpStore %29 %28
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl.expected.msl b/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl.expected.msl
new file mode 100644
index 0000000..f6c3e388
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl.expected.msl
@@ -0,0 +1,19 @@
+#include <metal_stdlib>
+
+using namespace metal;
+uint4 subgroupAnd_d2c9a6() {
+ uint4 arg_0 = uint4(1u);
+ uint4 res = simd_and(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device uint4* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupAnd_d2c9a6();
+ return;
+}
+
+kernel void compute_main(device uint4* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupAnd_d2c9a6();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl.expected.spvasm b/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl.expected.spvasm
new file mode 100644
index 0000000..abf6066
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl.expected.spvasm
@@ -0,0 +1,19 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<u32>;
+
+fn subgroupAnd_d2c9a6() -> vec4<u32> {
+ var arg_0 = vec4<u32>(1u);
+ var res : vec4<u32> = subgroupAnd(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_d2c9a6();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl.expected.wgsl b/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl.expected.wgsl
new file mode 100644
index 0000000..9f3d936
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupAnd/d2c9a6.wgsl.expected.wgsl
@@ -0,0 +1,19 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<u32>;
+
+fn subgroupAnd_d2c9a6() -> vec4<u32> {
+ var arg_0 = vec4<u32>(1u);
+ var res : vec4<u32> = subgroupAnd(arg_0);
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupAnd_d2c9a6();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupAnd_d2c9a6();
+}
diff --git a/test/tint/builtins/gen/var/subgroupBallot/1a8251.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBallot/1a8251.wgsl.expected.fxc.hlsl
index 1f17fde..9da5773 100644
--- a/test/tint/builtins/gen/var/subgroupBallot/1a8251.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupBallot/1a8251.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store4(0u, asuint(subgroupBallot_1a8251()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000216ACDFD010(5,15-37): error X3004: undeclared identifier 'WaveActiveBallot'
+
diff --git a/test/tint/builtins/gen/var/subgroupBallot/1a8251.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupBallot/1a8251.wgsl.expected.ir.dxc.hlsl
index 993e0e9..a5356af 100644
--- a/test/tint/builtins/gen/var/subgroupBallot/1a8251.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupBallot/1a8251.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store4(0u, subgroupBallot_1a8251());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store4(0u, subgroupBallot_1a8251());
diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/07e2d8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/07e2d8.wgsl.expected.fxc.hlsl
index 9f667dd..f0994ff 100644
--- a/test/tint/builtins/gen/var/subgroupBroadcast/07e2d8.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupBroadcast/07e2d8.wgsl.expected.fxc.hlsl
@@ -1,9 +1,18 @@
SKIP: FAILED
-/build/dawn/src/tint/lang/hlsl/writer/ast_printer/ast_printer.cc:2510 internal compiler error: TINT_UNREACHABLE unexpected subgroup builtin type subgroupBroadcast
-********************************************************************
-* The tint shader compiler has encountered an unexpected error. *
-* *
-* Please help us fix this issue by submitting a bug report at *
-* crbug.com/tint with the source program that triggered the bug. *
-********************************************************************
+RWByteAddressBuffer prevent_dce : register(u0);
+
+float16_t subgroupBroadcast_07e2d8() {
+ float16_t arg_0 = float16_t(1.0h);
+ float16_t res = WaveReadLaneAt(arg_0, 1u);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store<float16_t>(0u, subgroupBroadcast_07e2d8());
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001DDF4F1F440(3,1-9): error X3000: unrecognized identifier 'float16_t'
+
diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/07e2d8.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/07e2d8.wgsl.expected.ir.dxc.hlsl
index 22d01a8..d7a8e11 100644
--- a/test/tint/builtins/gen/var/subgroupBroadcast/07e2d8.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupBroadcast/07e2d8.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<float16_t>(0u, subgroupBroadcast_07e2d8());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<float16_t>(0u, subgroupBroadcast_07e2d8());
diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/08beca.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/08beca.wgsl.expected.fxc.hlsl
index 9f667dd..12cce6d 100644
--- a/test/tint/builtins/gen/var/subgroupBroadcast/08beca.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupBroadcast/08beca.wgsl.expected.fxc.hlsl
@@ -1,9 +1,18 @@
SKIP: FAILED
-/build/dawn/src/tint/lang/hlsl/writer/ast_printer/ast_printer.cc:2510 internal compiler error: TINT_UNREACHABLE unexpected subgroup builtin type subgroupBroadcast
-********************************************************************
-* The tint shader compiler has encountered an unexpected error. *
-* *
-* Please help us fix this issue by submitting a bug report at *
-* crbug.com/tint with the source program that triggered the bug. *
-********************************************************************
+RWByteAddressBuffer prevent_dce : register(u0);
+
+float subgroupBroadcast_08beca() {
+ float arg_0 = 1.0f;
+ float res = WaveReadLaneAt(arg_0, 1u);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupBroadcast_08beca()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000260FE0CC900(5,15-39): error X3004: undeclared identifier 'WaveReadLaneAt'
+
diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/08beca.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/08beca.wgsl.expected.ir.dxc.hlsl
index 347c80c..10c16fd 100644
--- a/test/tint/builtins/gen/var/subgroupBroadcast/08beca.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupBroadcast/08beca.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupBroadcast_08beca()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store(0u, asuint(subgroupBroadcast_08beca()));
diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/0f44e2.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/0f44e2.wgsl.expected.fxc.hlsl
index 9f667dd..10ba6f1 100644
--- a/test/tint/builtins/gen/var/subgroupBroadcast/0f44e2.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupBroadcast/0f44e2.wgsl.expected.fxc.hlsl
@@ -1,9 +1,18 @@
SKIP: FAILED
-/build/dawn/src/tint/lang/hlsl/writer/ast_printer/ast_printer.cc:2510 internal compiler error: TINT_UNREACHABLE unexpected subgroup builtin type subgroupBroadcast
-********************************************************************
-* The tint shader compiler has encountered an unexpected error. *
-* *
-* Please help us fix this issue by submitting a bug report at *
-* crbug.com/tint with the source program that triggered the bug. *
-********************************************************************
+RWByteAddressBuffer prevent_dce : register(u0);
+
+vector<float16_t, 4> subgroupBroadcast_0f44e2() {
+ vector<float16_t, 4> arg_0 = (float16_t(1.0h)).xxxx;
+ vector<float16_t, 4> res = WaveReadLaneAt(arg_0, 1u);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store<vector<float16_t, 4> >(0u, subgroupBroadcast_0f44e2());
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000166868CD1D0(3,8-16): error X3000: syntax error: unexpected token 'float16_t'
+
diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/0f44e2.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/0f44e2.wgsl.expected.ir.dxc.hlsl
index 4584bbd..4ed4fe8 100644
--- a/test/tint/builtins/gen/var/subgroupBroadcast/0f44e2.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupBroadcast/0f44e2.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<vector<float16_t, 4> >(0u, subgroupBroadcast_0f44e2());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<vector<float16_t, 4> >(0u, subgroupBroadcast_0f44e2());
diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/13f36c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/13f36c.wgsl.expected.fxc.hlsl
index 9f667dd..a21bd33 100644
--- a/test/tint/builtins/gen/var/subgroupBroadcast/13f36c.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupBroadcast/13f36c.wgsl.expected.fxc.hlsl
@@ -1,9 +1,18 @@
SKIP: FAILED
-/build/dawn/src/tint/lang/hlsl/writer/ast_printer/ast_printer.cc:2510 internal compiler error: TINT_UNREACHABLE unexpected subgroup builtin type subgroupBroadcast
-********************************************************************
-* The tint shader compiler has encountered an unexpected error. *
-* *
-* Please help us fix this issue by submitting a bug report at *
-* crbug.com/tint with the source program that triggered the bug. *
-********************************************************************
+RWByteAddressBuffer prevent_dce : register(u0);
+
+vector<float16_t, 2> subgroupBroadcast_13f36c() {
+ vector<float16_t, 2> arg_0 = (float16_t(1.0h)).xx;
+ vector<float16_t, 2> res = WaveReadLaneAt(arg_0, 1u);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store<vector<float16_t, 2> >(0u, subgroupBroadcast_13f36c());
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001FD198BD1D0(3,8-16): error X3000: syntax error: unexpected token 'float16_t'
+
diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/13f36c.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/13f36c.wgsl.expected.ir.dxc.hlsl
index aea3235..c739271 100644
--- a/test/tint/builtins/gen/var/subgroupBroadcast/13f36c.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupBroadcast/13f36c.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<vector<float16_t, 2> >(0u, subgroupBroadcast_13f36c());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<vector<float16_t, 2> >(0u, subgroupBroadcast_13f36c());
diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/1d79c7.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/1d79c7.wgsl.expected.fxc.hlsl
index 9f667dd..45e9a82 100644
--- a/test/tint/builtins/gen/var/subgroupBroadcast/1d79c7.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupBroadcast/1d79c7.wgsl.expected.fxc.hlsl
@@ -1,9 +1,18 @@
SKIP: FAILED
-/build/dawn/src/tint/lang/hlsl/writer/ast_printer/ast_printer.cc:2510 internal compiler error: TINT_UNREACHABLE unexpected subgroup builtin type subgroupBroadcast
-********************************************************************
-* The tint shader compiler has encountered an unexpected error. *
-* *
-* Please help us fix this issue by submitting a bug report at *
-* crbug.com/tint with the source program that triggered the bug. *
-********************************************************************
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int subgroupBroadcast_1d79c7() {
+ int arg_0 = 1;
+ int res = WaveReadLaneAt(arg_0, 1u);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupBroadcast_1d79c7()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000002205DFD0120(5,13-37): error X3004: undeclared identifier 'WaveReadLaneAt'
+
diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/1d79c7.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/1d79c7.wgsl.expected.ir.dxc.hlsl
index 5fab837..f5dbb2d 100644
--- a/test/tint/builtins/gen/var/subgroupBroadcast/1d79c7.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupBroadcast/1d79c7.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupBroadcast_1d79c7()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store(0u, asuint(subgroupBroadcast_1d79c7()));
diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/279027.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/279027.wgsl.expected.fxc.hlsl
index 9f667dd..a58fe8f 100644
--- a/test/tint/builtins/gen/var/subgroupBroadcast/279027.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupBroadcast/279027.wgsl.expected.fxc.hlsl
@@ -1,9 +1,18 @@
SKIP: FAILED
-/build/dawn/src/tint/lang/hlsl/writer/ast_printer/ast_printer.cc:2510 internal compiler error: TINT_UNREACHABLE unexpected subgroup builtin type subgroupBroadcast
-********************************************************************
-* The tint shader compiler has encountered an unexpected error. *
-* *
-* Please help us fix this issue by submitting a bug report at *
-* crbug.com/tint with the source program that triggered the bug. *
-********************************************************************
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint4 subgroupBroadcast_279027() {
+ uint4 arg_0 = (1u).xxxx;
+ uint4 res = WaveReadLaneAt(arg_0, 1u);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupBroadcast_279027()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000024CFF3BFD20(5,15-39): error X3004: undeclared identifier 'WaveReadLaneAt'
+
diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/279027.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/279027.wgsl.expected.ir.dxc.hlsl
index cd78746..57ff7b4 100644
--- a/test/tint/builtins/gen/var/subgroupBroadcast/279027.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupBroadcast/279027.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store4(0u, subgroupBroadcast_279027());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store4(0u, subgroupBroadcast_279027());
diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/34fa3d.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/34fa3d.wgsl.expected.fxc.hlsl
index 9f667dd..6407ed3 100644
--- a/test/tint/builtins/gen/var/subgroupBroadcast/34fa3d.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupBroadcast/34fa3d.wgsl.expected.fxc.hlsl
@@ -1,9 +1,18 @@
SKIP: FAILED
-/build/dawn/src/tint/lang/hlsl/writer/ast_printer/ast_printer.cc:2510 internal compiler error: TINT_UNREACHABLE unexpected subgroup builtin type subgroupBroadcast
-********************************************************************
-* The tint shader compiler has encountered an unexpected error. *
-* *
-* Please help us fix this issue by submitting a bug report at *
-* crbug.com/tint with the source program that triggered the bug. *
-********************************************************************
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint3 subgroupBroadcast_34fa3d() {
+ uint3 arg_0 = (1u).xxx;
+ uint3 res = WaveReadLaneAt(arg_0, 1u);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupBroadcast_34fa3d()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000002345F903470(5,15-39): error X3004: undeclared identifier 'WaveReadLaneAt'
+
diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/34fa3d.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/34fa3d.wgsl.expected.ir.dxc.hlsl
index ec0bb6a..ddc0deb 100644
--- a/test/tint/builtins/gen/var/subgroupBroadcast/34fa3d.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupBroadcast/34fa3d.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store3(0u, subgroupBroadcast_34fa3d());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store3(0u, subgroupBroadcast_34fa3d());
diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/3e6879.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/3e6879.wgsl.expected.fxc.hlsl
index 9f667dd..4696146 100644
--- a/test/tint/builtins/gen/var/subgroupBroadcast/3e6879.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupBroadcast/3e6879.wgsl.expected.fxc.hlsl
@@ -1,9 +1,18 @@
SKIP: FAILED
-/build/dawn/src/tint/lang/hlsl/writer/ast_printer/ast_printer.cc:2510 internal compiler error: TINT_UNREACHABLE unexpected subgroup builtin type subgroupBroadcast
-********************************************************************
-* The tint shader compiler has encountered an unexpected error. *
-* *
-* Please help us fix this issue by submitting a bug report at *
-* crbug.com/tint with the source program that triggered the bug. *
-********************************************************************
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int2 subgroupBroadcast_3e6879() {
+ int2 arg_0 = (1).xx;
+ int2 res = WaveReadLaneAt(arg_0, 1u);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupBroadcast_3e6879()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000012FD9152F00(5,14-38): error X3004: undeclared identifier 'WaveReadLaneAt'
+
diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/3e6879.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/3e6879.wgsl.expected.ir.dxc.hlsl
index 6342df4..3698dcb 100644
--- a/test/tint/builtins/gen/var/subgroupBroadcast/3e6879.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupBroadcast/3e6879.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupBroadcast_3e6879()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store2(0u, asuint(subgroupBroadcast_3e6879()));
diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/41e5d7.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/41e5d7.wgsl.expected.fxc.hlsl
index 9f667dd..8a1bc80 100644
--- a/test/tint/builtins/gen/var/subgroupBroadcast/41e5d7.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupBroadcast/41e5d7.wgsl.expected.fxc.hlsl
@@ -1,9 +1,18 @@
SKIP: FAILED
-/build/dawn/src/tint/lang/hlsl/writer/ast_printer/ast_printer.cc:2510 internal compiler error: TINT_UNREACHABLE unexpected subgroup builtin type subgroupBroadcast
-********************************************************************
-* The tint shader compiler has encountered an unexpected error. *
-* *
-* Please help us fix this issue by submitting a bug report at *
-* crbug.com/tint with the source program that triggered the bug. *
-********************************************************************
+RWByteAddressBuffer prevent_dce : register(u0);
+
+vector<float16_t, 3> subgroupBroadcast_41e5d7() {
+ vector<float16_t, 3> arg_0 = (float16_t(1.0h)).xxx;
+ vector<float16_t, 3> res = WaveReadLaneAt(arg_0, 1u);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store<vector<float16_t, 3> >(0u, subgroupBroadcast_41e5d7());
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000002009A3ED1D0(3,8-16): error X3000: syntax error: unexpected token 'float16_t'
+
diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/41e5d7.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/41e5d7.wgsl.expected.ir.dxc.hlsl
index 135d497..558481f 100644
--- a/test/tint/builtins/gen/var/subgroupBroadcast/41e5d7.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupBroadcast/41e5d7.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<vector<float16_t, 3> >(0u, subgroupBroadcast_41e5d7());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<vector<float16_t, 3> >(0u, subgroupBroadcast_41e5d7());
diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/4a4334.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/4a4334.wgsl.expected.fxc.hlsl
index 9f667dd..80658b6 100644
--- a/test/tint/builtins/gen/var/subgroupBroadcast/4a4334.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupBroadcast/4a4334.wgsl.expected.fxc.hlsl
@@ -1,9 +1,18 @@
SKIP: FAILED
-/build/dawn/src/tint/lang/hlsl/writer/ast_printer/ast_printer.cc:2510 internal compiler error: TINT_UNREACHABLE unexpected subgroup builtin type subgroupBroadcast
-********************************************************************
-* The tint shader compiler has encountered an unexpected error. *
-* *
-* Please help us fix this issue by submitting a bug report at *
-* crbug.com/tint with the source program that triggered the bug. *
-********************************************************************
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint2 subgroupBroadcast_4a4334() {
+ uint2 arg_0 = (1u).xx;
+ uint2 res = WaveReadLaneAt(arg_0, 1u);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupBroadcast_4a4334()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000015D73FA0A90(5,15-39): error X3004: undeclared identifier 'WaveReadLaneAt'
+
diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/4a4334.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/4a4334.wgsl.expected.ir.dxc.hlsl
index 93183b4..c6293dc 100644
--- a/test/tint/builtins/gen/var/subgroupBroadcast/4a4334.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupBroadcast/4a4334.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store2(0u, subgroupBroadcast_4a4334());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store2(0u, subgroupBroadcast_4a4334());
diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/5196c8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/5196c8.wgsl.expected.fxc.hlsl
index 9f667dd..eb0b8b2 100644
--- a/test/tint/builtins/gen/var/subgroupBroadcast/5196c8.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupBroadcast/5196c8.wgsl.expected.fxc.hlsl
@@ -1,9 +1,18 @@
SKIP: FAILED
-/build/dawn/src/tint/lang/hlsl/writer/ast_printer/ast_printer.cc:2510 internal compiler error: TINT_UNREACHABLE unexpected subgroup builtin type subgroupBroadcast
-********************************************************************
-* The tint shader compiler has encountered an unexpected error. *
-* *
-* Please help us fix this issue by submitting a bug report at *
-* crbug.com/tint with the source program that triggered the bug. *
-********************************************************************
+RWByteAddressBuffer prevent_dce : register(u0);
+
+float2 subgroupBroadcast_5196c8() {
+ float2 arg_0 = (1.0f).xx;
+ float2 res = WaveReadLaneAt(arg_0, 1u);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupBroadcast_5196c8()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000028954BBF3F0(5,16-40): error X3004: undeclared identifier 'WaveReadLaneAt'
+
diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/5196c8.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/5196c8.wgsl.expected.ir.dxc.hlsl
index 98f3022..51d56cc 100644
--- a/test/tint/builtins/gen/var/subgroupBroadcast/5196c8.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupBroadcast/5196c8.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupBroadcast_5196c8()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store2(0u, asuint(subgroupBroadcast_5196c8()));
diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/912ff5.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/912ff5.wgsl.expected.fxc.hlsl
index 9f667dd..54b5589 100644
--- a/test/tint/builtins/gen/var/subgroupBroadcast/912ff5.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupBroadcast/912ff5.wgsl.expected.fxc.hlsl
@@ -1,9 +1,18 @@
SKIP: FAILED
-/build/dawn/src/tint/lang/hlsl/writer/ast_printer/ast_printer.cc:2510 internal compiler error: TINT_UNREACHABLE unexpected subgroup builtin type subgroupBroadcast
-********************************************************************
-* The tint shader compiler has encountered an unexpected error. *
-* *
-* Please help us fix this issue by submitting a bug report at *
-* crbug.com/tint with the source program that triggered the bug. *
-********************************************************************
+RWByteAddressBuffer prevent_dce : register(u0);
+
+float3 subgroupBroadcast_912ff5() {
+ float3 arg_0 = (1.0f).xxx;
+ float3 res = WaveReadLaneAt(arg_0, 1u);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupBroadcast_912ff5()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001EAC6861870(5,16-40): error X3004: undeclared identifier 'WaveReadLaneAt'
+
diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/912ff5.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/912ff5.wgsl.expected.ir.dxc.hlsl
index 10dbeda..3bec826 100644
--- a/test/tint/builtins/gen/var/subgroupBroadcast/912ff5.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupBroadcast/912ff5.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupBroadcast_912ff5()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store3(0u, asuint(subgroupBroadcast_912ff5()));
diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/b7e93b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/b7e93b.wgsl.expected.fxc.hlsl
index 9f667dd..b4f143f 100644
--- a/test/tint/builtins/gen/var/subgroupBroadcast/b7e93b.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupBroadcast/b7e93b.wgsl.expected.fxc.hlsl
@@ -1,9 +1,18 @@
SKIP: FAILED
-/build/dawn/src/tint/lang/hlsl/writer/ast_printer/ast_printer.cc:2510 internal compiler error: TINT_UNREACHABLE unexpected subgroup builtin type subgroupBroadcast
-********************************************************************
-* The tint shader compiler has encountered an unexpected error. *
-* *
-* Please help us fix this issue by submitting a bug report at *
-* crbug.com/tint with the source program that triggered the bug. *
-********************************************************************
+RWByteAddressBuffer prevent_dce : register(u0);
+
+float4 subgroupBroadcast_b7e93b() {
+ float4 arg_0 = (1.0f).xxxx;
+ float4 res = WaveReadLaneAt(arg_0, 1u);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupBroadcast_b7e93b()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000011B9698C750(5,16-40): error X3004: undeclared identifier 'WaveReadLaneAt'
+
diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/b7e93b.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/b7e93b.wgsl.expected.ir.dxc.hlsl
index 692042a..3250311 100644
--- a/test/tint/builtins/gen/var/subgroupBroadcast/b7e93b.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupBroadcast/b7e93b.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupBroadcast_b7e93b()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store4(0u, asuint(subgroupBroadcast_b7e93b()));
diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/c36fe1.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/c36fe1.wgsl.expected.fxc.hlsl
index 9f667dd..9dcdf41 100644
--- a/test/tint/builtins/gen/var/subgroupBroadcast/c36fe1.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupBroadcast/c36fe1.wgsl.expected.fxc.hlsl
@@ -1,9 +1,18 @@
SKIP: FAILED
-/build/dawn/src/tint/lang/hlsl/writer/ast_printer/ast_printer.cc:2510 internal compiler error: TINT_UNREACHABLE unexpected subgroup builtin type subgroupBroadcast
-********************************************************************
-* The tint shader compiler has encountered an unexpected error. *
-* *
-* Please help us fix this issue by submitting a bug report at *
-* crbug.com/tint with the source program that triggered the bug. *
-********************************************************************
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint subgroupBroadcast_c36fe1() {
+ uint arg_0 = 1u;
+ uint res = WaveReadLaneAt(arg_0, 1u);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupBroadcast_c36fe1()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001CF1DB58740(5,14-38): error X3004: undeclared identifier 'WaveReadLaneAt'
+
diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/c36fe1.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/c36fe1.wgsl.expected.ir.dxc.hlsl
index c3dcbbc..e89162d 100644
--- a/test/tint/builtins/gen/var/subgroupBroadcast/c36fe1.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupBroadcast/c36fe1.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store(0u, subgroupBroadcast_c36fe1());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store(0u, subgroupBroadcast_c36fe1());
diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/e275c8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/e275c8.wgsl.expected.fxc.hlsl
index 9f667dd..ea4ba8b 100644
--- a/test/tint/builtins/gen/var/subgroupBroadcast/e275c8.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupBroadcast/e275c8.wgsl.expected.fxc.hlsl
@@ -1,9 +1,18 @@
SKIP: FAILED
-/build/dawn/src/tint/lang/hlsl/writer/ast_printer/ast_printer.cc:2510 internal compiler error: TINT_UNREACHABLE unexpected subgroup builtin type subgroupBroadcast
-********************************************************************
-* The tint shader compiler has encountered an unexpected error. *
-* *
-* Please help us fix this issue by submitting a bug report at *
-* crbug.com/tint with the source program that triggered the bug. *
-********************************************************************
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int3 subgroupBroadcast_e275c8() {
+ int3 arg_0 = (1).xxx;
+ int3 res = WaveReadLaneAt(arg_0, 1u);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupBroadcast_e275c8()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000002304F8DF590(5,14-38): error X3004: undeclared identifier 'WaveReadLaneAt'
+
diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/e275c8.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/e275c8.wgsl.expected.ir.dxc.hlsl
index e5a54a3..7e1b164 100644
--- a/test/tint/builtins/gen/var/subgroupBroadcast/e275c8.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupBroadcast/e275c8.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupBroadcast_e275c8()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store3(0u, asuint(subgroupBroadcast_e275c8()));
diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/f637f9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/f637f9.wgsl.expected.fxc.hlsl
index 9f667dd..da1ba51 100644
--- a/test/tint/builtins/gen/var/subgroupBroadcast/f637f9.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupBroadcast/f637f9.wgsl.expected.fxc.hlsl
@@ -1,9 +1,18 @@
SKIP: FAILED
-/build/dawn/src/tint/lang/hlsl/writer/ast_printer/ast_printer.cc:2510 internal compiler error: TINT_UNREACHABLE unexpected subgroup builtin type subgroupBroadcast
-********************************************************************
-* The tint shader compiler has encountered an unexpected error. *
-* *
-* Please help us fix this issue by submitting a bug report at *
-* crbug.com/tint with the source program that triggered the bug. *
-********************************************************************
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int4 subgroupBroadcast_f637f9() {
+ int4 arg_0 = (1).xxxx;
+ int4 res = WaveReadLaneAt(arg_0, 1u);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupBroadcast_f637f9()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000247A6AEF3F0(5,14-38): error X3004: undeclared identifier 'WaveReadLaneAt'
+
diff --git a/test/tint/builtins/gen/var/subgroupBroadcast/f637f9.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupBroadcast/f637f9.wgsl.expected.ir.dxc.hlsl
index 5336faa..9a3ca31 100644
--- a/test/tint/builtins/gen/var/subgroupBroadcast/f637f9.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupBroadcast/f637f9.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupBroadcast_f637f9()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store4(0u, asuint(subgroupBroadcast_f637f9()));
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/01de08.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/01de08.wgsl.expected.fxc.hlsl
index 9d239f6..32929cc 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/01de08.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/01de08.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store<vector<float16_t, 2> >(0u, subgroupExclusiveAdd_01de08());
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000021B04B460F0(3,8-16): error X3000: syntax error: unexpected token 'float16_t'
+
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/01de08.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/01de08.wgsl.expected.ir.dxc.hlsl
index fd6f146..9e985b3 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/01de08.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/01de08.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<vector<float16_t, 2> >(0u, subgroupExclusiveAdd_01de08());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<vector<float16_t, 2> >(0u, subgroupExclusiveAdd_01de08());
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/01de08.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/01de08.wgsl.expected.ir.msl
index 05f536f..93862b0 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/01de08.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/01de08.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device half2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_01de08();
+}
+
kernel void compute_main(device half2* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_01de08();
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/0ff95a.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/0ff95a.wgsl.expected.fxc.hlsl
index d081b72..ee7f6d0 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/0ff95a.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/0ff95a.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store3(0u, asuint(subgroupExclusiveAdd_0ff95a()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000023915FAC730(5,15-34): error X3004: undeclared identifier 'WavePrefixSum'
+
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/0ff95a.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/0ff95a.wgsl.expected.ir.dxc.hlsl
index 015b41b..ae05244 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/0ff95a.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/0ff95a.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store3(0u, subgroupExclusiveAdd_0ff95a());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store3(0u, subgroupExclusiveAdd_0ff95a());
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/0ff95a.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/0ff95a.wgsl.expected.ir.msl
index 0b59b35..93b57bd 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/0ff95a.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/0ff95a.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device uint3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_0ff95a();
+}
+
kernel void compute_main(device uint3* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_0ff95a();
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/406ab4.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/406ab4.wgsl.expected.fxc.hlsl
index 90ffc25..e66eb0e 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/406ab4.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/406ab4.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store4(0u, asuint(subgroupExclusiveAdd_406ab4()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001DCC507C5C0(5,14-33): error X3004: undeclared identifier 'WavePrefixSum'
+
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/406ab4.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/406ab4.wgsl.expected.ir.dxc.hlsl
index d21b0fd..66dc05b 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/406ab4.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/406ab4.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupExclusiveAdd_406ab4()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store4(0u, asuint(subgroupExclusiveAdd_406ab4()));
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/406ab4.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/406ab4.wgsl.expected.ir.msl
index 77a2827..e3821d9 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/406ab4.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/406ab4.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device int4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_406ab4();
+}
+
kernel void compute_main(device int4* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_406ab4();
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/41cfde.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/41cfde.wgsl.expected.fxc.hlsl
index 5fa9c28..04a5e91 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/41cfde.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/41cfde.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store3(0u, asuint(subgroupExclusiveAdd_41cfde()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000185503CC780(5,16-35): error X3004: undeclared identifier 'WavePrefixSum'
+
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/41cfde.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/41cfde.wgsl.expected.ir.dxc.hlsl
index 10eb41c..019ad46 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/41cfde.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/41cfde.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupExclusiveAdd_41cfde()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store3(0u, asuint(subgroupExclusiveAdd_41cfde()));
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/41cfde.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/41cfde.wgsl.expected.ir.msl
index 46931b4..3da7919 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/41cfde.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/41cfde.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device float3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_41cfde();
+}
+
kernel void compute_main(device float3* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_41cfde();
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/42684c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/42684c.wgsl.expected.fxc.hlsl
index 6a11ac5..c54fe37 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/42684c.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/42684c.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store(0u, asuint(subgroupExclusiveAdd_42684c()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000002530D1F3020(5,14-33): error X3004: undeclared identifier 'WavePrefixSum'
+
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/42684c.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/42684c.wgsl.expected.ir.dxc.hlsl
index ddd18ab..1384ea9 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/42684c.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/42684c.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store(0u, subgroupExclusiveAdd_42684c());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store(0u, subgroupExclusiveAdd_42684c());
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/42684c.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/42684c.wgsl.expected.ir.msl
index 0cbeb50..e6b8097 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/42684c.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/42684c.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device uint* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_42684c();
+}
+
kernel void compute_main(device uint* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_42684c();
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/48acea.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/48acea.wgsl.expected.fxc.hlsl
index 2e6431c..d070407 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/48acea.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/48acea.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store2(0u, asuint(subgroupExclusiveAdd_48acea()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001CB9AB514C0(5,15-34): error X3004: undeclared identifier 'WavePrefixSum'
+
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/48acea.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/48acea.wgsl.expected.ir.dxc.hlsl
index 49f2626..3f8996e 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/48acea.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/48acea.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store2(0u, subgroupExclusiveAdd_48acea());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store2(0u, subgroupExclusiveAdd_48acea());
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/48acea.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/48acea.wgsl.expected.ir.msl
index 29d8438..10e78f2 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/48acea.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/48acea.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device uint2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_48acea();
+}
+
kernel void compute_main(device uint2* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_48acea();
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/4a1568.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/4a1568.wgsl.expected.fxc.hlsl
index 7e2c5bb..a3a5fc1 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/4a1568.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/4a1568.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store<float16_t>(0u, subgroupExclusiveAdd_4a1568());
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000002893BF7CE00(3,1-9): error X3000: unrecognized identifier 'float16_t'
+
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/4a1568.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/4a1568.wgsl.expected.ir.dxc.hlsl
index 9900519..504aec6 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/4a1568.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/4a1568.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<float16_t>(0u, subgroupExclusiveAdd_4a1568());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<float16_t>(0u, subgroupExclusiveAdd_4a1568());
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/4a1568.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/4a1568.wgsl.expected.ir.msl
index 85ce507..e4e1830 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/4a1568.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/4a1568.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device half* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_4a1568();
+}
+
kernel void compute_main(device half* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_4a1568();
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/4c8024.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/4c8024.wgsl.expected.fxc.hlsl
index 1404144..9a25cef 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/4c8024.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/4c8024.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store2(0u, asuint(subgroupExclusiveAdd_4c8024()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001BD577EF2F0(5,16-35): error X3004: undeclared identifier 'WavePrefixSum'
+
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/4c8024.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/4c8024.wgsl.expected.ir.dxc.hlsl
index f2df63a..4c27376 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/4c8024.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/4c8024.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupExclusiveAdd_4c8024()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store2(0u, asuint(subgroupExclusiveAdd_4c8024()));
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/4c8024.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/4c8024.wgsl.expected.ir.msl
index ffcc35f..019c36e 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/4c8024.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/4c8024.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device float2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_4c8024();
+}
+
kernel void compute_main(device float2* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_4c8024();
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/71ad0f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/71ad0f.wgsl.expected.fxc.hlsl
index c6d5ea4..427b2b1 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/71ad0f.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/71ad0f.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store4(0u, asuint(subgroupExclusiveAdd_71ad0f()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000019D312F7D40(5,16-35): error X3004: undeclared identifier 'WavePrefixSum'
+
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/71ad0f.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/71ad0f.wgsl.expected.ir.dxc.hlsl
index 3c6b4c5..c709842 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/71ad0f.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/71ad0f.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupExclusiveAdd_71ad0f()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store4(0u, asuint(subgroupExclusiveAdd_71ad0f()));
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/71ad0f.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/71ad0f.wgsl.expected.ir.msl
index b1ed3c5..16bce20 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/71ad0f.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/71ad0f.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device float4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_71ad0f();
+}
+
kernel void compute_main(device float4* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_71ad0f();
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/95e984.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/95e984.wgsl.expected.fxc.hlsl
index c67b9ab..b6dd6a2 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/95e984.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/95e984.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store<vector<float16_t, 4> >(0u, subgroupExclusiveAdd_95e984());
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000002C70D7B6B10(3,8-16): error X3000: syntax error: unexpected token 'float16_t'
+
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/95e984.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/95e984.wgsl.expected.ir.dxc.hlsl
index d7a10a4..7563612 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/95e984.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/95e984.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<vector<float16_t, 4> >(0u, subgroupExclusiveAdd_95e984());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<vector<float16_t, 4> >(0u, subgroupExclusiveAdd_95e984());
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/95e984.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/95e984.wgsl.expected.ir.msl
index 0bff85d..cc9d19f 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/95e984.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/95e984.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device half4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_95e984();
+}
+
kernel void compute_main(device half4* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_95e984();
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/967e38.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/967e38.wgsl.expected.fxc.hlsl
index b460c913..a1fc755 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/967e38.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/967e38.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store(0u, asuint(subgroupExclusiveAdd_967e38()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000002CD1519A860(5,15-34): error X3004: undeclared identifier 'WavePrefixSum'
+
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/967e38.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/967e38.wgsl.expected.ir.dxc.hlsl
index ffea437..d3c2f9c 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/967e38.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/967e38.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupExclusiveAdd_967e38()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store(0u, asuint(subgroupExclusiveAdd_967e38()));
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/967e38.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/967e38.wgsl.expected.ir.msl
index 8d70f30..65a2efa 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/967e38.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/967e38.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device float* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_967e38();
+}
+
kernel void compute_main(device float* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_967e38();
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/b0c261.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/b0c261.wgsl.expected.fxc.hlsl
index d991977..0ca6f53 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/b0c261.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/b0c261.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store(0u, asuint(subgroupExclusiveAdd_b0c261()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000015B056AC640(5,13-32): error X3004: undeclared identifier 'WavePrefixSum'
+
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/b0c261.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/b0c261.wgsl.expected.ir.dxc.hlsl
index 4c46bfc..a4bab63 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/b0c261.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/b0c261.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupExclusiveAdd_b0c261()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store(0u, asuint(subgroupExclusiveAdd_b0c261()));
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/b0c261.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/b0c261.wgsl.expected.ir.msl
index 4915122..1ea569e 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/b0c261.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/b0c261.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device int* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_b0c261();
+}
+
kernel void compute_main(device int* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_b0c261();
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/c08160.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/c08160.wgsl.expected.fxc.hlsl
index 8df1d15..d1c2ada 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/c08160.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/c08160.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store3(0u, asuint(subgroupExclusiveAdd_c08160()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001E796C6F3F0(5,14-33): error X3004: undeclared identifier 'WavePrefixSum'
+
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/c08160.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/c08160.wgsl.expected.ir.dxc.hlsl
index 4c132cb..ddd83c4 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/c08160.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/c08160.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupExclusiveAdd_c08160()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store3(0u, asuint(subgroupExclusiveAdd_c08160()));
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/c08160.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/c08160.wgsl.expected.ir.msl
index dea6388..226314b 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/c08160.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/c08160.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device int3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_c08160();
+}
+
kernel void compute_main(device int3* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_c08160();
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/e58e23.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/e58e23.wgsl.expected.fxc.hlsl
index 45d4452..b3653cc 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/e58e23.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/e58e23.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store<vector<float16_t, 3> >(0u, subgroupExclusiveAdd_e58e23());
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000218B4A18C50(3,8-16): error X3000: syntax error: unexpected token 'float16_t'
+
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/e58e23.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/e58e23.wgsl.expected.ir.dxc.hlsl
index 3478d7a..2a274e5 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/e58e23.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/e58e23.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<vector<float16_t, 3> >(0u, subgroupExclusiveAdd_e58e23());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<vector<float16_t, 3> >(0u, subgroupExclusiveAdd_e58e23());
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/e58e23.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/e58e23.wgsl.expected.ir.msl
index 13dd3e9..5571fc2 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/e58e23.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/e58e23.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device half3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_e58e23();
+}
+
kernel void compute_main(device half3* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_e58e23();
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/ec300f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/ec300f.wgsl.expected.fxc.hlsl
index 96b7118..0fb9ad4 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/ec300f.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/ec300f.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store4(0u, asuint(subgroupExclusiveAdd_ec300f()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000002EF15578210(5,15-34): error X3004: undeclared identifier 'WavePrefixSum'
+
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/ec300f.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/ec300f.wgsl.expected.ir.dxc.hlsl
index 45f30e0..b185a08 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/ec300f.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/ec300f.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store4(0u, subgroupExclusiveAdd_ec300f());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store4(0u, subgroupExclusiveAdd_ec300f());
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/ec300f.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/ec300f.wgsl.expected.ir.msl
index 01f2777..857c0b9 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/ec300f.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/ec300f.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device uint4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_ec300f();
+}
+
kernel void compute_main(device uint4* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_ec300f();
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/f0f712.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/f0f712.wgsl.expected.fxc.hlsl
index fd52edf..bad746d 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/f0f712.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/f0f712.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store2(0u, asuint(subgroupExclusiveAdd_f0f712()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001A5F2BA0120(5,14-33): error X3004: undeclared identifier 'WavePrefixSum'
+
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/f0f712.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/f0f712.wgsl.expected.ir.dxc.hlsl
index 913c7a3..5e752ec 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/f0f712.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/f0f712.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupExclusiveAdd_f0f712()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store2(0u, asuint(subgroupExclusiveAdd_f0f712()));
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveAdd/f0f712.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupExclusiveAdd/f0f712.wgsl.expected.ir.msl
index 2eeecda..d486110 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveAdd/f0f712.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveAdd/f0f712.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device int2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_f0f712();
+}
+
kernel void compute_main(device int2* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveAdd_f0f712();
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/000b92.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/000b92.wgsl.expected.fxc.hlsl
index e5c2e9e..302ce58 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/000b92.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/000b92.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store4(0u, asuint(subgroupExclusiveMul_000b92()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001777B86C6C0(5,15-38): error X3004: undeclared identifier 'WavePrefixProduct'
+
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/000b92.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/000b92.wgsl.expected.ir.dxc.hlsl
index 714436b..dd2d775 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/000b92.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/000b92.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store4(0u, subgroupExclusiveMul_000b92());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store4(0u, subgroupExclusiveMul_000b92());
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/000b92.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupExclusiveMul/000b92.wgsl.expected.ir.msl
index 3c3fe00..c7cb885 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/000b92.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/000b92.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device uint4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveMul_000b92();
+}
+
kernel void compute_main(device uint4* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveMul_000b92();
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/019660.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/019660.wgsl.expected.fxc.hlsl
index 88fd682..e373375 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/019660.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/019660.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store4(0u, asuint(subgroupExclusiveMul_019660()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001FE2E29D430(5,14-37): error X3004: undeclared identifier 'WavePrefixProduct'
+
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/019660.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/019660.wgsl.expected.ir.dxc.hlsl
index 214e7c3..54c9b01 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/019660.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/019660.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupExclusiveMul_019660()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store4(0u, asuint(subgroupExclusiveMul_019660()));
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/019660.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupExclusiveMul/019660.wgsl.expected.ir.msl
index 6230845..76c1311 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/019660.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/019660.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device int4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveMul_019660();
+}
+
kernel void compute_main(device int4* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveMul_019660();
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/0a04d5.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/0a04d5.wgsl.expected.fxc.hlsl
index 20808de..5ab948a 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/0a04d5.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/0a04d5.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store3(0u, asuint(subgroupExclusiveMul_0a04d5()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000235DDB1D430(5,16-39): error X3004: undeclared identifier 'WavePrefixProduct'
+
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/0a04d5.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/0a04d5.wgsl.expected.ir.dxc.hlsl
index 3aeabb4..a3dbfbc 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/0a04d5.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/0a04d5.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupExclusiveMul_0a04d5()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store3(0u, asuint(subgroupExclusiveMul_0a04d5()));
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/0a04d5.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupExclusiveMul/0a04d5.wgsl.expected.ir.msl
index c98ef0f..ff0b97e 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/0a04d5.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/0a04d5.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device float3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveMul_0a04d5();
+}
+
kernel void compute_main(device float3* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveMul_0a04d5();
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/13ba26.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/13ba26.wgsl.expected.fxc.hlsl
index 102c02f..ce31df8 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/13ba26.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/13ba26.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store<vector<float16_t, 3> >(0u, subgroupExclusiveMul_13ba26());
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000002043BD7D1A0(3,8-16): error X3000: syntax error: unexpected token 'float16_t'
+
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/13ba26.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/13ba26.wgsl.expected.ir.dxc.hlsl
index 10d586b..c984526 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/13ba26.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/13ba26.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<vector<float16_t, 3> >(0u, subgroupExclusiveMul_13ba26());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<vector<float16_t, 3> >(0u, subgroupExclusiveMul_13ba26());
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/13ba26.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupExclusiveMul/13ba26.wgsl.expected.ir.msl
index 78cb3c0..98320a3 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/13ba26.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/13ba26.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device half3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveMul_13ba26();
+}
+
kernel void compute_main(device half3* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveMul_13ba26();
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/25d1b9.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/25d1b9.wgsl.expected.fxc.hlsl
index efcdd64..366636d 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/25d1b9.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/25d1b9.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store2(0u, asuint(subgroupExclusiveMul_25d1b9()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001E3784F6740(5,16-39): error X3004: undeclared identifier 'WavePrefixProduct'
+
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/25d1b9.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/25d1b9.wgsl.expected.ir.dxc.hlsl
index a21a009..da91405 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/25d1b9.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/25d1b9.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupExclusiveMul_25d1b9()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store2(0u, asuint(subgroupExclusiveMul_25d1b9()));
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/25d1b9.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupExclusiveMul/25d1b9.wgsl.expected.ir.msl
index 05ddc75..f7579ea 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/25d1b9.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/25d1b9.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device float2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveMul_25d1b9();
+}
+
kernel void compute_main(device float2* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveMul_25d1b9();
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/4525a3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/4525a3.wgsl.expected.fxc.hlsl
index 9e7370d..25f0373 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/4525a3.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/4525a3.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store2(0u, asuint(subgroupExclusiveMul_4525a3()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001AA39901970(5,14-37): error X3004: undeclared identifier 'WavePrefixProduct'
+
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/4525a3.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/4525a3.wgsl.expected.ir.dxc.hlsl
index 62994f9..dcadd35 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/4525a3.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/4525a3.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupExclusiveMul_4525a3()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store2(0u, asuint(subgroupExclusiveMul_4525a3()));
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/4525a3.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupExclusiveMul/4525a3.wgsl.expected.ir.msl
index 5fcc501..fa6d827 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/4525a3.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/4525a3.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device int2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveMul_4525a3();
+}
+
kernel void compute_main(device int2* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveMul_4525a3();
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/6f431e.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/6f431e.wgsl.expected.fxc.hlsl
index d0987cc..5ff4f26 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/6f431e.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/6f431e.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store<float16_t>(0u, subgroupExclusiveMul_6f431e());
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001C0F2921970(3,1-9): error X3000: unrecognized identifier 'float16_t'
+
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/6f431e.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/6f431e.wgsl.expected.ir.dxc.hlsl
index 93869c9..721df2f 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/6f431e.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/6f431e.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<float16_t>(0u, subgroupExclusiveMul_6f431e());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<float16_t>(0u, subgroupExclusiveMul_6f431e());
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/6f431e.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupExclusiveMul/6f431e.wgsl.expected.ir.msl
index b592cca..cc1d7ed 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/6f431e.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/6f431e.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device half* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveMul_6f431e();
+}
+
kernel void compute_main(device half* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveMul_6f431e();
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/7b5f57.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/7b5f57.wgsl.expected.fxc.hlsl
index b5ea6bb..f9b8be4 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/7b5f57.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/7b5f57.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store4(0u, asuint(subgroupExclusiveMul_7b5f57()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001868919D5F0(5,16-39): error X3004: undeclared identifier 'WavePrefixProduct'
+
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/7b5f57.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/7b5f57.wgsl.expected.ir.dxc.hlsl
index 4d5ba9f..659bda5 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/7b5f57.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/7b5f57.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupExclusiveMul_7b5f57()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store4(0u, asuint(subgroupExclusiveMul_7b5f57()));
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/7b5f57.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupExclusiveMul/7b5f57.wgsl.expected.ir.msl
index a632666..14a0cd9 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/7b5f57.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/7b5f57.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device float4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveMul_7b5f57();
+}
+
kernel void compute_main(device float4* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveMul_7b5f57();
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/87f23e.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/87f23e.wgsl.expected.fxc.hlsl
index fc2491a..da1c1eb 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/87f23e.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/87f23e.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store3(0u, asuint(subgroupExclusiveMul_87f23e()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000027E5CD61490(5,14-37): error X3004: undeclared identifier 'WavePrefixProduct'
+
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/87f23e.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/87f23e.wgsl.expected.ir.dxc.hlsl
index 49600de..6e79c7f 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/87f23e.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/87f23e.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupExclusiveMul_87f23e()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store3(0u, asuint(subgroupExclusiveMul_87f23e()));
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/87f23e.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupExclusiveMul/87f23e.wgsl.expected.ir.msl
index 8496c29..2f0bf23 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/87f23e.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/87f23e.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device int3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveMul_87f23e();
+}
+
kernel void compute_main(device int3* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveMul_87f23e();
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/98b2e4.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/98b2e4.wgsl.expected.fxc.hlsl
index 4d73d51..7e74ebe 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/98b2e4.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/98b2e4.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store(0u, asuint(subgroupExclusiveMul_98b2e4()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000012F140BEFF0(5,15-38): error X3004: undeclared identifier 'WavePrefixProduct'
+
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/98b2e4.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/98b2e4.wgsl.expected.ir.dxc.hlsl
index 24860fb..908c962 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/98b2e4.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/98b2e4.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupExclusiveMul_98b2e4()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store(0u, asuint(subgroupExclusiveMul_98b2e4()));
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/98b2e4.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupExclusiveMul/98b2e4.wgsl.expected.ir.msl
index 087c46b..6947e9d 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/98b2e4.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/98b2e4.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device float* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveMul_98b2e4();
+}
+
kernel void compute_main(device float* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveMul_98b2e4();
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/a07956.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/a07956.wgsl.expected.fxc.hlsl
index bd78228..52980f5 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/a07956.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/a07956.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store<vector<float16_t, 4> >(0u, subgroupExclusiveMul_a07956());
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001ABD42A6D10(3,8-16): error X3000: syntax error: unexpected token 'float16_t'
+
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/a07956.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/a07956.wgsl.expected.ir.dxc.hlsl
index 3324955..e04feb7 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/a07956.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/a07956.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<vector<float16_t, 4> >(0u, subgroupExclusiveMul_a07956());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<vector<float16_t, 4> >(0u, subgroupExclusiveMul_a07956());
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/a07956.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupExclusiveMul/a07956.wgsl.expected.ir.msl
index 4e9fb2c..11be3a4 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/a07956.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/a07956.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device half4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveMul_a07956();
+}
+
kernel void compute_main(device half4* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveMul_a07956();
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/a23002.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/a23002.wgsl.expected.fxc.hlsl
index e5b5034..0916ebf 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/a23002.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/a23002.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store(0u, asuint(subgroupExclusiveMul_a23002()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000002022064D400(5,13-36): error X3004: undeclared identifier 'WavePrefixProduct'
+
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/a23002.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/a23002.wgsl.expected.ir.dxc.hlsl
index e612cc9..3dc6fda 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/a23002.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/a23002.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupExclusiveMul_a23002()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store(0u, asuint(subgroupExclusiveMul_a23002()));
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/a23002.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupExclusiveMul/a23002.wgsl.expected.ir.msl
index 3fa153e..be27939 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/a23002.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/a23002.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device int* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveMul_a23002();
+}
+
kernel void compute_main(device int* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveMul_a23002();
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/d1d490.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/d1d490.wgsl.expected.fxc.hlsl
index e2447d3..24eacaf 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/d1d490.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/d1d490.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store2(0u, asuint(subgroupExclusiveMul_d1d490()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000117D6E9D1B0(5,15-38): error X3004: undeclared identifier 'WavePrefixProduct'
+
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/d1d490.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/d1d490.wgsl.expected.ir.dxc.hlsl
index 3b0ba73..8144d7e 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/d1d490.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/d1d490.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store2(0u, subgroupExclusiveMul_d1d490());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store2(0u, subgroupExclusiveMul_d1d490());
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/d1d490.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupExclusiveMul/d1d490.wgsl.expected.ir.msl
index b4ac97a..c5d6cb9 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/d1d490.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/d1d490.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device uint2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveMul_d1d490();
+}
+
kernel void compute_main(device uint2* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveMul_d1d490();
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/dc51f8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/dc51f8.wgsl.expected.fxc.hlsl
index 17c12a0..bb78789 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/dc51f8.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/dc51f8.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store(0u, asuint(subgroupExclusiveMul_dc51f8()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001DD5D333B80(5,14-37): error X3004: undeclared identifier 'WavePrefixProduct'
+
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/dc51f8.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/dc51f8.wgsl.expected.ir.dxc.hlsl
index 58c760e..67bcc4f 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/dc51f8.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/dc51f8.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store(0u, subgroupExclusiveMul_dc51f8());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store(0u, subgroupExclusiveMul_dc51f8());
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/dc51f8.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupExclusiveMul/dc51f8.wgsl.expected.ir.msl
index 0135dc7..77f8a6e 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/dc51f8.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/dc51f8.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device uint* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveMul_dc51f8();
+}
+
kernel void compute_main(device uint* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveMul_dc51f8();
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/e88d1c.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/e88d1c.wgsl.expected.fxc.hlsl
index 7e07267..e1d2cf1 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/e88d1c.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/e88d1c.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store<vector<float16_t, 2> >(0u, subgroupExclusiveMul_e88d1c());
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000143BC5A8A30(3,8-16): error X3000: syntax error: unexpected token 'float16_t'
+
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/e88d1c.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/e88d1c.wgsl.expected.ir.dxc.hlsl
index 06d6545..39d1981 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/e88d1c.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/e88d1c.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<vector<float16_t, 2> >(0u, subgroupExclusiveMul_e88d1c());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<vector<float16_t, 2> >(0u, subgroupExclusiveMul_e88d1c());
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/e88d1c.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupExclusiveMul/e88d1c.wgsl.expected.ir.msl
index cd8132d..467dbc7 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/e88d1c.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/e88d1c.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device half2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveMul_e88d1c();
+}
+
kernel void compute_main(device half2* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveMul_e88d1c();
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/f039f4.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/f039f4.wgsl.expected.fxc.hlsl
index f11beb8..43392ab 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/f039f4.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/f039f4.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store3(0u, asuint(subgroupExclusiveMul_f039f4()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000026D3A9EEFF0(5,15-38): error X3004: undeclared identifier 'WavePrefixProduct'
+
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/f039f4.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupExclusiveMul/f039f4.wgsl.expected.ir.dxc.hlsl
index 04dea87..f2625d2 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/f039f4.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/f039f4.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store3(0u, subgroupExclusiveMul_f039f4());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store3(0u, subgroupExclusiveMul_f039f4());
diff --git a/test/tint/builtins/gen/var/subgroupExclusiveMul/f039f4.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupExclusiveMul/f039f4.wgsl.expected.ir.msl
index 79899c0..3bf2f54 100644
--- a/test/tint/builtins/gen/var/subgroupExclusiveMul/f039f4.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupExclusiveMul/f039f4.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device uint3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupExclusiveMul_f039f4();
+}
+
kernel void compute_main(device uint3* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupExclusiveMul_f039f4();
diff --git a/test/tint/builtins/gen/var/subgroupMul/0de9d3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/0de9d3.wgsl.expected.fxc.hlsl
index 8cc60a8..b11ee0f 100644
--- a/test/tint/builtins/gen/var/subgroupMul/0de9d3.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupMul/0de9d3.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store(0u, asuint(subgroupMul_0de9d3()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000190E3105D30(5,15-38): error X3004: undeclared identifier 'WaveActiveProduct'
+
diff --git a/test/tint/builtins/gen/var/subgroupMul/0de9d3.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/0de9d3.wgsl.expected.ir.dxc.hlsl
index 6ce06cd..bfc8b5e 100644
--- a/test/tint/builtins/gen/var/subgroupMul/0de9d3.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupMul/0de9d3.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupMul_0de9d3()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store(0u, asuint(subgroupMul_0de9d3()));
diff --git a/test/tint/builtins/gen/var/subgroupMul/0de9d3.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupMul/0de9d3.wgsl.expected.ir.msl
index e227c90..aa86ec6 100644
--- a/test/tint/builtins/gen/var/subgroupMul/0de9d3.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupMul/0de9d3.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device float* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupMul_0de9d3();
+}
+
kernel void compute_main(device float* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupMul_0de9d3();
diff --git a/test/tint/builtins/gen/var/subgroupMul/2941a2.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/2941a2.wgsl.expected.fxc.hlsl
index 407c1be..490cf27 100644
--- a/test/tint/builtins/gen/var/subgroupMul/2941a2.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupMul/2941a2.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store<float16_t>(0u, subgroupMul_2941a2());
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000011FF4B81950(3,1-9): error X3000: unrecognized identifier 'float16_t'
+
diff --git a/test/tint/builtins/gen/var/subgroupMul/2941a2.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/2941a2.wgsl.expected.ir.dxc.hlsl
index 187601e..6a31d38 100644
--- a/test/tint/builtins/gen/var/subgroupMul/2941a2.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupMul/2941a2.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<float16_t>(0u, subgroupMul_2941a2());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<float16_t>(0u, subgroupMul_2941a2());
diff --git a/test/tint/builtins/gen/var/subgroupMul/2941a2.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupMul/2941a2.wgsl.expected.ir.msl
index 982234f..69b1513 100644
--- a/test/tint/builtins/gen/var/subgroupMul/2941a2.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupMul/2941a2.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device half* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupMul_2941a2();
+}
+
kernel void compute_main(device half* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupMul_2941a2();
diff --git a/test/tint/builtins/gen/var/subgroupMul/3fe886.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/3fe886.wgsl.expected.fxc.hlsl
index e3f222e..7392c5f 100644
--- a/test/tint/builtins/gen/var/subgroupMul/3fe886.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupMul/3fe886.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store(0u, asuint(subgroupMul_3fe886()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000017E9396C570(5,13-36): error X3004: undeclared identifier 'WaveActiveProduct'
+
diff --git a/test/tint/builtins/gen/var/subgroupMul/3fe886.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/3fe886.wgsl.expected.ir.dxc.hlsl
index 3ee77d8..5aa5900 100644
--- a/test/tint/builtins/gen/var/subgroupMul/3fe886.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupMul/3fe886.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupMul_3fe886()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store(0u, asuint(subgroupMul_3fe886()));
diff --git a/test/tint/builtins/gen/var/subgroupMul/3fe886.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupMul/3fe886.wgsl.expected.ir.msl
index 099a54d..5fdf86d 100644
--- a/test/tint/builtins/gen/var/subgroupMul/3fe886.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupMul/3fe886.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device int* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupMul_3fe886();
+}
+
kernel void compute_main(device int* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupMul_3fe886();
diff --git a/test/tint/builtins/gen/var/subgroupMul/4f8ee6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/4f8ee6.wgsl.expected.fxc.hlsl
index 15d935d..be530fe 100644
--- a/test/tint/builtins/gen/var/subgroupMul/4f8ee6.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupMul/4f8ee6.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store(0u, asuint(subgroupMul_4f8ee6()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000226A729C5D0(5,14-37): error X3004: undeclared identifier 'WaveActiveProduct'
+
diff --git a/test/tint/builtins/gen/var/subgroupMul/4f8ee6.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/4f8ee6.wgsl.expected.ir.dxc.hlsl
index f693a49..55a187d 100644
--- a/test/tint/builtins/gen/var/subgroupMul/4f8ee6.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupMul/4f8ee6.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store(0u, subgroupMul_4f8ee6());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store(0u, subgroupMul_4f8ee6());
diff --git a/test/tint/builtins/gen/var/subgroupMul/4f8ee6.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupMul/4f8ee6.wgsl.expected.ir.msl
index 82a0d89..2545ad6 100644
--- a/test/tint/builtins/gen/var/subgroupMul/4f8ee6.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupMul/4f8ee6.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device uint* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupMul_4f8ee6();
+}
+
kernel void compute_main(device uint* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupMul_4f8ee6();
diff --git a/test/tint/builtins/gen/var/subgroupMul/53aee2.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/53aee2.wgsl.expected.fxc.hlsl
index 215e334..3790744 100644
--- a/test/tint/builtins/gen/var/subgroupMul/53aee2.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupMul/53aee2.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store<vector<float16_t, 3> >(0u, subgroupMul_53aee2());
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000002D5AAE986E0(3,8-16): error X3000: syntax error: unexpected token 'float16_t'
+
diff --git a/test/tint/builtins/gen/var/subgroupMul/53aee2.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/53aee2.wgsl.expected.ir.dxc.hlsl
index 21cca2c..2426c9f 100644
--- a/test/tint/builtins/gen/var/subgroupMul/53aee2.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupMul/53aee2.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<vector<float16_t, 3> >(0u, subgroupMul_53aee2());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<vector<float16_t, 3> >(0u, subgroupMul_53aee2());
diff --git a/test/tint/builtins/gen/var/subgroupMul/53aee2.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupMul/53aee2.wgsl.expected.ir.msl
index 8ff7385..d2f128b 100644
--- a/test/tint/builtins/gen/var/subgroupMul/53aee2.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupMul/53aee2.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device half3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupMul_53aee2();
+}
+
kernel void compute_main(device half3* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupMul_53aee2();
diff --git a/test/tint/builtins/gen/var/subgroupMul/5a8c86.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/5a8c86.wgsl.expected.fxc.hlsl
index 4ebc627..531a5d1 100644
--- a/test/tint/builtins/gen/var/subgroupMul/5a8c86.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupMul/5a8c86.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store3(0u, asuint(subgroupMul_5a8c86()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000002DD34B2CA40(5,14-37): error X3004: undeclared identifier 'WaveActiveProduct'
+
diff --git a/test/tint/builtins/gen/var/subgroupMul/5a8c86.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/5a8c86.wgsl.expected.ir.dxc.hlsl
index ad72ca2..20652ec 100644
--- a/test/tint/builtins/gen/var/subgroupMul/5a8c86.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupMul/5a8c86.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupMul_5a8c86()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store3(0u, asuint(subgroupMul_5a8c86()));
diff --git a/test/tint/builtins/gen/var/subgroupMul/5a8c86.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupMul/5a8c86.wgsl.expected.ir.msl
index fcc76de..bcd01e3 100644
--- a/test/tint/builtins/gen/var/subgroupMul/5a8c86.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupMul/5a8c86.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device int3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupMul_5a8c86();
+}
+
kernel void compute_main(device int3* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupMul_5a8c86();
diff --git a/test/tint/builtins/gen/var/subgroupMul/66c813.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/66c813.wgsl.expected.fxc.hlsl
index 3220c0d..158c9b6 100644
--- a/test/tint/builtins/gen/var/subgroupMul/66c813.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupMul/66c813.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store4(0u, asuint(subgroupMul_66c813()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000150F0556020(5,16-39): error X3004: undeclared identifier 'WaveActiveProduct'
+
diff --git a/test/tint/builtins/gen/var/subgroupMul/66c813.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/66c813.wgsl.expected.ir.dxc.hlsl
index 2023c74..dd31e14 100644
--- a/test/tint/builtins/gen/var/subgroupMul/66c813.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupMul/66c813.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupMul_66c813()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store4(0u, asuint(subgroupMul_66c813()));
diff --git a/test/tint/builtins/gen/var/subgroupMul/66c813.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupMul/66c813.wgsl.expected.ir.msl
index 9a889e7..d236d07 100644
--- a/test/tint/builtins/gen/var/subgroupMul/66c813.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupMul/66c813.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device float4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupMul_66c813();
+}
+
kernel void compute_main(device float4* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupMul_66c813();
diff --git a/test/tint/builtins/gen/var/subgroupMul/6aaaf3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/6aaaf3.wgsl.expected.fxc.hlsl
index 534753b..d05b354 100644
--- a/test/tint/builtins/gen/var/subgroupMul/6aaaf3.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupMul/6aaaf3.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store<vector<float16_t, 2> >(0u, subgroupMul_6aaaf3());
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000017C08E7C980(3,8-16): error X3000: syntax error: unexpected token 'float16_t'
+
diff --git a/test/tint/builtins/gen/var/subgroupMul/6aaaf3.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/6aaaf3.wgsl.expected.ir.dxc.hlsl
index 99bf1bd..a131e94 100644
--- a/test/tint/builtins/gen/var/subgroupMul/6aaaf3.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupMul/6aaaf3.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<vector<float16_t, 2> >(0u, subgroupMul_6aaaf3());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<vector<float16_t, 2> >(0u, subgroupMul_6aaaf3());
diff --git a/test/tint/builtins/gen/var/subgroupMul/6aaaf3.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupMul/6aaaf3.wgsl.expected.ir.msl
index 2a7ce99..3ddc56e 100644
--- a/test/tint/builtins/gen/var/subgroupMul/6aaaf3.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupMul/6aaaf3.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device half2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupMul_6aaaf3();
+}
+
kernel void compute_main(device half2* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupMul_6aaaf3();
diff --git a/test/tint/builtins/gen/var/subgroupMul/93eccd.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/93eccd.wgsl.expected.fxc.hlsl
index cf5dbde..ea6f6fd 100644
--- a/test/tint/builtins/gen/var/subgroupMul/93eccd.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupMul/93eccd.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store3(0u, asuint(subgroupMul_93eccd()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000019046D0CA40(5,16-39): error X3004: undeclared identifier 'WaveActiveProduct'
+
diff --git a/test/tint/builtins/gen/var/subgroupMul/93eccd.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/93eccd.wgsl.expected.ir.dxc.hlsl
index 537475c..730840b 100644
--- a/test/tint/builtins/gen/var/subgroupMul/93eccd.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupMul/93eccd.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupMul_93eccd()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store3(0u, asuint(subgroupMul_93eccd()));
diff --git a/test/tint/builtins/gen/var/subgroupMul/93eccd.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupMul/93eccd.wgsl.expected.ir.msl
index e706376..6425b3b 100644
--- a/test/tint/builtins/gen/var/subgroupMul/93eccd.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupMul/93eccd.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device float3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupMul_93eccd();
+}
+
kernel void compute_main(device float3* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupMul_93eccd();
diff --git a/test/tint/builtins/gen/var/subgroupMul/d584a2.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/d584a2.wgsl.expected.fxc.hlsl
index 0695820..5ccc3f3 100644
--- a/test/tint/builtins/gen/var/subgroupMul/d584a2.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupMul/d584a2.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store2(0u, asuint(subgroupMul_d584a2()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001A764FA2270(5,14-37): error X3004: undeclared identifier 'WaveActiveProduct'
+
diff --git a/test/tint/builtins/gen/var/subgroupMul/d584a2.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/d584a2.wgsl.expected.ir.dxc.hlsl
index fe001de..5d39e33 100644
--- a/test/tint/builtins/gen/var/subgroupMul/d584a2.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupMul/d584a2.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupMul_d584a2()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store2(0u, asuint(subgroupMul_d584a2()));
diff --git a/test/tint/builtins/gen/var/subgroupMul/d584a2.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupMul/d584a2.wgsl.expected.ir.msl
index 3352874..0e74a6c 100644
--- a/test/tint/builtins/gen/var/subgroupMul/d584a2.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupMul/d584a2.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device int2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupMul_d584a2();
+}
+
kernel void compute_main(device int2* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupMul_d584a2();
diff --git a/test/tint/builtins/gen/var/subgroupMul/dc672a.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/dc672a.wgsl.expected.fxc.hlsl
index b10c495..801a013 100644
--- a/test/tint/builtins/gen/var/subgroupMul/dc672a.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupMul/dc672a.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store2(0u, asuint(subgroupMul_dc672a()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000012085D71720(5,15-38): error X3004: undeclared identifier 'WaveActiveProduct'
+
diff --git a/test/tint/builtins/gen/var/subgroupMul/dc672a.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/dc672a.wgsl.expected.ir.dxc.hlsl
index b02d28a..69c3731 100644
--- a/test/tint/builtins/gen/var/subgroupMul/dc672a.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupMul/dc672a.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store2(0u, subgroupMul_dc672a());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store2(0u, subgroupMul_dc672a());
diff --git a/test/tint/builtins/gen/var/subgroupMul/dc672a.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupMul/dc672a.wgsl.expected.ir.msl
index 800252f..e483420 100644
--- a/test/tint/builtins/gen/var/subgroupMul/dc672a.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupMul/dc672a.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device uint2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupMul_dc672a();
+}
+
kernel void compute_main(device uint2* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupMul_dc672a();
diff --git a/test/tint/builtins/gen/var/subgroupMul/dd1333.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/dd1333.wgsl.expected.fxc.hlsl
index bf2b5d1..59bcc91 100644
--- a/test/tint/builtins/gen/var/subgroupMul/dd1333.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupMul/dd1333.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store4(0u, asuint(subgroupMul_dd1333()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001D174918BC0(5,15-38): error X3004: undeclared identifier 'WaveActiveProduct'
+
diff --git a/test/tint/builtins/gen/var/subgroupMul/dd1333.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/dd1333.wgsl.expected.ir.dxc.hlsl
index 47dd237..37aee3d 100644
--- a/test/tint/builtins/gen/var/subgroupMul/dd1333.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupMul/dd1333.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store4(0u, subgroupMul_dd1333());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store4(0u, subgroupMul_dd1333());
diff --git a/test/tint/builtins/gen/var/subgroupMul/dd1333.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupMul/dd1333.wgsl.expected.ir.msl
index 9c06632..ed0d62a 100644
--- a/test/tint/builtins/gen/var/subgroupMul/dd1333.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupMul/dd1333.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device uint4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupMul_dd1333();
+}
+
kernel void compute_main(device uint4* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupMul_dd1333();
diff --git a/test/tint/builtins/gen/var/subgroupMul/f2ac5b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/f2ac5b.wgsl.expected.fxc.hlsl
index c9dddfc..31b4f19 100644
--- a/test/tint/builtins/gen/var/subgroupMul/f2ac5b.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupMul/f2ac5b.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store<vector<float16_t, 4> >(0u, subgroupMul_f2ac5b());
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x000002BF0EFF69B0(3,8-16): error X3000: syntax error: unexpected token 'float16_t'
+
diff --git a/test/tint/builtins/gen/var/subgroupMul/f2ac5b.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/f2ac5b.wgsl.expected.ir.dxc.hlsl
index 98ff3bf..b6a78d0 100644
--- a/test/tint/builtins/gen/var/subgroupMul/f2ac5b.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupMul/f2ac5b.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store<vector<float16_t, 4> >(0u, subgroupMul_f2ac5b());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store<vector<float16_t, 4> >(0u, subgroupMul_f2ac5b());
diff --git a/test/tint/builtins/gen/var/subgroupMul/f2ac5b.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupMul/f2ac5b.wgsl.expected.ir.msl
index 0112b17..6264574 100644
--- a/test/tint/builtins/gen/var/subgroupMul/f2ac5b.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupMul/f2ac5b.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device half4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupMul_f2ac5b();
+}
+
kernel void compute_main(device half4* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupMul_f2ac5b();
diff --git a/test/tint/builtins/gen/var/subgroupMul/f78398.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/f78398.wgsl.expected.fxc.hlsl
index d68b84a..23cf20a 100644
--- a/test/tint/builtins/gen/var/subgroupMul/f78398.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupMul/f78398.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store2(0u, asuint(subgroupMul_f78398()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000018B58DD0AC0(5,16-39): error X3004: undeclared identifier 'WaveActiveProduct'
+
diff --git a/test/tint/builtins/gen/var/subgroupMul/f78398.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/f78398.wgsl.expected.ir.dxc.hlsl
index a7a7644..4c71fcb 100644
--- a/test/tint/builtins/gen/var/subgroupMul/f78398.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupMul/f78398.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupMul_f78398()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store2(0u, asuint(subgroupMul_f78398()));
diff --git a/test/tint/builtins/gen/var/subgroupMul/f78398.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupMul/f78398.wgsl.expected.ir.msl
index 4e2b704..2241417 100644
--- a/test/tint/builtins/gen/var/subgroupMul/f78398.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupMul/f78398.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device float2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupMul_f78398();
+}
+
kernel void compute_main(device float2* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupMul_f78398();
diff --git a/test/tint/builtins/gen/var/subgroupMul/fa781b.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/fa781b.wgsl.expected.fxc.hlsl
index 72c6737..b5b5c32 100644
--- a/test/tint/builtins/gen/var/subgroupMul/fa781b.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupMul/fa781b.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store3(0u, asuint(subgroupMul_fa781b()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000194394D0A40(5,15-38): error X3004: undeclared identifier 'WaveActiveProduct'
+
diff --git a/test/tint/builtins/gen/var/subgroupMul/fa781b.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/fa781b.wgsl.expected.ir.dxc.hlsl
index 8c86862..58f45f7 100644
--- a/test/tint/builtins/gen/var/subgroupMul/fa781b.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupMul/fa781b.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store3(0u, subgroupMul_fa781b());
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store3(0u, subgroupMul_fa781b());
diff --git a/test/tint/builtins/gen/var/subgroupMul/fa781b.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupMul/fa781b.wgsl.expected.ir.msl
index a403e72..bc000ea 100644
--- a/test/tint/builtins/gen/var/subgroupMul/fa781b.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupMul/fa781b.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device uint3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupMul_fa781b();
+}
+
kernel void compute_main(device uint3* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupMul_fa781b();
diff --git a/test/tint/builtins/gen/var/subgroupMul/fab258.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/fab258.wgsl.expected.fxc.hlsl
index 7efad3f..efeda15 100644
--- a/test/tint/builtins/gen/var/subgroupMul/fab258.wgsl.expected.fxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupMul/fab258.wgsl.expected.fxc.hlsl
@@ -13,3 +13,6 @@
prevent_dce.Store4(0u, asuint(subgroupMul_fab258()));
return;
}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000026A1C714740(5,14-37): error X3004: undeclared identifier 'WaveActiveProduct'
+
diff --git a/test/tint/builtins/gen/var/subgroupMul/fab258.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupMul/fab258.wgsl.expected.ir.dxc.hlsl
index 666ef92..b095d30 100644
--- a/test/tint/builtins/gen/var/subgroupMul/fab258.wgsl.expected.ir.dxc.hlsl
+++ b/test/tint/builtins/gen/var/subgroupMul/fab258.wgsl.expected.ir.dxc.hlsl
@@ -6,6 +6,10 @@
return res;
}
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupMul_fab258()));
+}
+
[numthreads(1, 1, 1)]
void compute_main() {
prevent_dce.Store4(0u, asuint(subgroupMul_fab258()));
diff --git a/test/tint/builtins/gen/var/subgroupMul/fab258.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupMul/fab258.wgsl.expected.ir.msl
index a26d662..06bd2c5 100644
--- a/test/tint/builtins/gen/var/subgroupMul/fab258.wgsl.expected.ir.msl
+++ b/test/tint/builtins/gen/var/subgroupMul/fab258.wgsl.expected.ir.msl
@@ -11,6 +11,11 @@
return res;
}
+fragment void fragment_main(device int4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupMul_fab258();
+}
+
kernel void compute_main(device int4* prevent_dce [[buffer(0)]]) {
tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
(*tint_module_vars.prevent_dce) = subgroupMul_fab258();
diff --git a/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl b/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl
new file mode 100644
index 0000000..c760d87
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl
@@ -0,0 +1,59 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<i32>;
+
+
+// fn subgroupOr(value: vec<3, i32>) -> vec<3, i32>
+fn subgroupOr_03343f() -> vec3<i32>{
+ var arg_0 = vec3<i32>(1i);
+ var res: vec3<i32> = subgroupOr(arg_0);
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupOr_03343f();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_03343f();
+}
diff --git a/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..f273095
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl.expected.dxc.hlsl
@@ -0,0 +1,18 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int3 subgroupOr_03343f() {
+ int3 arg_0 = (1).xxx;
+ int3 res = asint(WaveActiveBitOr(asuint(arg_0)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupOr_03343f()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupOr_03343f()));
+ return;
+}
diff --git a/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..79c3767
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl.expected.fxc.hlsl
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int3 subgroupOr_03343f() {
+ int3 arg_0 = (1).xxx;
+ int3 res = asint(WaveActiveBitOr(asuint(arg_0)));
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupOr_03343f()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001F388990A60(5,20-49): error X3004: undeclared identifier 'WaveActiveBitOr'
+
diff --git a/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl.expected.glsl b/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl.expected.glsl
new file mode 100644
index 0000000..92b995f
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl.expected.glsl
@@ -0,0 +1,22 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<i32>;
+
+fn subgroupOr_03343f() -> vec3<i32> {
+ var arg_0 = vec3<i32>(1i);
+ var res : vec3<i32> = subgroupOr(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_03343f();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..b9ae642
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,17 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+int3 subgroupOr_03343f() {
+ int3 arg_0 = (1).xxx;
+ int3 res = asint(WaveActiveBitOr(asuint(arg_0)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupOr_03343f()));
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupOr_03343f()));
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl.expected.ir.msl
new file mode 100644
index 0000000..6d56a95
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl.expected.ir.msl
@@ -0,0 +1,22 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device int3* prevent_dce;
+};
+
+int3 subgroupOr_03343f() {
+ int3 arg_0 = int3(1);
+ int3 res = simd_or(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device int3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupOr_03343f();
+}
+
+kernel void compute_main(device int3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupOr_03343f();
+}
diff --git a/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..9832065
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl.expected.ir.spvasm
@@ -0,0 +1,63 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 31
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupOr_03343f "subgroupOr_03343f"
+ OpName %arg_0 "arg_0"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %int = OpTypeInt 32 1
+ %v3int = OpTypeVector %int 3
+%tint_symbol_1 = OpTypeStruct %v3int
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v3int
+%_ptr_Function_v3int = OpTypePointer Function %v3int
+ %int_1 = OpConstant %int 1
+ %11 = OpConstantComposite %v3int %int_1 %int_1 %int_1
+ %uint = OpTypeInt 32 0
+ %uint_3 = OpConstant %uint 3
+ %void = OpTypeVoid
+ %21 = OpTypeFunction %void
+%_ptr_StorageBuffer_v3int = OpTypePointer StorageBuffer %v3int
+ %uint_0 = OpConstant %uint 0
+%subgroupOr_03343f = OpFunction %v3int None %7
+ %8 = OpLabel
+ %arg_0 = OpVariable %_ptr_Function_v3int Function
+ %res = OpVariable %_ptr_Function_v3int Function
+ OpStore %arg_0 %11
+ %13 = OpLoad %v3int %arg_0
+ %14 = OpGroupNonUniformBitwiseOr %v3int %uint_3 Reduce %13
+ OpStore %res %14
+ %18 = OpLoad %v3int %res
+ OpReturnValue %18
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %21
+ %22 = OpLabel
+ %23 = OpFunctionCall %v3int %subgroupOr_03343f
+ %24 = OpAccessChain %_ptr_StorageBuffer_v3int %1 %uint_0
+ OpStore %24 %23
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %21
+ %28 = OpLabel
+ %29 = OpFunctionCall %v3int %subgroupOr_03343f
+ %30 = OpAccessChain %_ptr_StorageBuffer_v3int %1 %uint_0
+ OpStore %30 %29
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl.expected.msl b/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl.expected.msl
new file mode 100644
index 0000000..bcc76a0
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl.expected.msl
@@ -0,0 +1,19 @@
+#include <metal_stdlib>
+
+using namespace metal;
+int3 subgroupOr_03343f() {
+ int3 arg_0 = int3(1);
+ int3 res = simd_or(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device packed_int3* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = packed_int3(subgroupOr_03343f());
+ return;
+}
+
+kernel void compute_main(device packed_int3* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = packed_int3(subgroupOr_03343f());
+ return;
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl.expected.spvasm b/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl.expected.spvasm
new file mode 100644
index 0000000..fdcb4ee
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl.expected.spvasm
@@ -0,0 +1,19 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<i32>;
+
+fn subgroupOr_03343f() -> vec3<i32> {
+ var arg_0 = vec3<i32>(1i);
+ var res : vec3<i32> = subgroupOr(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_03343f();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl.expected.wgsl b/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl.expected.wgsl
new file mode 100644
index 0000000..99e40d4
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/03343f.wgsl.expected.wgsl
@@ -0,0 +1,19 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<i32>;
+
+fn subgroupOr_03343f() -> vec3<i32> {
+ var arg_0 = vec3<i32>(1i);
+ var res : vec3<i32> = subgroupOr(arg_0);
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupOr_03343f();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_03343f();
+}
diff --git a/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl b/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl
new file mode 100644
index 0000000..50a62fa
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl
@@ -0,0 +1,59 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : u32;
+
+
+// fn subgroupOr(value: u32) -> u32
+fn subgroupOr_0bc264() -> u32{
+ var arg_0 = 1u;
+ var res: u32 = subgroupOr(arg_0);
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupOr_0bc264();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_0bc264();
+}
diff --git a/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..08ece56
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl.expected.dxc.hlsl
@@ -0,0 +1,18 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint subgroupOr_0bc264() {
+ uint arg_0 = 1u;
+ uint res = WaveActiveBitOr(arg_0);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupOr_0bc264()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupOr_0bc264()));
+ return;
+}
diff --git a/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..dd10697
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl.expected.fxc.hlsl
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint subgroupOr_0bc264() {
+ uint arg_0 = 1u;
+ uint res = WaveActiveBitOr(arg_0);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupOr_0bc264()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000276B3B416D0(5,14-35): error X3004: undeclared identifier 'WaveActiveBitOr'
+
diff --git a/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl.expected.glsl b/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl.expected.glsl
new file mode 100644
index 0000000..693e01c
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl.expected.glsl
@@ -0,0 +1,22 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : u32;
+
+fn subgroupOr_0bc264() -> u32 {
+ var arg_0 = 1u;
+ var res : u32 = subgroupOr(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_0bc264();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..0d0586e
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,17 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+uint subgroupOr_0bc264() {
+ uint arg_0 = 1u;
+ uint res = WaveActiveBitOr(arg_0);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store(0u, subgroupOr_0bc264());
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, subgroupOr_0bc264());
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl.expected.ir.msl
new file mode 100644
index 0000000..0714491
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl.expected.ir.msl
@@ -0,0 +1,22 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device uint* prevent_dce;
+};
+
+uint subgroupOr_0bc264() {
+ uint arg_0 = 1u;
+ uint res = simd_or(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device uint* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupOr_0bc264();
+}
+
+kernel void compute_main(device uint* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupOr_0bc264();
+}
diff --git a/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..f02dbad
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl.expected.ir.spvasm
@@ -0,0 +1,60 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 28
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupOr_0bc264 "subgroupOr_0bc264"
+ OpName %arg_0 "arg_0"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %uint = OpTypeInt 32 0
+%tint_symbol_1 = OpTypeStruct %uint
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %6 = OpTypeFunction %uint
+%_ptr_Function_uint = OpTypePointer Function %uint
+ %uint_1 = OpConstant %uint 1
+ %uint_3 = OpConstant %uint 3
+ %void = OpTypeVoid
+ %18 = OpTypeFunction %void
+%_ptr_StorageBuffer_uint = OpTypePointer StorageBuffer %uint
+ %uint_0 = OpConstant %uint 0
+%subgroupOr_0bc264 = OpFunction %uint None %6
+ %7 = OpLabel
+ %arg_0 = OpVariable %_ptr_Function_uint Function
+ %res = OpVariable %_ptr_Function_uint Function
+ OpStore %arg_0 %uint_1
+ %11 = OpLoad %uint %arg_0
+ %12 = OpGroupNonUniformBitwiseOr %uint %uint_3 Reduce %11
+ OpStore %res %12
+ %15 = OpLoad %uint %res
+ OpReturnValue %15
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %18
+ %19 = OpLabel
+ %20 = OpFunctionCall %uint %subgroupOr_0bc264
+ %21 = OpAccessChain %_ptr_StorageBuffer_uint %1 %uint_0
+ OpStore %21 %20
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %18
+ %25 = OpLabel
+ %26 = OpFunctionCall %uint %subgroupOr_0bc264
+ %27 = OpAccessChain %_ptr_StorageBuffer_uint %1 %uint_0
+ OpStore %27 %26
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl.expected.msl b/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl.expected.msl
new file mode 100644
index 0000000..ee4551e
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl.expected.msl
@@ -0,0 +1,19 @@
+#include <metal_stdlib>
+
+using namespace metal;
+uint subgroupOr_0bc264() {
+ uint arg_0 = 1u;
+ uint res = simd_or(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device uint* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupOr_0bc264();
+ return;
+}
+
+kernel void compute_main(device uint* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupOr_0bc264();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl.expected.spvasm b/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl.expected.spvasm
new file mode 100644
index 0000000..d553036
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl.expected.spvasm
@@ -0,0 +1,19 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : u32;
+
+fn subgroupOr_0bc264() -> u32 {
+ var arg_0 = 1u;
+ var res : u32 = subgroupOr(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_0bc264();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl.expected.wgsl b/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl.expected.wgsl
new file mode 100644
index 0000000..f4cc305
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/0bc264.wgsl.expected.wgsl
@@ -0,0 +1,19 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : u32;
+
+fn subgroupOr_0bc264() -> u32 {
+ var arg_0 = 1u;
+ var res : u32 = subgroupOr(arg_0);
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupOr_0bc264();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_0bc264();
+}
diff --git a/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl b/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl
new file mode 100644
index 0000000..c9b6523
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl
@@ -0,0 +1,59 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<i32>;
+
+
+// fn subgroupOr(value: vec<2, i32>) -> vec<2, i32>
+fn subgroupOr_3f60e0() -> vec2<i32>{
+ var arg_0 = vec2<i32>(1i);
+ var res: vec2<i32> = subgroupOr(arg_0);
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupOr_3f60e0();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_3f60e0();
+}
diff --git a/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..7354ab8
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl.expected.dxc.hlsl
@@ -0,0 +1,18 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int2 subgroupOr_3f60e0() {
+ int2 arg_0 = (1).xx;
+ int2 res = asint(WaveActiveBitOr(asuint(arg_0)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupOr_3f60e0()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupOr_3f60e0()));
+ return;
+}
diff --git a/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..c0f5732
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl.expected.fxc.hlsl
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int2 subgroupOr_3f60e0() {
+ int2 arg_0 = (1).xx;
+ int2 res = asint(WaveActiveBitOr(asuint(arg_0)));
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupOr_3f60e0()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000163904B6B50(5,20-49): error X3004: undeclared identifier 'WaveActiveBitOr'
+
diff --git a/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl.expected.glsl b/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl.expected.glsl
new file mode 100644
index 0000000..6a71a0d
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl.expected.glsl
@@ -0,0 +1,22 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<i32>;
+
+fn subgroupOr_3f60e0() -> vec2<i32> {
+ var arg_0 = vec2<i32>(1i);
+ var res : vec2<i32> = subgroupOr(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_3f60e0();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..47baab6
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,17 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+int2 subgroupOr_3f60e0() {
+ int2 arg_0 = (1).xx;
+ int2 res = asint(WaveActiveBitOr(asuint(arg_0)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupOr_3f60e0()));
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupOr_3f60e0()));
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl.expected.ir.msl
new file mode 100644
index 0000000..643c073
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl.expected.ir.msl
@@ -0,0 +1,22 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device int2* prevent_dce;
+};
+
+int2 subgroupOr_3f60e0() {
+ int2 arg_0 = int2(1);
+ int2 res = simd_or(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device int2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupOr_3f60e0();
+}
+
+kernel void compute_main(device int2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupOr_3f60e0();
+}
diff --git a/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..901d9d4
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl.expected.ir.spvasm
@@ -0,0 +1,63 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 31
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupOr_3f60e0 "subgroupOr_3f60e0"
+ OpName %arg_0 "arg_0"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %int = OpTypeInt 32 1
+ %v2int = OpTypeVector %int 2
+%tint_symbol_1 = OpTypeStruct %v2int
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v2int
+%_ptr_Function_v2int = OpTypePointer Function %v2int
+ %int_1 = OpConstant %int 1
+ %11 = OpConstantComposite %v2int %int_1 %int_1
+ %uint = OpTypeInt 32 0
+ %uint_3 = OpConstant %uint 3
+ %void = OpTypeVoid
+ %21 = OpTypeFunction %void
+%_ptr_StorageBuffer_v2int = OpTypePointer StorageBuffer %v2int
+ %uint_0 = OpConstant %uint 0
+%subgroupOr_3f60e0 = OpFunction %v2int None %7
+ %8 = OpLabel
+ %arg_0 = OpVariable %_ptr_Function_v2int Function
+ %res = OpVariable %_ptr_Function_v2int Function
+ OpStore %arg_0 %11
+ %13 = OpLoad %v2int %arg_0
+ %14 = OpGroupNonUniformBitwiseOr %v2int %uint_3 Reduce %13
+ OpStore %res %14
+ %18 = OpLoad %v2int %res
+ OpReturnValue %18
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %21
+ %22 = OpLabel
+ %23 = OpFunctionCall %v2int %subgroupOr_3f60e0
+ %24 = OpAccessChain %_ptr_StorageBuffer_v2int %1 %uint_0
+ OpStore %24 %23
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %21
+ %28 = OpLabel
+ %29 = OpFunctionCall %v2int %subgroupOr_3f60e0
+ %30 = OpAccessChain %_ptr_StorageBuffer_v2int %1 %uint_0
+ OpStore %30 %29
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl.expected.msl b/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl.expected.msl
new file mode 100644
index 0000000..c083fe5
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl.expected.msl
@@ -0,0 +1,19 @@
+#include <metal_stdlib>
+
+using namespace metal;
+int2 subgroupOr_3f60e0() {
+ int2 arg_0 = int2(1);
+ int2 res = simd_or(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device int2* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupOr_3f60e0();
+ return;
+}
+
+kernel void compute_main(device int2* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupOr_3f60e0();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl.expected.spvasm b/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl.expected.spvasm
new file mode 100644
index 0000000..9d90c50
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl.expected.spvasm
@@ -0,0 +1,19 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<i32>;
+
+fn subgroupOr_3f60e0() -> vec2<i32> {
+ var arg_0 = vec2<i32>(1i);
+ var res : vec2<i32> = subgroupOr(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_3f60e0();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl.expected.wgsl b/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl.expected.wgsl
new file mode 100644
index 0000000..716d7d9
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/3f60e0.wgsl.expected.wgsl
@@ -0,0 +1,19 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<i32>;
+
+fn subgroupOr_3f60e0() -> vec2<i32> {
+ var arg_0 = vec2<i32>(1i);
+ var res : vec2<i32> = subgroupOr(arg_0);
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupOr_3f60e0();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_3f60e0();
+}
diff --git a/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl b/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl
new file mode 100644
index 0000000..e6e76b7
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl
@@ -0,0 +1,59 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<i32>;
+
+
+// fn subgroupOr(value: vec<4, i32>) -> vec<4, i32>
+fn subgroupOr_4d4eb0() -> vec4<i32>{
+ var arg_0 = vec4<i32>(1i);
+ var res: vec4<i32> = subgroupOr(arg_0);
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupOr_4d4eb0();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_4d4eb0();
+}
diff --git a/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..63fe1ec
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl.expected.dxc.hlsl
@@ -0,0 +1,18 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int4 subgroupOr_4d4eb0() {
+ int4 arg_0 = (1).xxxx;
+ int4 res = asint(WaveActiveBitOr(asuint(arg_0)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupOr_4d4eb0()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupOr_4d4eb0()));
+ return;
+}
diff --git a/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..6c7c446
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl.expected.fxc.hlsl
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int4 subgroupOr_4d4eb0() {
+ int4 arg_0 = (1).xxxx;
+ int4 res = asint(WaveActiveBitOr(asuint(arg_0)));
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupOr_4d4eb0()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000017424300340(5,20-49): error X3004: undeclared identifier 'WaveActiveBitOr'
+
diff --git a/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl.expected.glsl b/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl.expected.glsl
new file mode 100644
index 0000000..ee02197
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl.expected.glsl
@@ -0,0 +1,22 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<i32>;
+
+fn subgroupOr_4d4eb0() -> vec4<i32> {
+ var arg_0 = vec4<i32>(1i);
+ var res : vec4<i32> = subgroupOr(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_4d4eb0();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..f12199b
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,17 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+int4 subgroupOr_4d4eb0() {
+ int4 arg_0 = (1).xxxx;
+ int4 res = asint(WaveActiveBitOr(asuint(arg_0)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupOr_4d4eb0()));
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupOr_4d4eb0()));
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl.expected.ir.msl
new file mode 100644
index 0000000..8b01c02
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl.expected.ir.msl
@@ -0,0 +1,22 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device int4* prevent_dce;
+};
+
+int4 subgroupOr_4d4eb0() {
+ int4 arg_0 = int4(1);
+ int4 res = simd_or(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device int4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupOr_4d4eb0();
+}
+
+kernel void compute_main(device int4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupOr_4d4eb0();
+}
diff --git a/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..6b3c024
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl.expected.ir.spvasm
@@ -0,0 +1,63 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 31
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupOr_4d4eb0 "subgroupOr_4d4eb0"
+ OpName %arg_0 "arg_0"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %int = OpTypeInt 32 1
+ %v4int = OpTypeVector %int 4
+%tint_symbol_1 = OpTypeStruct %v4int
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v4int
+%_ptr_Function_v4int = OpTypePointer Function %v4int
+ %int_1 = OpConstant %int 1
+ %11 = OpConstantComposite %v4int %int_1 %int_1 %int_1 %int_1
+ %uint = OpTypeInt 32 0
+ %uint_3 = OpConstant %uint 3
+ %void = OpTypeVoid
+ %21 = OpTypeFunction %void
+%_ptr_StorageBuffer_v4int = OpTypePointer StorageBuffer %v4int
+ %uint_0 = OpConstant %uint 0
+%subgroupOr_4d4eb0 = OpFunction %v4int None %7
+ %8 = OpLabel
+ %arg_0 = OpVariable %_ptr_Function_v4int Function
+ %res = OpVariable %_ptr_Function_v4int Function
+ OpStore %arg_0 %11
+ %13 = OpLoad %v4int %arg_0
+ %14 = OpGroupNonUniformBitwiseOr %v4int %uint_3 Reduce %13
+ OpStore %res %14
+ %18 = OpLoad %v4int %res
+ OpReturnValue %18
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %21
+ %22 = OpLabel
+ %23 = OpFunctionCall %v4int %subgroupOr_4d4eb0
+ %24 = OpAccessChain %_ptr_StorageBuffer_v4int %1 %uint_0
+ OpStore %24 %23
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %21
+ %28 = OpLabel
+ %29 = OpFunctionCall %v4int %subgroupOr_4d4eb0
+ %30 = OpAccessChain %_ptr_StorageBuffer_v4int %1 %uint_0
+ OpStore %30 %29
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl.expected.msl b/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl.expected.msl
new file mode 100644
index 0000000..0e91ce4
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl.expected.msl
@@ -0,0 +1,19 @@
+#include <metal_stdlib>
+
+using namespace metal;
+int4 subgroupOr_4d4eb0() {
+ int4 arg_0 = int4(1);
+ int4 res = simd_or(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device int4* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupOr_4d4eb0();
+ return;
+}
+
+kernel void compute_main(device int4* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupOr_4d4eb0();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl.expected.spvasm b/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl.expected.spvasm
new file mode 100644
index 0000000..e4fb383
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl.expected.spvasm
@@ -0,0 +1,19 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<i32>;
+
+fn subgroupOr_4d4eb0() -> vec4<i32> {
+ var arg_0 = vec4<i32>(1i);
+ var res : vec4<i32> = subgroupOr(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_4d4eb0();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl.expected.wgsl b/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl.expected.wgsl
new file mode 100644
index 0000000..01f8d44
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/4d4eb0.wgsl.expected.wgsl
@@ -0,0 +1,19 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<i32>;
+
+fn subgroupOr_4d4eb0() -> vec4<i32> {
+ var arg_0 = vec4<i32>(1i);
+ var res : vec4<i32> = subgroupOr(arg_0);
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupOr_4d4eb0();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_4d4eb0();
+}
diff --git a/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl b/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl
new file mode 100644
index 0000000..44e3917
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl
@@ -0,0 +1,59 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<u32>;
+
+
+// fn subgroupOr(value: vec<3, u32>) -> vec<3, u32>
+fn subgroupOr_663a21() -> vec3<u32>{
+ var arg_0 = vec3<u32>(1u);
+ var res: vec3<u32> = subgroupOr(arg_0);
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupOr_663a21();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_663a21();
+}
diff --git a/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..00f6a58
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl.expected.dxc.hlsl
@@ -0,0 +1,18 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint3 subgroupOr_663a21() {
+ uint3 arg_0 = (1u).xxx;
+ uint3 res = WaveActiveBitOr(arg_0);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupOr_663a21()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupOr_663a21()));
+ return;
+}
diff --git a/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..53d269f
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl.expected.fxc.hlsl
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint3 subgroupOr_663a21() {
+ uint3 arg_0 = (1u).xxx;
+ uint3 res = WaveActiveBitOr(arg_0);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupOr_663a21()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000021C1887D010(5,15-36): error X3004: undeclared identifier 'WaveActiveBitOr'
+
diff --git a/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl.expected.glsl b/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl.expected.glsl
new file mode 100644
index 0000000..2f6adfa
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl.expected.glsl
@@ -0,0 +1,22 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<u32>;
+
+fn subgroupOr_663a21() -> vec3<u32> {
+ var arg_0 = vec3<u32>(1u);
+ var res : vec3<u32> = subgroupOr(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_663a21();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..5be83bc
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,17 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+uint3 subgroupOr_663a21() {
+ uint3 arg_0 = (1u).xxx;
+ uint3 res = WaveActiveBitOr(arg_0);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store3(0u, subgroupOr_663a21());
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, subgroupOr_663a21());
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl.expected.ir.msl
new file mode 100644
index 0000000..fd80e54
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl.expected.ir.msl
@@ -0,0 +1,22 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device uint3* prevent_dce;
+};
+
+uint3 subgroupOr_663a21() {
+ uint3 arg_0 = uint3(1u);
+ uint3 res = simd_or(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device uint3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupOr_663a21();
+}
+
+kernel void compute_main(device uint3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupOr_663a21();
+}
diff --git a/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..0aadd79
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl.expected.ir.spvasm
@@ -0,0 +1,62 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 30
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupOr_663a21 "subgroupOr_663a21"
+ OpName %arg_0 "arg_0"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %uint = OpTypeInt 32 0
+ %v3uint = OpTypeVector %uint 3
+%tint_symbol_1 = OpTypeStruct %v3uint
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v3uint
+%_ptr_Function_v3uint = OpTypePointer Function %v3uint
+ %uint_1 = OpConstant %uint 1
+ %11 = OpConstantComposite %v3uint %uint_1 %uint_1 %uint_1
+ %uint_3 = OpConstant %uint 3
+ %void = OpTypeVoid
+ %20 = OpTypeFunction %void
+%_ptr_StorageBuffer_v3uint = OpTypePointer StorageBuffer %v3uint
+ %uint_0 = OpConstant %uint 0
+%subgroupOr_663a21 = OpFunction %v3uint None %7
+ %8 = OpLabel
+ %arg_0 = OpVariable %_ptr_Function_v3uint Function
+ %res = OpVariable %_ptr_Function_v3uint Function
+ OpStore %arg_0 %11
+ %13 = OpLoad %v3uint %arg_0
+ %14 = OpGroupNonUniformBitwiseOr %v3uint %uint_3 Reduce %13
+ OpStore %res %14
+ %17 = OpLoad %v3uint %res
+ OpReturnValue %17
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %20
+ %21 = OpLabel
+ %22 = OpFunctionCall %v3uint %subgroupOr_663a21
+ %23 = OpAccessChain %_ptr_StorageBuffer_v3uint %1 %uint_0
+ OpStore %23 %22
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %20
+ %27 = OpLabel
+ %28 = OpFunctionCall %v3uint %subgroupOr_663a21
+ %29 = OpAccessChain %_ptr_StorageBuffer_v3uint %1 %uint_0
+ OpStore %29 %28
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl.expected.msl b/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl.expected.msl
new file mode 100644
index 0000000..3533e18
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl.expected.msl
@@ -0,0 +1,19 @@
+#include <metal_stdlib>
+
+using namespace metal;
+uint3 subgroupOr_663a21() {
+ uint3 arg_0 = uint3(1u);
+ uint3 res = simd_or(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device packed_uint3* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = packed_uint3(subgroupOr_663a21());
+ return;
+}
+
+kernel void compute_main(device packed_uint3* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = packed_uint3(subgroupOr_663a21());
+ return;
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl.expected.spvasm b/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl.expected.spvasm
new file mode 100644
index 0000000..7c50bc4
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl.expected.spvasm
@@ -0,0 +1,19 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<u32>;
+
+fn subgroupOr_663a21() -> vec3<u32> {
+ var arg_0 = vec3<u32>(1u);
+ var res : vec3<u32> = subgroupOr(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_663a21();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl.expected.wgsl b/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl.expected.wgsl
new file mode 100644
index 0000000..e09acbc
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/663a21.wgsl.expected.wgsl
@@ -0,0 +1,19 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<u32>;
+
+fn subgroupOr_663a21() -> vec3<u32> {
+ var arg_0 = vec3<u32>(1u);
+ var res : vec3<u32> = subgroupOr(arg_0);
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupOr_663a21();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_663a21();
+}
diff --git a/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl b/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl
new file mode 100644
index 0000000..661374d
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl
@@ -0,0 +1,59 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<u32>;
+
+
+// fn subgroupOr(value: vec<2, u32>) -> vec<2, u32>
+fn subgroupOr_aa74f7() -> vec2<u32>{
+ var arg_0 = vec2<u32>(1u);
+ var res: vec2<u32> = subgroupOr(arg_0);
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupOr_aa74f7();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_aa74f7();
+}
diff --git a/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..f820576
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl.expected.dxc.hlsl
@@ -0,0 +1,18 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint2 subgroupOr_aa74f7() {
+ uint2 arg_0 = (1u).xx;
+ uint2 res = WaveActiveBitOr(arg_0);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupOr_aa74f7()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupOr_aa74f7()));
+ return;
+}
diff --git a/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..dbe2566
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl.expected.fxc.hlsl
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint2 subgroupOr_aa74f7() {
+ uint2 arg_0 = (1u).xx;
+ uint2 res = WaveActiveBitOr(arg_0);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupOr_aa74f7()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000245F48D0340(5,15-36): error X3004: undeclared identifier 'WaveActiveBitOr'
+
diff --git a/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl.expected.glsl b/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl.expected.glsl
new file mode 100644
index 0000000..2adea12
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl.expected.glsl
@@ -0,0 +1,22 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<u32>;
+
+fn subgroupOr_aa74f7() -> vec2<u32> {
+ var arg_0 = vec2<u32>(1u);
+ var res : vec2<u32> = subgroupOr(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_aa74f7();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..b8b4f87
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,17 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+uint2 subgroupOr_aa74f7() {
+ uint2 arg_0 = (1u).xx;
+ uint2 res = WaveActiveBitOr(arg_0);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store2(0u, subgroupOr_aa74f7());
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, subgroupOr_aa74f7());
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl.expected.ir.msl
new file mode 100644
index 0000000..4999c82
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl.expected.ir.msl
@@ -0,0 +1,22 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device uint2* prevent_dce;
+};
+
+uint2 subgroupOr_aa74f7() {
+ uint2 arg_0 = uint2(1u);
+ uint2 res = simd_or(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device uint2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupOr_aa74f7();
+}
+
+kernel void compute_main(device uint2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupOr_aa74f7();
+}
diff --git a/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..6c3d0fb
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl.expected.ir.spvasm
@@ -0,0 +1,62 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 30
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupOr_aa74f7 "subgroupOr_aa74f7"
+ OpName %arg_0 "arg_0"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %uint = OpTypeInt 32 0
+ %v2uint = OpTypeVector %uint 2
+%tint_symbol_1 = OpTypeStruct %v2uint
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v2uint
+%_ptr_Function_v2uint = OpTypePointer Function %v2uint
+ %uint_1 = OpConstant %uint 1
+ %11 = OpConstantComposite %v2uint %uint_1 %uint_1
+ %uint_3 = OpConstant %uint 3
+ %void = OpTypeVoid
+ %20 = OpTypeFunction %void
+%_ptr_StorageBuffer_v2uint = OpTypePointer StorageBuffer %v2uint
+ %uint_0 = OpConstant %uint 0
+%subgroupOr_aa74f7 = OpFunction %v2uint None %7
+ %8 = OpLabel
+ %arg_0 = OpVariable %_ptr_Function_v2uint Function
+ %res = OpVariable %_ptr_Function_v2uint Function
+ OpStore %arg_0 %11
+ %13 = OpLoad %v2uint %arg_0
+ %14 = OpGroupNonUniformBitwiseOr %v2uint %uint_3 Reduce %13
+ OpStore %res %14
+ %17 = OpLoad %v2uint %res
+ OpReturnValue %17
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %20
+ %21 = OpLabel
+ %22 = OpFunctionCall %v2uint %subgroupOr_aa74f7
+ %23 = OpAccessChain %_ptr_StorageBuffer_v2uint %1 %uint_0
+ OpStore %23 %22
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %20
+ %27 = OpLabel
+ %28 = OpFunctionCall %v2uint %subgroupOr_aa74f7
+ %29 = OpAccessChain %_ptr_StorageBuffer_v2uint %1 %uint_0
+ OpStore %29 %28
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl.expected.msl b/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl.expected.msl
new file mode 100644
index 0000000..9597b5e
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl.expected.msl
@@ -0,0 +1,19 @@
+#include <metal_stdlib>
+
+using namespace metal;
+uint2 subgroupOr_aa74f7() {
+ uint2 arg_0 = uint2(1u);
+ uint2 res = simd_or(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device uint2* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupOr_aa74f7();
+ return;
+}
+
+kernel void compute_main(device uint2* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupOr_aa74f7();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl.expected.spvasm b/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl.expected.spvasm
new file mode 100644
index 0000000..e5b3376
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl.expected.spvasm
@@ -0,0 +1,19 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<u32>;
+
+fn subgroupOr_aa74f7() -> vec2<u32> {
+ var arg_0 = vec2<u32>(1u);
+ var res : vec2<u32> = subgroupOr(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_aa74f7();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl.expected.wgsl b/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl.expected.wgsl
new file mode 100644
index 0000000..45d687f
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/aa74f7.wgsl.expected.wgsl
@@ -0,0 +1,19 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<u32>;
+
+fn subgroupOr_aa74f7() -> vec2<u32> {
+ var arg_0 = vec2<u32>(1u);
+ var res : vec2<u32> = subgroupOr(arg_0);
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupOr_aa74f7();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_aa74f7();
+}
diff --git a/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl b/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl
new file mode 100644
index 0000000..01a52c1
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl
@@ -0,0 +1,59 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : i32;
+
+
+// fn subgroupOr(value: i32) -> i32
+fn subgroupOr_ae58b6() -> i32{
+ var arg_0 = 1i;
+ var res: i32 = subgroupOr(arg_0);
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupOr_ae58b6();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_ae58b6();
+}
diff --git a/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..b293b08
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl.expected.dxc.hlsl
@@ -0,0 +1,18 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int subgroupOr_ae58b6() {
+ int arg_0 = 1;
+ int res = asint(WaveActiveBitOr(asuint(arg_0)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupOr_ae58b6()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupOr_ae58b6()));
+ return;
+}
diff --git a/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..8e9b1f5
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl.expected.fxc.hlsl
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int subgroupOr_ae58b6() {
+ int arg_0 = 1;
+ int res = asint(WaveActiveBitOr(asuint(arg_0)));
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupOr_ae58b6()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000198A2958DD0(5,19-48): error X3004: undeclared identifier 'WaveActiveBitOr'
+
diff --git a/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl.expected.glsl b/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl.expected.glsl
new file mode 100644
index 0000000..a15cc7e
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl.expected.glsl
@@ -0,0 +1,22 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : i32;
+
+fn subgroupOr_ae58b6() -> i32 {
+ var arg_0 = 1i;
+ var res : i32 = subgroupOr(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_ae58b6();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..6a7f9f1
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,17 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+int subgroupOr_ae58b6() {
+ int arg_0 = 1;
+ int res = asint(WaveActiveBitOr(asuint(arg_0)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupOr_ae58b6()));
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupOr_ae58b6()));
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl.expected.ir.msl
new file mode 100644
index 0000000..cfcce77
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl.expected.ir.msl
@@ -0,0 +1,22 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device int* prevent_dce;
+};
+
+int subgroupOr_ae58b6() {
+ int arg_0 = 1;
+ int res = simd_or(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device int* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupOr_ae58b6();
+}
+
+kernel void compute_main(device int* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupOr_ae58b6();
+}
diff --git a/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..2f5d025
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl.expected.ir.spvasm
@@ -0,0 +1,61 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 29
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupOr_ae58b6 "subgroupOr_ae58b6"
+ OpName %arg_0 "arg_0"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %int = OpTypeInt 32 1
+%tint_symbol_1 = OpTypeStruct %int
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %6 = OpTypeFunction %int
+%_ptr_Function_int = OpTypePointer Function %int
+ %int_1 = OpConstant %int 1
+ %uint = OpTypeInt 32 0
+ %uint_3 = OpConstant %uint 3
+ %void = OpTypeVoid
+ %19 = OpTypeFunction %void
+%_ptr_StorageBuffer_int = OpTypePointer StorageBuffer %int
+ %uint_0 = OpConstant %uint 0
+%subgroupOr_ae58b6 = OpFunction %int None %6
+ %7 = OpLabel
+ %arg_0 = OpVariable %_ptr_Function_int Function
+ %res = OpVariable %_ptr_Function_int Function
+ OpStore %arg_0 %int_1
+ %11 = OpLoad %int %arg_0
+ %12 = OpGroupNonUniformBitwiseOr %int %uint_3 Reduce %11
+ OpStore %res %12
+ %16 = OpLoad %int %res
+ OpReturnValue %16
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %19
+ %20 = OpLabel
+ %21 = OpFunctionCall %int %subgroupOr_ae58b6
+ %22 = OpAccessChain %_ptr_StorageBuffer_int %1 %uint_0
+ OpStore %22 %21
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %19
+ %26 = OpLabel
+ %27 = OpFunctionCall %int %subgroupOr_ae58b6
+ %28 = OpAccessChain %_ptr_StorageBuffer_int %1 %uint_0
+ OpStore %28 %27
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl.expected.msl b/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl.expected.msl
new file mode 100644
index 0000000..724fc1c
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl.expected.msl
@@ -0,0 +1,19 @@
+#include <metal_stdlib>
+
+using namespace metal;
+int subgroupOr_ae58b6() {
+ int arg_0 = 1;
+ int res = simd_or(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device int* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupOr_ae58b6();
+ return;
+}
+
+kernel void compute_main(device int* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupOr_ae58b6();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl.expected.spvasm b/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl.expected.spvasm
new file mode 100644
index 0000000..e617363
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl.expected.spvasm
@@ -0,0 +1,19 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : i32;
+
+fn subgroupOr_ae58b6() -> i32 {
+ var arg_0 = 1i;
+ var res : i32 = subgroupOr(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_ae58b6();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl.expected.wgsl b/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl.expected.wgsl
new file mode 100644
index 0000000..d309090
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/ae58b6.wgsl.expected.wgsl
@@ -0,0 +1,19 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : i32;
+
+fn subgroupOr_ae58b6() -> i32 {
+ var arg_0 = 1i;
+ var res : i32 = subgroupOr(arg_0);
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupOr_ae58b6();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_ae58b6();
+}
diff --git a/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl b/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl
new file mode 100644
index 0000000..1121834
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl
@@ -0,0 +1,59 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<u32>;
+
+
+// fn subgroupOr(value: vec<4, u32>) -> vec<4, u32>
+fn subgroupOr_f915e3() -> vec4<u32>{
+ var arg_0 = vec4<u32>(1u);
+ var res: vec4<u32> = subgroupOr(arg_0);
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupOr_f915e3();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_f915e3();
+}
diff --git a/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..686862c
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl.expected.dxc.hlsl
@@ -0,0 +1,18 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint4 subgroupOr_f915e3() {
+ uint4 arg_0 = (1u).xxxx;
+ uint4 res = WaveActiveBitOr(arg_0);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupOr_f915e3()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupOr_f915e3()));
+ return;
+}
diff --git a/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..48b081a
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl.expected.fxc.hlsl
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint4 subgroupOr_f915e3() {
+ uint4 arg_0 = (1u).xxxx;
+ uint4 res = WaveActiveBitOr(arg_0);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupOr_f915e3()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001CF09C586C0(5,15-36): error X3004: undeclared identifier 'WaveActiveBitOr'
+
diff --git a/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl.expected.glsl b/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl.expected.glsl
new file mode 100644
index 0000000..487085b
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl.expected.glsl
@@ -0,0 +1,22 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<u32>;
+
+fn subgroupOr_f915e3() -> vec4<u32> {
+ var arg_0 = vec4<u32>(1u);
+ var res : vec4<u32> = subgroupOr(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_f915e3();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..2751523
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,17 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+uint4 subgroupOr_f915e3() {
+ uint4 arg_0 = (1u).xxxx;
+ uint4 res = WaveActiveBitOr(arg_0);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store4(0u, subgroupOr_f915e3());
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, subgroupOr_f915e3());
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl.expected.ir.msl
new file mode 100644
index 0000000..bf88926
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl.expected.ir.msl
@@ -0,0 +1,22 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device uint4* prevent_dce;
+};
+
+uint4 subgroupOr_f915e3() {
+ uint4 arg_0 = uint4(1u);
+ uint4 res = simd_or(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device uint4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupOr_f915e3();
+}
+
+kernel void compute_main(device uint4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupOr_f915e3();
+}
diff --git a/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..b647bc6
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl.expected.ir.spvasm
@@ -0,0 +1,62 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 30
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupOr_f915e3 "subgroupOr_f915e3"
+ OpName %arg_0 "arg_0"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %uint = OpTypeInt 32 0
+ %v4uint = OpTypeVector %uint 4
+%tint_symbol_1 = OpTypeStruct %v4uint
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v4uint
+%_ptr_Function_v4uint = OpTypePointer Function %v4uint
+ %uint_1 = OpConstant %uint 1
+ %11 = OpConstantComposite %v4uint %uint_1 %uint_1 %uint_1 %uint_1
+ %uint_3 = OpConstant %uint 3
+ %void = OpTypeVoid
+ %20 = OpTypeFunction %void
+%_ptr_StorageBuffer_v4uint = OpTypePointer StorageBuffer %v4uint
+ %uint_0 = OpConstant %uint 0
+%subgroupOr_f915e3 = OpFunction %v4uint None %7
+ %8 = OpLabel
+ %arg_0 = OpVariable %_ptr_Function_v4uint Function
+ %res = OpVariable %_ptr_Function_v4uint Function
+ OpStore %arg_0 %11
+ %13 = OpLoad %v4uint %arg_0
+ %14 = OpGroupNonUniformBitwiseOr %v4uint %uint_3 Reduce %13
+ OpStore %res %14
+ %17 = OpLoad %v4uint %res
+ OpReturnValue %17
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %20
+ %21 = OpLabel
+ %22 = OpFunctionCall %v4uint %subgroupOr_f915e3
+ %23 = OpAccessChain %_ptr_StorageBuffer_v4uint %1 %uint_0
+ OpStore %23 %22
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %20
+ %27 = OpLabel
+ %28 = OpFunctionCall %v4uint %subgroupOr_f915e3
+ %29 = OpAccessChain %_ptr_StorageBuffer_v4uint %1 %uint_0
+ OpStore %29 %28
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl.expected.msl b/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl.expected.msl
new file mode 100644
index 0000000..12bc656
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl.expected.msl
@@ -0,0 +1,19 @@
+#include <metal_stdlib>
+
+using namespace metal;
+uint4 subgroupOr_f915e3() {
+ uint4 arg_0 = uint4(1u);
+ uint4 res = simd_or(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device uint4* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupOr_f915e3();
+ return;
+}
+
+kernel void compute_main(device uint4* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupOr_f915e3();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl.expected.spvasm b/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl.expected.spvasm
new file mode 100644
index 0000000..c32e7e1
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl.expected.spvasm
@@ -0,0 +1,19 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<u32>;
+
+fn subgroupOr_f915e3() -> vec4<u32> {
+ var arg_0 = vec4<u32>(1u);
+ var res : vec4<u32> = subgroupOr(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_f915e3();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl.expected.wgsl b/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl.expected.wgsl
new file mode 100644
index 0000000..c44d986
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupOr/f915e3.wgsl.expected.wgsl
@@ -0,0 +1,19 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<u32>;
+
+fn subgroupOr_f915e3() -> vec4<u32> {
+ var arg_0 = vec4<u32>(1u);
+ var res : vec4<u32> = subgroupOr(arg_0);
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupOr_f915e3();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupOr_f915e3();
+}
diff --git a/test/tint/builtins/gen/var/subgroupXor/468721.wgsl b/test/tint/builtins/gen/var/subgroupXor/468721.wgsl
new file mode 100644
index 0000000..919a504
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/468721.wgsl
@@ -0,0 +1,59 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<u32>;
+
+
+// fn subgroupXor(value: vec<3, u32>) -> vec<3, u32>
+fn subgroupXor_468721() -> vec3<u32>{
+ var arg_0 = vec3<u32>(1u);
+ var res: vec3<u32> = subgroupXor(arg_0);
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupXor_468721();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_468721();
+}
diff --git a/test/tint/builtins/gen/var/subgroupXor/468721.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/468721.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..cfc0d8a
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/468721.wgsl.expected.dxc.hlsl
@@ -0,0 +1,18 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint3 subgroupXor_468721() {
+ uint3 arg_0 = (1u).xxx;
+ uint3 res = WaveActiveBitXor(arg_0);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupXor_468721()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupXor_468721()));
+ return;
+}
diff --git a/test/tint/builtins/gen/var/subgroupXor/468721.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/468721.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..99d7e76
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/468721.wgsl.expected.fxc.hlsl
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint3 subgroupXor_468721() {
+ uint3 arg_0 = (1u).xxx;
+ uint3 res = WaveActiveBitXor(arg_0);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupXor_468721()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000025503FCA700(5,15-37): error X3004: undeclared identifier 'WaveActiveBitXor'
+
diff --git a/test/tint/builtins/gen/var/subgroupXor/468721.wgsl.expected.glsl b/test/tint/builtins/gen/var/subgroupXor/468721.wgsl.expected.glsl
new file mode 100644
index 0000000..4d7ce74
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/468721.wgsl.expected.glsl
@@ -0,0 +1,22 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<u32>;
+
+fn subgroupXor_468721() -> vec3<u32> {
+ var arg_0 = vec3<u32>(1u);
+ var res : vec3<u32> = subgroupXor(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_468721();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/var/subgroupXor/468721.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/var/subgroupXor/468721.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/468721.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..a8fd35a
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/468721.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,17 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+uint3 subgroupXor_468721() {
+ uint3 arg_0 = (1u).xxx;
+ uint3 res = WaveActiveBitXor(arg_0);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store3(0u, subgroupXor_468721());
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, subgroupXor_468721());
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupXor/468721.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupXor/468721.wgsl.expected.ir.msl
new file mode 100644
index 0000000..90a5745
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/468721.wgsl.expected.ir.msl
@@ -0,0 +1,22 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device uint3* prevent_dce;
+};
+
+uint3 subgroupXor_468721() {
+ uint3 arg_0 = uint3(1u);
+ uint3 res = simd_xor(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device uint3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupXor_468721();
+}
+
+kernel void compute_main(device uint3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupXor_468721();
+}
diff --git a/test/tint/builtins/gen/var/subgroupXor/468721.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/var/subgroupXor/468721.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..41306ca
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/468721.wgsl.expected.ir.spvasm
@@ -0,0 +1,62 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 30
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupXor_468721 "subgroupXor_468721"
+ OpName %arg_0 "arg_0"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %uint = OpTypeInt 32 0
+ %v3uint = OpTypeVector %uint 3
+%tint_symbol_1 = OpTypeStruct %v3uint
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v3uint
+%_ptr_Function_v3uint = OpTypePointer Function %v3uint
+ %uint_1 = OpConstant %uint 1
+ %11 = OpConstantComposite %v3uint %uint_1 %uint_1 %uint_1
+ %uint_3 = OpConstant %uint 3
+ %void = OpTypeVoid
+ %20 = OpTypeFunction %void
+%_ptr_StorageBuffer_v3uint = OpTypePointer StorageBuffer %v3uint
+ %uint_0 = OpConstant %uint 0
+%subgroupXor_468721 = OpFunction %v3uint None %7
+ %8 = OpLabel
+ %arg_0 = OpVariable %_ptr_Function_v3uint Function
+ %res = OpVariable %_ptr_Function_v3uint Function
+ OpStore %arg_0 %11
+ %13 = OpLoad %v3uint %arg_0
+ %14 = OpGroupNonUniformBitwiseXor %v3uint %uint_3 Reduce %13
+ OpStore %res %14
+ %17 = OpLoad %v3uint %res
+ OpReturnValue %17
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %20
+ %21 = OpLabel
+ %22 = OpFunctionCall %v3uint %subgroupXor_468721
+ %23 = OpAccessChain %_ptr_StorageBuffer_v3uint %1 %uint_0
+ OpStore %23 %22
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %20
+ %27 = OpLabel
+ %28 = OpFunctionCall %v3uint %subgroupXor_468721
+ %29 = OpAccessChain %_ptr_StorageBuffer_v3uint %1 %uint_0
+ OpStore %29 %28
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/var/subgroupXor/468721.wgsl.expected.msl b/test/tint/builtins/gen/var/subgroupXor/468721.wgsl.expected.msl
new file mode 100644
index 0000000..0941cf0
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/468721.wgsl.expected.msl
@@ -0,0 +1,19 @@
+#include <metal_stdlib>
+
+using namespace metal;
+uint3 subgroupXor_468721() {
+ uint3 arg_0 = uint3(1u);
+ uint3 res = simd_xor(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device packed_uint3* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = packed_uint3(subgroupXor_468721());
+ return;
+}
+
+kernel void compute_main(device packed_uint3* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = packed_uint3(subgroupXor_468721());
+ return;
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupXor/468721.wgsl.expected.spvasm b/test/tint/builtins/gen/var/subgroupXor/468721.wgsl.expected.spvasm
new file mode 100644
index 0000000..80c6ed8
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/468721.wgsl.expected.spvasm
@@ -0,0 +1,19 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<u32>;
+
+fn subgroupXor_468721() -> vec3<u32> {
+ var arg_0 = vec3<u32>(1u);
+ var res : vec3<u32> = subgroupXor(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_468721();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/var/subgroupXor/468721.wgsl.expected.wgsl b/test/tint/builtins/gen/var/subgroupXor/468721.wgsl.expected.wgsl
new file mode 100644
index 0000000..91e97f7
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/468721.wgsl.expected.wgsl
@@ -0,0 +1,19 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<u32>;
+
+fn subgroupXor_468721() -> vec3<u32> {
+ var arg_0 = vec3<u32>(1u);
+ var res : vec3<u32> = subgroupXor(arg_0);
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupXor_468721();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_468721();
+}
diff --git a/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl b/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl
new file mode 100644
index 0000000..f0b3ff0
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl
@@ -0,0 +1,59 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<i32>;
+
+
+// fn subgroupXor(value: vec<2, i32>) -> vec<2, i32>
+fn subgroupXor_473de8() -> vec2<i32>{
+ var arg_0 = vec2<i32>(1i);
+ var res: vec2<i32> = subgroupXor(arg_0);
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupXor_473de8();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_473de8();
+}
diff --git a/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..72c636a
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl.expected.dxc.hlsl
@@ -0,0 +1,18 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int2 subgroupXor_473de8() {
+ int2 arg_0 = (1).xx;
+ int2 res = asint(WaveActiveBitXor(asuint(arg_0)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupXor_473de8()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupXor_473de8()));
+ return;
+}
diff --git a/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..a708681
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl.expected.fxc.hlsl
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int2 subgroupXor_473de8() {
+ int2 arg_0 = (1).xx;
+ int2 res = asint(WaveActiveBitXor(asuint(arg_0)));
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupXor_473de8()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000023FB7462020(5,20-50): error X3004: undeclared identifier 'WaveActiveBitXor'
+
diff --git a/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl.expected.glsl b/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl.expected.glsl
new file mode 100644
index 0000000..3e5c6ed
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl.expected.glsl
@@ -0,0 +1,22 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<i32>;
+
+fn subgroupXor_473de8() -> vec2<i32> {
+ var arg_0 = vec2<i32>(1i);
+ var res : vec2<i32> = subgroupXor(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_473de8();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..772cdd6
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,17 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+int2 subgroupXor_473de8() {
+ int2 arg_0 = (1).xx;
+ int2 res = asint(WaveActiveBitXor(asuint(arg_0)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupXor_473de8()));
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupXor_473de8()));
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl.expected.ir.msl
new file mode 100644
index 0000000..1491e69
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl.expected.ir.msl
@@ -0,0 +1,22 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device int2* prevent_dce;
+};
+
+int2 subgroupXor_473de8() {
+ int2 arg_0 = int2(1);
+ int2 res = simd_xor(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device int2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupXor_473de8();
+}
+
+kernel void compute_main(device int2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupXor_473de8();
+}
diff --git a/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..c773599
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl.expected.ir.spvasm
@@ -0,0 +1,63 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 31
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupXor_473de8 "subgroupXor_473de8"
+ OpName %arg_0 "arg_0"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %int = OpTypeInt 32 1
+ %v2int = OpTypeVector %int 2
+%tint_symbol_1 = OpTypeStruct %v2int
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v2int
+%_ptr_Function_v2int = OpTypePointer Function %v2int
+ %int_1 = OpConstant %int 1
+ %11 = OpConstantComposite %v2int %int_1 %int_1
+ %uint = OpTypeInt 32 0
+ %uint_3 = OpConstant %uint 3
+ %void = OpTypeVoid
+ %21 = OpTypeFunction %void
+%_ptr_StorageBuffer_v2int = OpTypePointer StorageBuffer %v2int
+ %uint_0 = OpConstant %uint 0
+%subgroupXor_473de8 = OpFunction %v2int None %7
+ %8 = OpLabel
+ %arg_0 = OpVariable %_ptr_Function_v2int Function
+ %res = OpVariable %_ptr_Function_v2int Function
+ OpStore %arg_0 %11
+ %13 = OpLoad %v2int %arg_0
+ %14 = OpGroupNonUniformBitwiseXor %v2int %uint_3 Reduce %13
+ OpStore %res %14
+ %18 = OpLoad %v2int %res
+ OpReturnValue %18
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %21
+ %22 = OpLabel
+ %23 = OpFunctionCall %v2int %subgroupXor_473de8
+ %24 = OpAccessChain %_ptr_StorageBuffer_v2int %1 %uint_0
+ OpStore %24 %23
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %21
+ %28 = OpLabel
+ %29 = OpFunctionCall %v2int %subgroupXor_473de8
+ %30 = OpAccessChain %_ptr_StorageBuffer_v2int %1 %uint_0
+ OpStore %30 %29
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl.expected.msl b/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl.expected.msl
new file mode 100644
index 0000000..5c838df
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl.expected.msl
@@ -0,0 +1,19 @@
+#include <metal_stdlib>
+
+using namespace metal;
+int2 subgroupXor_473de8() {
+ int2 arg_0 = int2(1);
+ int2 res = simd_xor(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device int2* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupXor_473de8();
+ return;
+}
+
+kernel void compute_main(device int2* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupXor_473de8();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl.expected.spvasm b/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl.expected.spvasm
new file mode 100644
index 0000000..ae720a9
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl.expected.spvasm
@@ -0,0 +1,19 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<i32>;
+
+fn subgroupXor_473de8() -> vec2<i32> {
+ var arg_0 = vec2<i32>(1i);
+ var res : vec2<i32> = subgroupXor(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_473de8();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl.expected.wgsl b/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl.expected.wgsl
new file mode 100644
index 0000000..da7bdfe
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/473de8.wgsl.expected.wgsl
@@ -0,0 +1,19 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<i32>;
+
+fn subgroupXor_473de8() -> vec2<i32> {
+ var arg_0 = vec2<i32>(1i);
+ var res : vec2<i32> = subgroupXor(arg_0);
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupXor_473de8();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_473de8();
+}
diff --git a/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl b/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl
new file mode 100644
index 0000000..c95471e
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl
@@ -0,0 +1,59 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : i32;
+
+
+// fn subgroupXor(value: i32) -> i32
+fn subgroupXor_694b17() -> i32{
+ var arg_0 = 1i;
+ var res: i32 = subgroupXor(arg_0);
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupXor_694b17();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_694b17();
+}
diff --git a/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..4e79139
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl.expected.dxc.hlsl
@@ -0,0 +1,18 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int subgroupXor_694b17() {
+ int arg_0 = 1;
+ int res = asint(WaveActiveBitXor(asuint(arg_0)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupXor_694b17()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupXor_694b17()));
+ return;
+}
diff --git a/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..10da165
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl.expected.fxc.hlsl
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int subgroupXor_694b17() {
+ int arg_0 = 1;
+ int res = asint(WaveActiveBitXor(asuint(arg_0)));
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupXor_694b17()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000202AF560C30(5,19-49): error X3004: undeclared identifier 'WaveActiveBitXor'
+
diff --git a/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl.expected.glsl b/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl.expected.glsl
new file mode 100644
index 0000000..5d1612d
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl.expected.glsl
@@ -0,0 +1,22 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : i32;
+
+fn subgroupXor_694b17() -> i32 {
+ var arg_0 = 1i;
+ var res : i32 = subgroupXor(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_694b17();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..7593d1c
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,17 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+int subgroupXor_694b17() {
+ int arg_0 = 1;
+ int res = asint(WaveActiveBitXor(asuint(arg_0)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupXor_694b17()));
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupXor_694b17()));
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl.expected.ir.msl
new file mode 100644
index 0000000..364ec45
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl.expected.ir.msl
@@ -0,0 +1,22 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device int* prevent_dce;
+};
+
+int subgroupXor_694b17() {
+ int arg_0 = 1;
+ int res = simd_xor(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device int* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupXor_694b17();
+}
+
+kernel void compute_main(device int* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupXor_694b17();
+}
diff --git a/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..a037259
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl.expected.ir.spvasm
@@ -0,0 +1,61 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 29
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupXor_694b17 "subgroupXor_694b17"
+ OpName %arg_0 "arg_0"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %int = OpTypeInt 32 1
+%tint_symbol_1 = OpTypeStruct %int
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %6 = OpTypeFunction %int
+%_ptr_Function_int = OpTypePointer Function %int
+ %int_1 = OpConstant %int 1
+ %uint = OpTypeInt 32 0
+ %uint_3 = OpConstant %uint 3
+ %void = OpTypeVoid
+ %19 = OpTypeFunction %void
+%_ptr_StorageBuffer_int = OpTypePointer StorageBuffer %int
+ %uint_0 = OpConstant %uint 0
+%subgroupXor_694b17 = OpFunction %int None %6
+ %7 = OpLabel
+ %arg_0 = OpVariable %_ptr_Function_int Function
+ %res = OpVariable %_ptr_Function_int Function
+ OpStore %arg_0 %int_1
+ %11 = OpLoad %int %arg_0
+ %12 = OpGroupNonUniformBitwiseXor %int %uint_3 Reduce %11
+ OpStore %res %12
+ %16 = OpLoad %int %res
+ OpReturnValue %16
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %19
+ %20 = OpLabel
+ %21 = OpFunctionCall %int %subgroupXor_694b17
+ %22 = OpAccessChain %_ptr_StorageBuffer_int %1 %uint_0
+ OpStore %22 %21
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %19
+ %26 = OpLabel
+ %27 = OpFunctionCall %int %subgroupXor_694b17
+ %28 = OpAccessChain %_ptr_StorageBuffer_int %1 %uint_0
+ OpStore %28 %27
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl.expected.msl b/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl.expected.msl
new file mode 100644
index 0000000..4fb9882
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl.expected.msl
@@ -0,0 +1,19 @@
+#include <metal_stdlib>
+
+using namespace metal;
+int subgroupXor_694b17() {
+ int arg_0 = 1;
+ int res = simd_xor(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device int* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupXor_694b17();
+ return;
+}
+
+kernel void compute_main(device int* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupXor_694b17();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl.expected.spvasm b/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl.expected.spvasm
new file mode 100644
index 0000000..aae2fa8
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl.expected.spvasm
@@ -0,0 +1,19 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : i32;
+
+fn subgroupXor_694b17() -> i32 {
+ var arg_0 = 1i;
+ var res : i32 = subgroupXor(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_694b17();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl.expected.wgsl b/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl.expected.wgsl
new file mode 100644
index 0000000..5fa20ea
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/694b17.wgsl.expected.wgsl
@@ -0,0 +1,19 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : i32;
+
+fn subgroupXor_694b17() -> i32 {
+ var arg_0 = 1i;
+ var res : i32 = subgroupXor(arg_0);
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupXor_694b17();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_694b17();
+}
diff --git a/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl b/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl
new file mode 100644
index 0000000..7ae3552
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl
@@ -0,0 +1,59 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : u32;
+
+
+// fn subgroupXor(value: u32) -> u32
+fn subgroupXor_7750d6() -> u32{
+ var arg_0 = 1u;
+ var res: u32 = subgroupXor(arg_0);
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupXor_7750d6();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_7750d6();
+}
diff --git a/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..7db2aab
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl.expected.dxc.hlsl
@@ -0,0 +1,18 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint subgroupXor_7750d6() {
+ uint arg_0 = 1u;
+ uint res = WaveActiveBitXor(arg_0);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store(0u, asuint(subgroupXor_7750d6()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupXor_7750d6()));
+ return;
+}
diff --git a/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..58de8d5
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl.expected.fxc.hlsl
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint subgroupXor_7750d6() {
+ uint arg_0 = 1u;
+ uint res = WaveActiveBitXor(arg_0);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, asuint(subgroupXor_7750d6()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000020C9D4871C0(5,14-36): error X3004: undeclared identifier 'WaveActiveBitXor'
+
diff --git a/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl.expected.glsl b/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl.expected.glsl
new file mode 100644
index 0000000..78b2067
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl.expected.glsl
@@ -0,0 +1,22 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : u32;
+
+fn subgroupXor_7750d6() -> u32 {
+ var arg_0 = 1u;
+ var res : u32 = subgroupXor(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_7750d6();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..835b645
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,17 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+uint subgroupXor_7750d6() {
+ uint arg_0 = 1u;
+ uint res = WaveActiveBitXor(arg_0);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store(0u, subgroupXor_7750d6());
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store(0u, subgroupXor_7750d6());
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl.expected.ir.msl
new file mode 100644
index 0000000..3fb3350
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl.expected.ir.msl
@@ -0,0 +1,22 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device uint* prevent_dce;
+};
+
+uint subgroupXor_7750d6() {
+ uint arg_0 = 1u;
+ uint res = simd_xor(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device uint* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupXor_7750d6();
+}
+
+kernel void compute_main(device uint* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupXor_7750d6();
+}
diff --git a/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..3709e04
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl.expected.ir.spvasm
@@ -0,0 +1,60 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 28
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupXor_7750d6 "subgroupXor_7750d6"
+ OpName %arg_0 "arg_0"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %uint = OpTypeInt 32 0
+%tint_symbol_1 = OpTypeStruct %uint
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %6 = OpTypeFunction %uint
+%_ptr_Function_uint = OpTypePointer Function %uint
+ %uint_1 = OpConstant %uint 1
+ %uint_3 = OpConstant %uint 3
+ %void = OpTypeVoid
+ %18 = OpTypeFunction %void
+%_ptr_StorageBuffer_uint = OpTypePointer StorageBuffer %uint
+ %uint_0 = OpConstant %uint 0
+%subgroupXor_7750d6 = OpFunction %uint None %6
+ %7 = OpLabel
+ %arg_0 = OpVariable %_ptr_Function_uint Function
+ %res = OpVariable %_ptr_Function_uint Function
+ OpStore %arg_0 %uint_1
+ %11 = OpLoad %uint %arg_0
+ %12 = OpGroupNonUniformBitwiseXor %uint %uint_3 Reduce %11
+ OpStore %res %12
+ %15 = OpLoad %uint %res
+ OpReturnValue %15
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %18
+ %19 = OpLabel
+ %20 = OpFunctionCall %uint %subgroupXor_7750d6
+ %21 = OpAccessChain %_ptr_StorageBuffer_uint %1 %uint_0
+ OpStore %21 %20
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %18
+ %25 = OpLabel
+ %26 = OpFunctionCall %uint %subgroupXor_7750d6
+ %27 = OpAccessChain %_ptr_StorageBuffer_uint %1 %uint_0
+ OpStore %27 %26
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl.expected.msl b/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl.expected.msl
new file mode 100644
index 0000000..9856538
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl.expected.msl
@@ -0,0 +1,19 @@
+#include <metal_stdlib>
+
+using namespace metal;
+uint subgroupXor_7750d6() {
+ uint arg_0 = 1u;
+ uint res = simd_xor(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device uint* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupXor_7750d6();
+ return;
+}
+
+kernel void compute_main(device uint* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupXor_7750d6();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl.expected.spvasm b/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl.expected.spvasm
new file mode 100644
index 0000000..39ebdb5
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl.expected.spvasm
@@ -0,0 +1,19 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : u32;
+
+fn subgroupXor_7750d6() -> u32 {
+ var arg_0 = 1u;
+ var res : u32 = subgroupXor(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_7750d6();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl.expected.wgsl b/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl.expected.wgsl
new file mode 100644
index 0000000..b4cc93c
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/7750d6.wgsl.expected.wgsl
@@ -0,0 +1,19 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : u32;
+
+fn subgroupXor_7750d6() -> u32 {
+ var arg_0 = 1u;
+ var res : u32 = subgroupXor(arg_0);
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupXor_7750d6();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_7750d6();
+}
diff --git a/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl b/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl
new file mode 100644
index 0000000..6ca850b
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl
@@ -0,0 +1,59 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<u32>;
+
+
+// fn subgroupXor(value: vec<2, u32>) -> vec<2, u32>
+fn subgroupXor_7f6672() -> vec2<u32>{
+ var arg_0 = vec2<u32>(1u);
+ var res: vec2<u32> = subgroupXor(arg_0);
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupXor_7f6672();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_7f6672();
+}
diff --git a/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..fba1063
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl.expected.dxc.hlsl
@@ -0,0 +1,18 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint2 subgroupXor_7f6672() {
+ uint2 arg_0 = (1u).xx;
+ uint2 res = WaveActiveBitXor(arg_0);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store2(0u, asuint(subgroupXor_7f6672()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupXor_7f6672()));
+ return;
+}
diff --git a/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..1127739
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl.expected.fxc.hlsl
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint2 subgroupXor_7f6672() {
+ uint2 arg_0 = (1u).xx;
+ uint2 res = WaveActiveBitXor(arg_0);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, asuint(subgroupXor_7f6672()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x000001CCB8D07A70(5,15-37): error X3004: undeclared identifier 'WaveActiveBitXor'
+
diff --git a/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl.expected.glsl b/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl.expected.glsl
new file mode 100644
index 0000000..351dc78
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl.expected.glsl
@@ -0,0 +1,22 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<u32>;
+
+fn subgroupXor_7f6672() -> vec2<u32> {
+ var arg_0 = vec2<u32>(1u);
+ var res : vec2<u32> = subgroupXor(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_7f6672();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..7dabb57
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,17 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+uint2 subgroupXor_7f6672() {
+ uint2 arg_0 = (1u).xx;
+ uint2 res = WaveActiveBitXor(arg_0);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store2(0u, subgroupXor_7f6672());
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store2(0u, subgroupXor_7f6672());
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl.expected.ir.msl
new file mode 100644
index 0000000..c403f37
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl.expected.ir.msl
@@ -0,0 +1,22 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device uint2* prevent_dce;
+};
+
+uint2 subgroupXor_7f6672() {
+ uint2 arg_0 = uint2(1u);
+ uint2 res = simd_xor(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device uint2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupXor_7f6672();
+}
+
+kernel void compute_main(device uint2* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupXor_7f6672();
+}
diff --git a/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..e082867
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl.expected.ir.spvasm
@@ -0,0 +1,62 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 30
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupXor_7f6672 "subgroupXor_7f6672"
+ OpName %arg_0 "arg_0"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %uint = OpTypeInt 32 0
+ %v2uint = OpTypeVector %uint 2
+%tint_symbol_1 = OpTypeStruct %v2uint
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v2uint
+%_ptr_Function_v2uint = OpTypePointer Function %v2uint
+ %uint_1 = OpConstant %uint 1
+ %11 = OpConstantComposite %v2uint %uint_1 %uint_1
+ %uint_3 = OpConstant %uint 3
+ %void = OpTypeVoid
+ %20 = OpTypeFunction %void
+%_ptr_StorageBuffer_v2uint = OpTypePointer StorageBuffer %v2uint
+ %uint_0 = OpConstant %uint 0
+%subgroupXor_7f6672 = OpFunction %v2uint None %7
+ %8 = OpLabel
+ %arg_0 = OpVariable %_ptr_Function_v2uint Function
+ %res = OpVariable %_ptr_Function_v2uint Function
+ OpStore %arg_0 %11
+ %13 = OpLoad %v2uint %arg_0
+ %14 = OpGroupNonUniformBitwiseXor %v2uint %uint_3 Reduce %13
+ OpStore %res %14
+ %17 = OpLoad %v2uint %res
+ OpReturnValue %17
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %20
+ %21 = OpLabel
+ %22 = OpFunctionCall %v2uint %subgroupXor_7f6672
+ %23 = OpAccessChain %_ptr_StorageBuffer_v2uint %1 %uint_0
+ OpStore %23 %22
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %20
+ %27 = OpLabel
+ %28 = OpFunctionCall %v2uint %subgroupXor_7f6672
+ %29 = OpAccessChain %_ptr_StorageBuffer_v2uint %1 %uint_0
+ OpStore %29 %28
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl.expected.msl b/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl.expected.msl
new file mode 100644
index 0000000..48b7ae1
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl.expected.msl
@@ -0,0 +1,19 @@
+#include <metal_stdlib>
+
+using namespace metal;
+uint2 subgroupXor_7f6672() {
+ uint2 arg_0 = uint2(1u);
+ uint2 res = simd_xor(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device uint2* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupXor_7f6672();
+ return;
+}
+
+kernel void compute_main(device uint2* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupXor_7f6672();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl.expected.spvasm b/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl.expected.spvasm
new file mode 100644
index 0000000..80c715f
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl.expected.spvasm
@@ -0,0 +1,19 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<u32>;
+
+fn subgroupXor_7f6672() -> vec2<u32> {
+ var arg_0 = vec2<u32>(1u);
+ var res : vec2<u32> = subgroupXor(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_7f6672();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl.expected.wgsl b/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl.expected.wgsl
new file mode 100644
index 0000000..64a526b
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/7f6672.wgsl.expected.wgsl
@@ -0,0 +1,19 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec2<u32>;
+
+fn subgroupXor_7f6672() -> vec2<u32> {
+ var arg_0 = vec2<u32>(1u);
+ var res : vec2<u32> = subgroupXor(arg_0);
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupXor_7f6672();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_7f6672();
+}
diff --git a/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl b/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl
new file mode 100644
index 0000000..d2b68ff
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl
@@ -0,0 +1,59 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<i32>;
+
+
+// fn subgroupXor(value: vec<4, i32>) -> vec<4, i32>
+fn subgroupXor_83b1f3() -> vec4<i32>{
+ var arg_0 = vec4<i32>(1i);
+ var res: vec4<i32> = subgroupXor(arg_0);
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupXor_83b1f3();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_83b1f3();
+}
diff --git a/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..8af14bd
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl.expected.dxc.hlsl
@@ -0,0 +1,18 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int4 subgroupXor_83b1f3() {
+ int4 arg_0 = (1).xxxx;
+ int4 res = asint(WaveActiveBitXor(asuint(arg_0)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupXor_83b1f3()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupXor_83b1f3()));
+ return;
+}
diff --git a/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..c995385
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl.expected.fxc.hlsl
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int4 subgroupXor_83b1f3() {
+ int4 arg_0 = (1).xxxx;
+ int4 res = asint(WaveActiveBitXor(asuint(arg_0)));
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupXor_83b1f3()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000025DA8D81EB0(5,20-50): error X3004: undeclared identifier 'WaveActiveBitXor'
+
diff --git a/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl.expected.glsl b/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl.expected.glsl
new file mode 100644
index 0000000..b15c3fb
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl.expected.glsl
@@ -0,0 +1,22 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<i32>;
+
+fn subgroupXor_83b1f3() -> vec4<i32> {
+ var arg_0 = vec4<i32>(1i);
+ var res : vec4<i32> = subgroupXor(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_83b1f3();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..be8bfdb
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,17 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+int4 subgroupXor_83b1f3() {
+ int4 arg_0 = (1).xxxx;
+ int4 res = asint(WaveActiveBitXor(asuint(arg_0)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupXor_83b1f3()));
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupXor_83b1f3()));
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl.expected.ir.msl
new file mode 100644
index 0000000..5c8bbfa
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl.expected.ir.msl
@@ -0,0 +1,22 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device int4* prevent_dce;
+};
+
+int4 subgroupXor_83b1f3() {
+ int4 arg_0 = int4(1);
+ int4 res = simd_xor(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device int4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupXor_83b1f3();
+}
+
+kernel void compute_main(device int4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupXor_83b1f3();
+}
diff --git a/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..81a5ba3
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl.expected.ir.spvasm
@@ -0,0 +1,63 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 31
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupXor_83b1f3 "subgroupXor_83b1f3"
+ OpName %arg_0 "arg_0"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %int = OpTypeInt 32 1
+ %v4int = OpTypeVector %int 4
+%tint_symbol_1 = OpTypeStruct %v4int
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v4int
+%_ptr_Function_v4int = OpTypePointer Function %v4int
+ %int_1 = OpConstant %int 1
+ %11 = OpConstantComposite %v4int %int_1 %int_1 %int_1 %int_1
+ %uint = OpTypeInt 32 0
+ %uint_3 = OpConstant %uint 3
+ %void = OpTypeVoid
+ %21 = OpTypeFunction %void
+%_ptr_StorageBuffer_v4int = OpTypePointer StorageBuffer %v4int
+ %uint_0 = OpConstant %uint 0
+%subgroupXor_83b1f3 = OpFunction %v4int None %7
+ %8 = OpLabel
+ %arg_0 = OpVariable %_ptr_Function_v4int Function
+ %res = OpVariable %_ptr_Function_v4int Function
+ OpStore %arg_0 %11
+ %13 = OpLoad %v4int %arg_0
+ %14 = OpGroupNonUniformBitwiseXor %v4int %uint_3 Reduce %13
+ OpStore %res %14
+ %18 = OpLoad %v4int %res
+ OpReturnValue %18
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %21
+ %22 = OpLabel
+ %23 = OpFunctionCall %v4int %subgroupXor_83b1f3
+ %24 = OpAccessChain %_ptr_StorageBuffer_v4int %1 %uint_0
+ OpStore %24 %23
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %21
+ %28 = OpLabel
+ %29 = OpFunctionCall %v4int %subgroupXor_83b1f3
+ %30 = OpAccessChain %_ptr_StorageBuffer_v4int %1 %uint_0
+ OpStore %30 %29
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl.expected.msl b/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl.expected.msl
new file mode 100644
index 0000000..3093099
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl.expected.msl
@@ -0,0 +1,19 @@
+#include <metal_stdlib>
+
+using namespace metal;
+int4 subgroupXor_83b1f3() {
+ int4 arg_0 = int4(1);
+ int4 res = simd_xor(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device int4* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupXor_83b1f3();
+ return;
+}
+
+kernel void compute_main(device int4* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupXor_83b1f3();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl.expected.spvasm b/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl.expected.spvasm
new file mode 100644
index 0000000..7e24b97
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl.expected.spvasm
@@ -0,0 +1,19 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<i32>;
+
+fn subgroupXor_83b1f3() -> vec4<i32> {
+ var arg_0 = vec4<i32>(1i);
+ var res : vec4<i32> = subgroupXor(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_83b1f3();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl.expected.wgsl b/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl.expected.wgsl
new file mode 100644
index 0000000..c46e996
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/83b1f3.wgsl.expected.wgsl
@@ -0,0 +1,19 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<i32>;
+
+fn subgroupXor_83b1f3() -> vec4<i32> {
+ var arg_0 = vec4<i32>(1i);
+ var res : vec4<i32> = subgroupXor(arg_0);
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupXor_83b1f3();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_83b1f3();
+}
diff --git a/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl b/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl
new file mode 100644
index 0000000..3564060
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl
@@ -0,0 +1,59 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<i32>;
+
+
+// fn subgroupXor(value: vec<3, i32>) -> vec<3, i32>
+fn subgroupXor_9c6e73() -> vec3<i32>{
+ var arg_0 = vec3<i32>(1i);
+ var res: vec3<i32> = subgroupXor(arg_0);
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupXor_9c6e73();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_9c6e73();
+}
diff --git a/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..9c20be8
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl.expected.dxc.hlsl
@@ -0,0 +1,18 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int3 subgroupXor_9c6e73() {
+ int3 arg_0 = (1).xxx;
+ int3 res = asint(WaveActiveBitXor(asuint(arg_0)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupXor_9c6e73()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupXor_9c6e73()));
+ return;
+}
diff --git a/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..b339ce8
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl.expected.fxc.hlsl
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+int3 subgroupXor_9c6e73() {
+ int3 arg_0 = (1).xxx;
+ int3 res = asint(WaveActiveBitXor(asuint(arg_0)));
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupXor_9c6e73()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x0000026409513030(5,20-50): error X3004: undeclared identifier 'WaveActiveBitXor'
+
diff --git a/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl.expected.glsl b/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl.expected.glsl
new file mode 100644
index 0000000..ce58f47
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl.expected.glsl
@@ -0,0 +1,22 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<i32>;
+
+fn subgroupXor_9c6e73() -> vec3<i32> {
+ var arg_0 = vec3<i32>(1i);
+ var res : vec3<i32> = subgroupXor(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_9c6e73();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..126616e
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,17 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+int3 subgroupXor_9c6e73() {
+ int3 arg_0 = (1).xxx;
+ int3 res = asint(WaveActiveBitXor(asuint(arg_0)));
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store3(0u, asuint(subgroupXor_9c6e73()));
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store3(0u, asuint(subgroupXor_9c6e73()));
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl.expected.ir.msl
new file mode 100644
index 0000000..5e84240
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl.expected.ir.msl
@@ -0,0 +1,22 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device int3* prevent_dce;
+};
+
+int3 subgroupXor_9c6e73() {
+ int3 arg_0 = int3(1);
+ int3 res = simd_xor(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device int3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupXor_9c6e73();
+}
+
+kernel void compute_main(device int3* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupXor_9c6e73();
+}
diff --git a/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..4b384c8
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl.expected.ir.spvasm
@@ -0,0 +1,63 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 31
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupXor_9c6e73 "subgroupXor_9c6e73"
+ OpName %arg_0 "arg_0"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %int = OpTypeInt 32 1
+ %v3int = OpTypeVector %int 3
+%tint_symbol_1 = OpTypeStruct %v3int
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v3int
+%_ptr_Function_v3int = OpTypePointer Function %v3int
+ %int_1 = OpConstant %int 1
+ %11 = OpConstantComposite %v3int %int_1 %int_1 %int_1
+ %uint = OpTypeInt 32 0
+ %uint_3 = OpConstant %uint 3
+ %void = OpTypeVoid
+ %21 = OpTypeFunction %void
+%_ptr_StorageBuffer_v3int = OpTypePointer StorageBuffer %v3int
+ %uint_0 = OpConstant %uint 0
+%subgroupXor_9c6e73 = OpFunction %v3int None %7
+ %8 = OpLabel
+ %arg_0 = OpVariable %_ptr_Function_v3int Function
+ %res = OpVariable %_ptr_Function_v3int Function
+ OpStore %arg_0 %11
+ %13 = OpLoad %v3int %arg_0
+ %14 = OpGroupNonUniformBitwiseXor %v3int %uint_3 Reduce %13
+ OpStore %res %14
+ %18 = OpLoad %v3int %res
+ OpReturnValue %18
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %21
+ %22 = OpLabel
+ %23 = OpFunctionCall %v3int %subgroupXor_9c6e73
+ %24 = OpAccessChain %_ptr_StorageBuffer_v3int %1 %uint_0
+ OpStore %24 %23
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %21
+ %28 = OpLabel
+ %29 = OpFunctionCall %v3int %subgroupXor_9c6e73
+ %30 = OpAccessChain %_ptr_StorageBuffer_v3int %1 %uint_0
+ OpStore %30 %29
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl.expected.msl b/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl.expected.msl
new file mode 100644
index 0000000..e3f0dad
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl.expected.msl
@@ -0,0 +1,19 @@
+#include <metal_stdlib>
+
+using namespace metal;
+int3 subgroupXor_9c6e73() {
+ int3 arg_0 = int3(1);
+ int3 res = simd_xor(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device packed_int3* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = packed_int3(subgroupXor_9c6e73());
+ return;
+}
+
+kernel void compute_main(device packed_int3* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = packed_int3(subgroupXor_9c6e73());
+ return;
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl.expected.spvasm b/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl.expected.spvasm
new file mode 100644
index 0000000..322a863
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl.expected.spvasm
@@ -0,0 +1,19 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<i32>;
+
+fn subgroupXor_9c6e73() -> vec3<i32> {
+ var arg_0 = vec3<i32>(1i);
+ var res : vec3<i32> = subgroupXor(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_9c6e73();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl.expected.wgsl b/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl.expected.wgsl
new file mode 100644
index 0000000..8c7b36d
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/9c6e73.wgsl.expected.wgsl
@@ -0,0 +1,19 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec3<i32>;
+
+fn subgroupXor_9c6e73() -> vec3<i32> {
+ var arg_0 = vec3<i32>(1i);
+ var res : vec3<i32> = subgroupXor(arg_0);
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupXor_9c6e73();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_9c6e73();
+}
diff --git a/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl b/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl
new file mode 100644
index 0000000..fb4e4af
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl
@@ -0,0 +1,59 @@
+// Copyright 2024 The Dawn & Tint Authors
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice, this
+// list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+// this list of conditions and the following disclaimer in the documentation
+// and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+////////////////////////////////////////////////////////////////////////////////
+// File generated by 'tools/src/cmd/gen' using the template:
+// test/tint/builtins/gen/gen.wgsl.tmpl
+//
+// To regenerate run: './tools/run gen'
+//
+// Do not modify this file directly
+////////////////////////////////////////////////////////////////////////////////
+
+
+// [hlsl-dxc] flags: --hlsl_shader_model 60
+
+
+enable subgroups;
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<u32>;
+
+
+// fn subgroupXor(value: vec<4, u32>) -> vec<4, u32>
+fn subgroupXor_9d77e4() -> vec4<u32>{
+ var arg_0 = vec4<u32>(1u);
+ var res: vec4<u32> = subgroupXor(arg_0);
+ return res;
+}
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupXor_9d77e4();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_9d77e4();
+}
diff --git a/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl.expected.dxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl.expected.dxc.hlsl
new file mode 100644
index 0000000..98d36e2
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl.expected.dxc.hlsl
@@ -0,0 +1,18 @@
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint4 subgroupXor_9d77e4() {
+ uint4 arg_0 = (1u).xxxx;
+ uint4 res = WaveActiveBitXor(arg_0);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store4(0u, asuint(subgroupXor_9d77e4()));
+ return;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupXor_9d77e4()));
+ return;
+}
diff --git a/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl.expected.fxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl.expected.fxc.hlsl
new file mode 100644
index 0000000..35ab082
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl.expected.fxc.hlsl
@@ -0,0 +1,18 @@
+SKIP: FAILED
+
+RWByteAddressBuffer prevent_dce : register(u0);
+
+uint4 subgroupXor_9d77e4() {
+ uint4 arg_0 = (1u).xxxx;
+ uint4 res = WaveActiveBitXor(arg_0);
+ return res;
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, asuint(subgroupXor_9d77e4()));
+ return;
+}
+FXC validation failure:
+C:\src\dawn\Shader@0x00000218D8F23750(5,15-37): error X3004: undeclared identifier 'WaveActiveBitXor'
+
diff --git a/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl.expected.glsl b/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl.expected.glsl
new file mode 100644
index 0000000..7011066
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl.expected.glsl
@@ -0,0 +1,22 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<u32>;
+
+fn subgroupXor_9d77e4() -> vec4<u32> {
+ var arg_0 = vec4<u32>(1u);
+ var res : vec4<u32> = subgroupXor(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_9d77e4();
+}
+
+Failed to generate: <dawn>/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl:41:8 error: GLSL backend does not support extension 'subgroups'
+enable subgroups;
+ ^^^^^^^^^
+
diff --git a/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl.expected.ir.dxc.hlsl b/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl.expected.ir.dxc.hlsl
new file mode 100644
index 0000000..ed57471
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl.expected.ir.dxc.hlsl
@@ -0,0 +1,17 @@
+
+RWByteAddressBuffer prevent_dce : register(u0);
+uint4 subgroupXor_9d77e4() {
+ uint4 arg_0 = (1u).xxxx;
+ uint4 res = WaveActiveBitXor(arg_0);
+ return res;
+}
+
+void fragment_main() {
+ prevent_dce.Store4(0u, subgroupXor_9d77e4());
+}
+
+[numthreads(1, 1, 1)]
+void compute_main() {
+ prevent_dce.Store4(0u, subgroupXor_9d77e4());
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl.expected.ir.msl b/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl.expected.ir.msl
new file mode 100644
index 0000000..1a0c716
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl.expected.ir.msl
@@ -0,0 +1,22 @@
+#include <metal_stdlib>
+using namespace metal;
+
+struct tint_module_vars_struct {
+ device uint4* prevent_dce;
+};
+
+uint4 subgroupXor_9d77e4() {
+ uint4 arg_0 = uint4(1u);
+ uint4 res = simd_xor(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device uint4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupXor_9d77e4();
+}
+
+kernel void compute_main(device uint4* prevent_dce [[buffer(0)]]) {
+ tint_module_vars_struct const tint_module_vars = tint_module_vars_struct{.prevent_dce=prevent_dce};
+ (*tint_module_vars.prevent_dce) = subgroupXor_9d77e4();
+}
diff --git a/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl.expected.ir.spvasm b/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl.expected.ir.spvasm
new file mode 100644
index 0000000..0f221e7
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl.expected.ir.spvasm
@@ -0,0 +1,62 @@
+; SPIR-V
+; Version: 1.3
+; Generator: Google Tint Compiler; 1
+; Bound: 30
+; Schema: 0
+ OpCapability Shader
+ OpCapability GroupNonUniformArithmetic
+ OpMemoryModel Logical GLSL450
+ OpEntryPoint Fragment %fragment_main "fragment_main"
+ OpEntryPoint GLCompute %compute_main "compute_main"
+ OpExecutionMode %fragment_main OriginUpperLeft
+ OpExecutionMode %compute_main LocalSize 1 1 1
+ OpMemberName %tint_symbol_1 0 "tint_symbol"
+ OpName %tint_symbol_1 "tint_symbol_1"
+ OpName %subgroupXor_9d77e4 "subgroupXor_9d77e4"
+ OpName %arg_0 "arg_0"
+ OpName %res "res"
+ OpName %fragment_main "fragment_main"
+ OpName %compute_main "compute_main"
+ OpMemberDecorate %tint_symbol_1 0 Offset 0
+ OpDecorate %tint_symbol_1 Block
+ OpDecorate %1 DescriptorSet 0
+ OpDecorate %1 Binding 0
+ %uint = OpTypeInt 32 0
+ %v4uint = OpTypeVector %uint 4
+%tint_symbol_1 = OpTypeStruct %v4uint
+%_ptr_StorageBuffer_tint_symbol_1 = OpTypePointer StorageBuffer %tint_symbol_1
+ %1 = OpVariable %_ptr_StorageBuffer_tint_symbol_1 StorageBuffer
+ %7 = OpTypeFunction %v4uint
+%_ptr_Function_v4uint = OpTypePointer Function %v4uint
+ %uint_1 = OpConstant %uint 1
+ %11 = OpConstantComposite %v4uint %uint_1 %uint_1 %uint_1 %uint_1
+ %uint_3 = OpConstant %uint 3
+ %void = OpTypeVoid
+ %20 = OpTypeFunction %void
+%_ptr_StorageBuffer_v4uint = OpTypePointer StorageBuffer %v4uint
+ %uint_0 = OpConstant %uint 0
+%subgroupXor_9d77e4 = OpFunction %v4uint None %7
+ %8 = OpLabel
+ %arg_0 = OpVariable %_ptr_Function_v4uint Function
+ %res = OpVariable %_ptr_Function_v4uint Function
+ OpStore %arg_0 %11
+ %13 = OpLoad %v4uint %arg_0
+ %14 = OpGroupNonUniformBitwiseXor %v4uint %uint_3 Reduce %13
+ OpStore %res %14
+ %17 = OpLoad %v4uint %res
+ OpReturnValue %17
+ OpFunctionEnd
+%fragment_main = OpFunction %void None %20
+ %21 = OpLabel
+ %22 = OpFunctionCall %v4uint %subgroupXor_9d77e4
+ %23 = OpAccessChain %_ptr_StorageBuffer_v4uint %1 %uint_0
+ OpStore %23 %22
+ OpReturn
+ OpFunctionEnd
+%compute_main = OpFunction %void None %20
+ %27 = OpLabel
+ %28 = OpFunctionCall %v4uint %subgroupXor_9d77e4
+ %29 = OpAccessChain %_ptr_StorageBuffer_v4uint %1 %uint_0
+ OpStore %29 %28
+ OpReturn
+ OpFunctionEnd
diff --git a/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl.expected.msl b/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl.expected.msl
new file mode 100644
index 0000000..67591a7
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl.expected.msl
@@ -0,0 +1,19 @@
+#include <metal_stdlib>
+
+using namespace metal;
+uint4 subgroupXor_9d77e4() {
+ uint4 arg_0 = uint4(1u);
+ uint4 res = simd_xor(arg_0);
+ return res;
+}
+
+fragment void fragment_main(device uint4* tint_symbol [[buffer(0)]]) {
+ *(tint_symbol) = subgroupXor_9d77e4();
+ return;
+}
+
+kernel void compute_main(device uint4* tint_symbol_1 [[buffer(0)]]) {
+ *(tint_symbol_1) = subgroupXor_9d77e4();
+ return;
+}
+
diff --git a/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl.expected.spvasm b/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl.expected.spvasm
new file mode 100644
index 0000000..dbeb049
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl.expected.spvasm
@@ -0,0 +1,19 @@
+SKIP: FAILED
+
+
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<u32>;
+
+fn subgroupXor_9d77e4() -> vec4<u32> {
+ var arg_0 = vec4<u32>(1u);
+ var res : vec4<u32> = subgroupXor(arg_0);
+ return res;
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_9d77e4();
+}
+
+Failed to generate:
diff --git a/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl.expected.wgsl b/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl.expected.wgsl
new file mode 100644
index 0000000..b4bc607
--- /dev/null
+++ b/test/tint/builtins/gen/var/subgroupXor/9d77e4.wgsl.expected.wgsl
@@ -0,0 +1,19 @@
+enable subgroups;
+
+@group(0) @binding(0) var<storage, read_write> prevent_dce : vec4<u32>;
+
+fn subgroupXor_9d77e4() -> vec4<u32> {
+ var arg_0 = vec4<u32>(1u);
+ var res : vec4<u32> = subgroupXor(arg_0);
+ return res;
+}
+
+@fragment
+fn fragment_main() {
+ prevent_dce = subgroupXor_9d77e4();
+}
+
+@compute @workgroup_size(1)
+fn compute_main() {
+ prevent_dce = subgroupXor_9d77e4();
+}
