blob: 2223d3f6faa4d321e8a4169e3ac1511ab686e0b2 [file] [log] [blame]
// Copyright 2021 The Tint Authors.
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
////////////////////////////////////////////////////////////////////////////////
// File generated by tools/intrinsic-gen
// using the template:
// test/intrinsics/intrinsics.wgsl.tmpl
// and the intrinsic defintion file:
// src/intrinsics.def
//
// Do not modify this file directly
////////////////////////////////////////////////////////////////////////////////
var<workgroup> arg_1: vec4<f32>;
// fn modf(vec<4, f32>, ptr<workgroup, vec<4, f32>, read_write>) -> vec<4, f32>
fn modf_1d59e5() {
var res: vec4<f32> = modf(vec4<f32>(), &arg_1);
}
[[stage(compute), workgroup_size(1)]]
fn compute_main() {
modf_1d59e5();
}