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34a2d6574f5cac23a470da7d6496153cfacb09ed
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.
/
test
/
tint
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statements
/
compound_assign
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vector
/
and.wgsl.expected.ir.dxc.hlsl
blob: 5dce6b243c2ae93aadcc486570d9ea369fd00b34 [
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] [
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RWByteAddressBuffer
v
:
register
(
u0
);
void
foo
()
{
v
.
Store4
(
0u
,
asuint
((
asint
(
v
.
Load4
(
0u
))
&
(
int
(
2
)).
xxxx
)));
}
[
numthreads
(
1
,
1
,
1
)]
void
unused_entry_point
()
{
}