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8f1d276a3780e023f44b54385255479b4a7e3be7
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.
/
test
/
tint
/
statements
/
compound_assign
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vector
/
shift_left.wgsl.expected.ir.fxc.hlsl
blob: 8f0b2103ddcfa5700d039875ffd0a80227d1d61d [
file
] [
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]
RWByteAddressBuffer
v
:
register
(
u0
);
void
foo
()
{
v
.
Store4
(
0u
,
asuint
((
asint
(
v
.
Load4
(
0u
))
<<
((
2u
).
xxxx
&
(
31u
).
xxxx
))));
}
[
numthreads
(
1
,
1
,
1
)]
void
unused_entry_point
()
{
}