dan sinclair | 0c359fd | 2024-12-06 14:16:09 +0000 | [diff] [blame] | 1 | // |
| 2 | // fragment_main |
| 3 | // |
dan sinclair | 8f1d276 | 2024-07-31 02:35:40 +0000 | [diff] [blame] | 4 | |
| 5 | RWByteAddressBuffer prevent_dce : register(u0); |
| 6 | float2 log2_aea659() { |
| 7 | float2 res = (0.0f).xx; |
| 8 | return res; |
| 9 | } |
| 10 | |
| 11 | void fragment_main() { |
| 12 | prevent_dce.Store2(0u, asuint(log2_aea659())); |
| 13 | } |
| 14 | |
dan sinclair | 0c359fd | 2024-12-06 14:16:09 +0000 | [diff] [blame] | 15 | // |
| 16 | // compute_main |
| 17 | // |
| 18 | |
| 19 | RWByteAddressBuffer prevent_dce : register(u0); |
| 20 | float2 log2_aea659() { |
| 21 | float2 res = (0.0f).xx; |
| 22 | return res; |
| 23 | } |
| 24 | |
dan sinclair | 8f1d276 | 2024-07-31 02:35:40 +0000 | [diff] [blame] | 25 | [numthreads(1, 1, 1)] |
| 26 | void compute_main() { |
| 27 | prevent_dce.Store2(0u, asuint(log2_aea659())); |
| 28 | } |
| 29 | |
dan sinclair | 0c359fd | 2024-12-06 14:16:09 +0000 | [diff] [blame] | 30 | // |
| 31 | // vertex_main |
| 32 | // |
| 33 | struct VertexOutput { |
| 34 | float4 pos; |
| 35 | float2 prevent_dce; |
| 36 | }; |
| 37 | |
| 38 | struct vertex_main_outputs { |
| 39 | nointerpolation float2 VertexOutput_prevent_dce : TEXCOORD0; |
| 40 | float4 VertexOutput_pos : SV_Position; |
| 41 | }; |
| 42 | |
| 43 | |
| 44 | float2 log2_aea659() { |
| 45 | float2 res = (0.0f).xx; |
| 46 | return res; |
| 47 | } |
| 48 | |
dan sinclair | 8f1d276 | 2024-07-31 02:35:40 +0000 | [diff] [blame] | 49 | VertexOutput vertex_main_inner() { |
| 50 | VertexOutput tint_symbol = (VertexOutput)0; |
| 51 | tint_symbol.pos = (0.0f).xxxx; |
| 52 | tint_symbol.prevent_dce = log2_aea659(); |
| 53 | VertexOutput v = tint_symbol; |
| 54 | return v; |
| 55 | } |
| 56 | |
| 57 | vertex_main_outputs vertex_main() { |
| 58 | VertexOutput v_1 = vertex_main_inner(); |
dan sinclair | 34a2d65 | 2024-10-25 00:30:58 +0000 | [diff] [blame] | 59 | vertex_main_outputs v_2 = {v_1.prevent_dce, v_1.pos}; |
| 60 | return v_2; |
dan sinclair | 8f1d276 | 2024-07-31 02:35:40 +0000 | [diff] [blame] | 61 | } |
| 62 | |